公开(公告)号：US09502274B2

公开(公告)日：2016-11-22

申请号：US14281880

申请日：2014-05-19

申请人： Samsung Electronics Co., Ltd.

发明人： Yi Koan Hong ,  Byung Lyul Park ,  Jumyong Park ,  Jisoon Park ,  Kyu-Ha Lee ,  Siyoung Choi

IPC分类号： H01L21/673

CPC分类号： H01L21/6733 ,  H01L21/6732 ,  H01L21/67323 ,  H01L21/67326

摘要： Embodiments of the present inventive concepts provide a wafer loader having one or more buffer zones to prevent damage to a wafer loaded in the wafer loader. The wafer loader may include a plurality of loading sections that protrude from a main body and are configured to be arranged at various locations along an edge of the wafer. Each of the loading sections may include a groove into which the edge of the wafer may be inserted. The loading section may include first and second protrusions having first and second inner sides, respectively, that face each other to define the groove therebetween. At least one of the first and second inner sides may include a recess to define the buffer zone.

摘要翻译： 本发明构思的实施例提供了具有一个或多个缓冲区的晶片装载器，以防止损坏装载在晶片装载器中的晶片。 晶片装载机可以包括从主体突出的多个装载部分，并被构造成沿着晶片的边缘布置在不同位置。 每个加载部分可以包括槽，其中可以插入晶片的边缘。 装载部分可以包括分别具有彼此面对以限定其间的凹槽的第一和第二内侧的第一和第二突起。 第一和第二内侧中的至少一个可以包括限定缓冲区的凹部。

公开(公告)号：US06446647B1

公开(公告)日：2002-09-10

申请号：US09597744

申请日：2000-06-19

申请人： Eric Chu ,  Hung-Hsien Chang ,  To-Yao Hsu ,  Chin-Wen Chung ,  Hsing-Sheng Yang

发明人： Eric Chu ,  Hung-Hsien Chang ,  To-Yao Hsu ,  Chin-Wen Chung ,  Hsing-Sheng Yang

IPC分类号： B08B300

CPC分类号： H01L21/67057 ,  H01L21/6732 ,  H01L21/67326 ,  H01L21/6733 ,  Y10S134/902

摘要： A cassette holder is positioned within cleaning equipment. The cleaning equipment includes a solution tank, at least one pipe positioned on an internal wall of the solution tank, and a cassette in which at least one semiconductor wafer is placed. The cassette holder has a loading plate in the solution tank for holding the cassette. Pluralities of guide blocks mounted on the loading plate prevent movement of the cassette. A side-frame is positioned at an end of the loading plate proximate to the pipe. The bottom of the loading plate has a plurality of neck feet, and each neck foot is covered by a first tube that enhances support strength of the neck foot. The cassette holder further includes at least one weight to overcome buoyancy.

摘要翻译： 磁带仓位于清洁设备内。 清洁设备包括溶液罐，位于溶液罐的内壁上的至少一个管和其中放置至少一个半导体晶片的盒。 盒式存储器在溶液罐中具有用于保持盒式磁带的装载板。 安装在装载板上的多个导块阻止盒的移动。 侧框架位于靠近管道的装载板的端部。 装载板的底部具有多个颈部脚，并且每个颈部脚都由增强颈部脚的支撑强度的第一管覆盖。 盒架还包括至少一个重量以克服浮力。

公开(公告)号：US6068137A

公开(公告)日：2000-05-30

申请号：US297258

申请日：1999-06-11

申请人： Chikayuki Takashima

发明人： Chikayuki Takashima

IPC分类号： H01L21/673 ,  A47F7/00

CPC分类号： H01L21/6733 ,  Y10S134/902

摘要： The object of this invention is to reduce adhesion of resin in a resin-made carrier used when washing, conveying and transporting semiconductor wafers, and it is characterized in that the carrier is made from PBN having an elongation rate of 100% or less, whereby adhesion of resin is reduced to a minimum compared to a conventional wafer carrier manufactured from PFA.

摘要翻译： PCT No.PCT / JP97 / 03261 Sec。 371日期1999年6月11日第 102（e）1999年6月11日PCT PCT 1997年9月16日PCT公布。 公开号WO99 /​​ 14795 日期1999年3月25日本发明的目的是降低在洗涤，输送和输送半导体晶片时使用的树脂制载体中树脂的粘附性，其特征在于载体由延伸率为100的PBN制成 ％以下，因此与由PFA制造的常规晶片载体相比，树脂的粘附力降低到最小。

公开(公告)号：US4471716A

公开(公告)日：1984-09-18

申请号：US409841

申请日：1982-08-20

申请人： Guy L. Milliren

发明人： Guy L. Milliren

IPC分类号： H01L21/673 ,  B05C13/02

CPC分类号： H01L21/6733 ,  Y10S134/902 ,  Y10S206/833

摘要： A PFA Teflon carrier for silicon wafers being processed in hot baths in the production of integrated circuit chips with sidewalls having wafer spacing webs and grooves receiving the wafers in confronting and spaced relation. The sidewalls having outboard channel supports or stiffening bars extending substantially to the ends of the sidewalls and adjacent offsets in the sidewalls which connect to the end walls of the receptacle, one end wall being H-shaped and having a cross bar panel with elongate parallel stiffener bars thereon at the level of the bottom edge of the wafer confining panels in the sidewalls, the stiffener bars in the end walls having their ends spaced from the sidewalls.

摘要翻译： 用于硅晶片的PFA特氟隆载体在热浴中加工，以生产集成电路芯片，其侧壁具有晶片间隔腹板和以相对和间隔的关系接收晶片的凹槽。 侧壁具有外侧通道支撑件或加强杆，其基本上延伸到侧壁的端部和连接到容器的端壁的侧壁中的相邻偏移，一个端壁是H形并且具有带有细长平行的加强件的横杆面板 在侧壁上的晶片限制板的底部边缘的水平面上的杆，其端壁中的加强筋的端部与侧壁间隔开。

公开(公告)号：US20100062243A1

公开(公告)日：2010-03-11

申请号：US12567969

申请日：2009-09-28

申请人： Yeshwanth Narendar ,  Richard F. Buckley

发明人： Yeshwanth Narendar ,  Richard F. Buckley

IPC分类号： H01L21/67 ,  C04B35/565 ,  B32B18/00

CPC分类号： C04B41/459 ,  C01B32/956 ,  C01P2006/80 ,  C04B35/565 ,  C04B35/62222 ,  C04B41/009 ,  C04B41/80 ,  C04B2235/3826 ,  C04B2235/428 ,  C04B2235/72 ,  C04B2235/80 ,  C04B2235/963 ,  H01L21/6733 ,  Y10T428/12576 ,  Y10T428/26 ,  C04B41/4519 ,  C04B41/4556 ,  C04B41/5035

摘要： A semiconductor processing component can include SiC, wherein the semiconductor processing component has an impurity ratio less than 34:1. The impurity ratio can be a ratio of a first average impurity concentration to a second impurity level, wherein the first average impurity concentration is an average impurity concentration of a impurity from an exposed surface of the semiconductor processing component to a depth of 0.2 microns from the exposed surface, and the second average impurity concentration is an average impurity concentration of the impurity from a depth of 0.8 microns from the exposed surface to a depth of 1.0 micron from the exposed surface.

摘要翻译： 半导体处理组件可以包括SiC，其中半导体处理组件具有小于34:1的杂质比。 杂质比可以是第一平均杂质浓度与第二杂质水平的比率，其中第一平均杂质浓度是从半导体处理组件的暴露表面到距离半导体处理组件的0.2微米深度的杂质的平均杂质浓度 并且第二平均杂质浓度是杂质从暴露表面到暴露表面至1.0微米深度的0.8微米的平均杂质浓度。

公开(公告)号：US20070190276A1

公开(公告)日：2007-08-16

申请号：US11651093

申请日：2007-01-08

申请人： Charles Extrand ,  Robert Bucha

发明人： Charles Extrand ,  Robert Bucha

IPC分类号： B32B27/08

CPC分类号： H01L21/6733 ,  H01L21/67336 ,  Y10T428/13 ,  Y10T428/1352

摘要： Electrostatic-discharge safe devices for processing electronic components, e.g., matrix trays, chip trays, and wafer carriers are disclosed that are made from a mixture of a high temperature, high strength polymer and at least one metal oxide, and optionally with at least one pigment. The use of the metal oxides as conductive materials advantageously allows for light-colored electrostatic-discharge safe materials to be made. Such materials may be colored with pigments without compromise of material performance specifications.

公开(公告)号：US20040209445A1

公开(公告)日：2004-10-21

申请号：US10414563

申请日：2003-04-15

申请人： Saint-Gobain Ceramics & Plastics, Inc.

发明人： Andrew G. Haerle ,  Richard F. Buckley ,  Richard R. Hengst

IPC分类号： H01L021/322

CPC分类号： C04B41/459 ,  C01B32/956 ,  C01P2006/80 ,  C04B35/565 ,  C04B35/62222 ,  C04B41/009 ,  C04B41/80 ,  C04B2235/3826 ,  C04B2235/428 ,  C04B2235/72 ,  C04B2235/80 ,  C04B2235/963 ,  H01L21/6733 ,  Y10T428/12576 ,  Y10T428/26 ,  C04B41/4519 ,  C04B41/4556 ,  C04B41/5035

摘要： A method for treating a semiconductor processing component, including: exposing the component to a halogen gas at an elevated temperature, oxidizing the component to form an oxide layer, and removing the oxide layer

公开(公告)号：US20040126522A1

公开(公告)日：2004-07-01

申请号：US10683474

申请日：2003-10-09

发明人： Charles W. Extrand ,  Robert Bucha

IPC分类号： F16L001/00

CPC分类号： H01L21/6733 ,  H01L21/67336 ,  Y10T428/13 ,  Y10T428/1352

摘要： Electrostatic-discharge safe devices for processing electronic components, e.g., matrix trays, chip trays, and wafer carriers are disclosed that are made from a mixture of a high temperature, high strength polymer and at least one metal oxide, and optionally with at least one pigment. The use of the metal oxides as conductive materials advantageously allows for light-colored electrostatic-discharge safe materials to be made. Such materials may be colored with pigments without compromise of material performance specifications.

摘要翻译： 公开了用于处理电子部件（例如，矩阵托盘，芯片托盘和晶片载体）的静电放电安全装置，其由高温高强度聚合物和至少一种金属氧化物的混合物制成，并且可选地与至少一种 颜料。 使用金属氧化物作为导电材料有利地允许制造浅色静电放电安全材料。 这些材料可以用颜料着色，而不损害材料性能规格。

公开(公告)号：US06318389B1

公开(公告)日：2001-11-20

申请号：US09430654

申请日：1999-10-29

申请人： Philip R. Schmidt ,  Jon Seilkop ,  Craig Spohr

发明人： Philip R. Schmidt ,  Jon Seilkop ,  Craig Spohr

IPC分类号： B08B1102

CPC分类号： H01L21/67313 ,  H01L21/67316 ,  H01L21/67326 ,  H01L21/6733 ,  Y10S134/902

摘要： A device for cleaning semiconductor wafers is provided. The device includes a carrier for holding wafers during the cleaning process. The carrier includes a frame with an open top and a plurality of carrier rods extending between opposite ends of the frame. The carrier rods have grooves that receive marginal edge portions of the wafers to retain them against movement in the carrier during cleaning and transportation. The grooves are structured to reduce the amount of contaminants remaining on the wafers after cleaning. The frame may be made substantially entirely of a polymeric material.

摘要翻译： 提供了一种用于清洁半导体晶片的装置。 该装置包括用于在清洁过程中保持晶片的载体。 载体包括具有开口顶部的框架和在框架的相对端部之间延伸的多个承载杆。 承载杆具有接收晶片的边缘部分的槽，以在清洁和运输期间保持它们抵抗载体中的运动。 这些凹槽被构造成减少在清洁之后残留在晶片上的污染物的量。 框架可以基本上完​​全由聚合物材料制成。

公开(公告)号：US20150068948A1

公开(公告)日：2015-03-12

申请号：US14281880

申请日：2014-05-19

申请人： Samsung Electronics Co., Ltd.

发明人： Yi Koan HONG ,  Byung Lyul PARK ,  Jumyong PARK ,  Jisoon PARK ,  Kyu-Ha LEE ,  Siyoung CHOI

IPC分类号： H01L21/673

CPC分类号： H01L21/6733 ,  H01L21/6732 ,  H01L21/67323 ,  H01L21/67326

摘要： Embodiments of the present inventive concepts provide a wafer loader having one or more buffer zones to prevent damage to a wafer loaded in the wafer loader. The wafer loader may include a plurality of loading sections that protrude from a main body and are configured to be arranged at various locations along an edge of the wafer. Each of the loading sections may include a groove into which the edge of the wafer may be inserted. The loading section may include first and second protrusions having first and second inner sides, respectively, that face each other to define the groove therebetween. At least one of the first and second inner sides may include a recess to define the buffer zone.

摘要翻译： 本发明构思的实施例提供了具有一个或多个缓冲区的晶片装载器，以防止损坏装载在晶片装载器中的晶片。 晶片装载机可以包括从主体突出的多个装载部分，并被构造成沿着晶片的边缘布置在不同位置。 每个加载部分可以包括槽，其中可以插入晶片的边缘。 装载部分可以包括分别具有彼此面对以限定其间的凹槽的第一和第二内侧的第一和第二突起。 第一和第二内侧中的至少一个可以包括限定缓冲区的凹部。