公开(公告)号：US06429524B1

公开(公告)日：2002-08-06

申请号：US09853956

申请日：2001-05-11

申请人： Edward C. Cooney, III ,  Anthony K. Stamper

发明人： Edward C. Cooney, III ,  Anthony K. Stamper

IPC分类号： H01C2348

CPC分类号： H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of fabricating an interconnect for a semiconductor device is disclosed. The method comprises: forming a dielectric layer on a semiconductor substrate; forming a trench in the dielectric layer; placing the semiconductor substrate in a plasma deposition chamber having a tantalum target; initiating a plasma in the presence of nitrogen in the plasma deposition chamber; and depositing an ultra-thin layer comprising tantalum and nitrogen in the trench.

摘要翻译： 公开了制造用于半导体器件的互连的方法。 该方法包括：在半导体衬底上形成电介质层; 在介电层中形成沟槽; 将半导体衬底放置在具有钽靶的等离子体沉积室中; 在等离子体沉积室中在氮气存在下引发等离子体; 以及在沟槽中沉积包含钽和氮的超薄层。

公开(公告)号：US06720655B1

公开(公告)日：2004-04-13

申请号：US09685855

申请日：2000-10-11

申请人： Kie Y. Ahn ,  Leonard Forbes

发明人： Kie Y. Ahn ,  Leonard Forbes

IPC分类号： H01C2348

CPC分类号： H01L21/7682 ,  H01L2924/0002 ,  H01L2924/00

摘要： A multilevel interconnect structure with a low-k dielectric constant is fabricated in an integrated circuit structure by the steps of depositing a layer of photoresist on a substrate assembly, etching the photoresist to form openings, forming a metal layer on the photoresist layer to fill the openings and then removing the photoresist layer by, for example, ashing. The metal layer is supported by the metal which filled the openings formed in the photoresist.

摘要翻译： 通过以下步骤在集成电路结构中制造具有低k介电常数的多电平互连结构：通过在衬底组件上沉积光致抗蚀剂层，蚀刻光致抗蚀剂以形成开口，在光致抗蚀剂层上形成金属层以填充 开口，然后通过例如灰化除去光致抗蚀剂层。 金属层由填充光致抗蚀剂中形成的开口的金属支撑。

公开(公告)号：US06794754B2

公开(公告)日：2004-09-21

申请号：US10052978

申请日：2002-01-17

申请人： Hiroshi Morisaki ,  Shinji Nozaki

发明人： Hiroshi Morisaki ,  Shinji Nozaki

IPC分类号： H01C2348

CPC分类号： C12Q1/6827 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02269 ,  H01L21/31695 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002 ,  Y10S438/96 ,  C12Q2525/131 ,  C12Q2523/125 ,  C12Q2521/313 ,  H01L2924/00

摘要： In a method of manufacturing a semiconductor device, semiconductor circuit elements or wiring patterns are formed on a semiconductor substrate. Then, a porous semiconductor oxide film is formed as an interlayer insulating film on the semiconductor substrate including the semiconductor circuit elements or wiring patterns by oxidizing semiconductor substance in a gas mixture containing an oxygen gas in a chamber.

摘要翻译： 在制造半导体器件的方法中，在半导体衬底上形成半导体电路元件或布线图案。 然后，通过在室中含有氧气的气体混合物中氧化半导体物质，在包括半导体电路元件或布线图案的半导体基板上形成多孔半导体氧化膜作为层间绝缘膜。

公开(公告)号：US06707152B1

公开(公告)日：2004-03-16

申请号：US09292745

申请日：1999-04-16

申请人： Edward A. Schrock

发明人： Edward A. Schrock

IPC分类号： H01C2348

CPC分类号： H01L24/32 ,  H01L23/3128 ,  H01L23/49866 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/3452 ,  H05K2203/0315 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device is provided with copper traces for connecting active elements to an external device, and insulating layers of black oxide (cupric oxide) are formed on the traces. The active elements may be, for example, conductors on the active surface of a semiconductor die. The external device may be, for example, a memory device or an input/output device. The invention eliminates the need for a resist solder mask. The black oxide prevents solder from adhering to the traces except where desired. The black oxide layers preferably do not cover the entire surfaces of the semiconductor device. The oxide layers grow only on the surfaces of the copper traces. Consequently, the dimensions of the finished device may be minimized. Black oxide may also be used to promote adhesion between the die and the substrate.

摘要翻译： 半导体器件设置有用于将有源元件连接到外部器件的铜迹线，并且在迹线上形成黑色氧化物（氧化铜）的绝缘层。 有源元件可以是例如半导体管芯的有源表面上的导体。 外部设备可以是例如存储设备或输入/输出设备。 本发明消除了对抗蚀剂焊料掩模的需要。 除了需要之外，黑色氧化物防止焊料粘附到迹线上。 黑色氧化物层优选不覆盖半导体器件的整个表面。 氧化物层仅在铜迹线的表面上生长。 因此，可以使成品装置的尺寸最小化。 也可以使用黑色氧化物来促进管芯和衬底之间的粘附。

公开(公告)号：US06822337B2

公开(公告)日：2004-11-23

申请号：US10261834

申请日：2002-09-30

申请人： Jin-Chuan Bai

发明人： Jin-Chuan Bai

IPC分类号： H01C2348

CPC分类号： H01L23/3135 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05599

摘要： A window-type ball grid array (WBGA) semiconductor package is proposed. A substrate is formed with an opening and a tape attach area around the opening. A polyimide tape having an aperture is applied over the tape attach area, allowing the aperture to be aligned with the opening of the substrate. A chip is mounted over the polyimide tape and electrically connected to the substrate via the opening by bonding wires, wherein the polyimide tape is interposed between the chip and the substrate so as not to leave any gaps between the chip and the substrate. A first encapsulant is formed to fill the opening and encapsulate the bonding wires. A second encapsulant is fabricated to encapsulate the chip. With no gaps between the chip and the substrate, the chip is firmly supported on the substrate during a molding process for fabricating the second encapsulant, thereby preventing chip cracks from occurrence.

摘要翻译： 提出了一种窗型球栅阵列（WBGA）半导体封装。 衬底形成有开口和围绕开口的带附着区域。 具有孔径的聚酰亚胺带被施加在带附着区域上，允许孔与基板的开口对准。 将芯片安装在聚酰亚胺带上，通过接合线通过开口与基板电连接，其中聚酰亚胺带插入在芯片和基板之间，以便在芯片和基板之间不留下任何间隙。 形成第一密封剂以填充开口并封装接合线。 制造第二密封剂以封装芯片。 在芯片和基板之间没有间隙的情况下，在用于制造第二密封剂的模制工艺期间，芯片牢固地支撑在基板上，从而防止芯片发生裂纹。

公开(公告)号：US06404062B1

公开(公告)日：2002-06-11

申请号：US09492391

申请日：2000-01-27

申请人： Fumihiko Taniguchi ,  Sachiko Nogami ,  Akira Takashima

发明人： Fumihiko Taniguchi ,  Sachiko Nogami ,  Akira Takashima

IPC分类号： H01C2348

CPC分类号： H01L23/49816 ,  H01L21/563 ,  H01L23/13 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/15151 ,  H01L2924/15311 ,  H05K1/141 ,  H05K3/305 ,  H05K3/3436 ,  H05K2201/09072 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/0401

摘要： A semiconductor device includes a semiconductor chip, solder balls, a printed wiring substrate on which the semiconductor chip is provided and which serves to electrically connect the semiconductor chip and the solder balls. When such a semiconductor device is mounted on a motherboard, at least one through-aperture is in advance formed on the printed wiring substrate oppositely to the semiconductor chip. After the solder balls are soldered to the motherboard, an under-filler is introduced from either of a space between the semiconductor chip and the printed wiring substrate or a space between the printed wiring substrate and the motherboard, thus flowing from one space into the other space via the through-aperture.

摘要翻译： 半导体器件包括半导体芯片，焊球，其上设置有半导体芯片的印刷布线基板，其用于电连接半导体芯片和焊球。 当这种半导体器件安装在母板上时，预先在与半导体芯片相对的印刷布线基板上形成至少一个通孔。 在将焊球焊接到母板上之后，从半导体芯片和印刷布线基板之间的空间或印刷布线基板和母板之间的空间中引入底部填料，从而从一个空间流入另一个空间 通过通孔的空间。