公开(公告)号：US11665906B2

公开(公告)日：2023-05-30

申请号：US16794528

申请日：2020-02-19

申请人： Kioxia Corporation

发明人： Tomoya Inden

IPC分类号： H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L27/11565

CPC分类号： H01L27/1157 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11582

摘要： A semiconductor memory device includes a substrate, a first conductor layer, and a first insulator layer. The substrate includes a first region on which memory cells are provided, a second region on which a control circuit of the memory cells is provided, and a third region separating the first region and the second region. The first conductor layer is above the second region of the substrate. The first insulator layer is above the second and third regions of the substrate. The first insulator layer includes a first portion that is above the first conductor layer and extends along a surface direction of the substrate, and a second portion that is continuous with the first portion and extends along a thickness direction of the substrate from the first portion toward a surface of the substrate in the third region.

公开(公告)号：US11653499B2

公开(公告)日：2023-05-16

申请号：US17152186

申请日：2021-01-19

申请人： Micron Technology, Inc.

发明人： Eric N. Lee

IPC分类号： H10B43/50 ,  H01L23/528 ,  H10B41/27 ,  H10B43/27 ,  H10B41/50 ,  H10B41/40 ,  H10B43/40 ,  H01L21/764 ,  H10B41/35 ,  H10B43/35 ,  H01L27/11575 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11548 ,  H01L27/11526 ,  H01L27/11573 ,  H01L27/11524 ,  H01L27/1157

CPC分类号： H01L27/11575 ,  H01L21/764 ,  H01L23/5283 ,  H01L27/1157 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11582

摘要： A semiconductor device structure comprises stacked tiers each comprising at least one conductive structure and at least one insulating structure longitudinally adjacent the at least one conductive structure, at least one staircase structure having steps comprising lateral ends of the stacked tiers, and at least one opening extending through the stacked tiers and continuously across an entire length of the at least one staircase structure. The at least one conductive structure of each of the stacked tiers extends continuously from at least one of the steps of the at least one staircase structure and around the at least one opening to form at least one continuous conductive path extending completely across each of the stacked tiers. Additional semiconductor device structures, methods of forming semiconductor device structures, and electronic systems are also described.

公开(公告)号：US20230123297A1

公开(公告)日：2023-04-20

申请号：US17863697

申请日：2022-07-13

申请人： Samsung Electronics Co., Ltd.

发明人： Byungsoo Kim ,  Sangwan Nam ,  MinJae Seo ,  Bongsoon Lim

IPC分类号： H01L27/11575 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11582

摘要： A memory device includes a first cell array region and a second cell array region separated by a separation region, each including at least one memory block having a plurality of gate electrode layers stacked in a first direction. The gate electrode layers include an upper select electrode layer including a plurality of string select lines, and a first electrode layer including a plurality of first word lines arranged below the string select lines. The first word lines include a first connection line to connect first end portions of the first word lines positioned on the opposite side of the separation region to each other and a plurality of second connection lines to connect some of second end portions of the plurality of first word lines adjacent to the separation region to each other, wherein each of the second connection lines is shorter than the first connection line.

公开(公告)号：US11631687B2

公开(公告)日：2023-04-18

申请号：US16797331

申请日：2020-02-21

申请人： Kioxia Corporation

发明人： Yusaku Suzuki ,  Kazuhiro Nojima ,  Atsuko Aiba

IPC分类号： H01L27/1157 ,  H01L27/11575 ,  H01L27/11565 ,  G11C16/04

摘要： A semiconductor memory device according to an embodiment includes a base, a first conductor, a second conductor, a first pillar, a first insulating member, and a first contact. The first conductor is provided in a first layer above the base. The second conductor is provided above the first conductor. The first pillar includes a first portion and a second portion formed by different bodies. The first portion of the first pillar is provided to penetrate the first conductor. The second portion of the first pillar is provided to penetrate the second conductor. The first insulating member is provided at least in the first layer. The first contact is contacting the second conductor above the first insulating member.

公开(公告)号：US11626422B2

公开(公告)日：2023-04-11

申请号：US17319389

申请日：2021-05-13

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki ,  Hajime Kimura ,  Takanori Matsuzaki ,  Kiyoshi Kato ,  Satoru Okamoto

IPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11575 ,  H01L29/24 ,  H01L29/51

摘要： A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.

公开(公告)号：US11616073B1

公开(公告)日：2023-03-28

申请号：US17514979

申请日：2021-10-29

申请人： Micron Technology, Inc.

发明人： Kamal M. Karda ,  Eric S. Carman ,  Karthik Sarpatwari ,  Durai Vishak Nirmal Ramaswamy ,  Richard E Fackenthal ,  Haitao Liu

IPC分类号： H01L27/11575 ,  H01L29/423 ,  H01L29/10

摘要： Some embodiments include apparatuses and methods forming the apparatuses. One of the apparatuses includes a first transistor including a first channel region, and a charge storage structure separated from the first channel region; a second transistor including a second channel region formed over the charge storage structure; and a data line formed over and contacting the first channel region and the second channel region, the data line including a portion adjacent the first channel region and separated from the first channel region by a dielectric material.

公开(公告)号：US11610912B2

公开(公告)日：2023-03-21

申请号：US17184094

申请日：2021-02-24

申请人： KIOXIA CORPORATION

发明人： Hidenobu Nagashima

IPC分类号： H01L27/11575 ,  H01L27/11573 ,  H01L21/762 ,  H01L27/11565 ,  H01L23/535 ,  H01L21/768 ,  H01L27/11582 ,  H01L21/311

摘要： According to one embodiment, a semiconductor memory device includes a stacked body, memory pillars, first and second insulation layers and an isolation region. The stacked body above a substrate includes conductive layers isolated from each other and stacked along a first direction crossing the substrate surface. The memory pillars extend through the stacked body along the first direction. The first insulation layer is provided above the memory pillars. The isolation region is provided higher than upper surfaces of the memory pillars in the stacked body along the first direction, and isolates the stacked body in a second direction crossing the first direction. The second insulation layer is provided on the first insulation layer and a side wall of the isolation region.

公开(公告)号：US20230081373A1

公开(公告)日：2023-03-16

申请号：US17829011

申请日：2022-05-31

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Bosuk KANG ,  Joonhee LEE ,  Seonghun JEONG

IPC分类号： H01L27/11575 ,  H01L27/11556 ,  H01L27/11548 ,  H01L27/11582

摘要： A semiconductor device includes a substrate having a first region and a second region, gate electrodes spaced apart from each other in a first direction, perpendicular to an upper surface of the substrate, and extend in a second direction, and have different lengths on the second region, channel structures that penetrate the gate electrodes, extend in the first direction, and respectively include a channel layer on the first region, support structures that penetrate the gate electrodes and extend in the first direction on the second region, and a separation region that penetrates the gate electrodes and extend in the second direction. The substrate has a recess region that overlaps the separation region in the first direction and extends downward from an upper surface in the second region, adjacent to the first region. The separation region has a protrusion that protrudes downward to correspond to the recess region.

公开(公告)号：US11605646B2

公开(公告)日：2023-03-14

申请号：US17350161

申请日：2021-06-17

申请人： Kioxia Corporation

发明人： Kazuhiro Nojima ,  Kojiro Shimizu

IPC分类号： H01L27/11582 ,  H01L27/11573 ,  H01L27/1157 ,  G11C5/06 ,  H01L27/11565 ,  H01L27/11575

摘要： A semiconductor storage device includes a logic circuit formed on a substrate, a first area formed on the logic circuit and has a plurality of first insulating layers and a plurality of conductive layers alternately stacked in a first direction, a plurality of memory pillars MP which extend in the first area in the first direction, a second area which is formed on the logic circuit and has the plurality of first insulating layers 33 and a plurality of second insulating layers alternately stacked in the first direction, and a contact plug CP1 which extends in the second area in the first direction and is connected to the logic circuit.

公开(公告)号：US20230077163A1

公开(公告)日：2023-03-09

申请号：US18050431

申请日：2022-10-27

申请人： Micron Technology, Inc.

发明人： Troy R. Sorensen ,  Mohd Kamran Akhtar

IPC分类号： H01L27/11548 ,  H01L23/528 ,  H01L23/522 ,  H01L27/11556 ,  H01L27/11582 ,  H01L21/311 ,  H01L21/768 ,  H01L27/11575

摘要： A method of forming a semiconductor device structure comprises forming a stack structure over a substrate, the stack structure comprising tiers each independently comprising a sacrificial structure and an insulating structure and longitudinally adjacent the sacrificial structure. A masking structure is formed over a portion of the stack structure. A photoresist is formed over the masking structure and over additional portions of the stack structure not covered by the masking structure. The photoresist and the stack structure are subjected to a series of material removal processes to selectively remove portions of the photoresist and portions of the stack structure not covered by one or more of the masking structure and remaining portions of the photoresist to form a stair step structure. Semiconductor devices and additional methods of forming a semiconductor device structure are also described.