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    A SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND PROCESS FOR PRODUCING SAME
    1.
    发明申请
    A SEMICONDUCTOR-ON-INSULATOR STRUCTURE AND PROCESS FOR PRODUCING SAME 审中-公开
    一种半导体绝缘体结构及其制造方法

    公开(公告)号：WO2013067572A1

    公开(公告)日：2013-05-16

    申请号：PCT/AU2012/001347

    申请日：2012-11-02

    Applicant: THE SILANNA GROUP PTY LTD ,  BRAWLEY, Andrew, John

    Inventor： BRAWLEY, Andrew, John

    IPC: H01L21/76 ,  H01L21/20

    CPC classification number: H01L29/78603 ,  H01L21/76254 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66742

    Abstract: A semiconductor-on-insulator structure, including a semiconductor thin film having electronic devices formed therein, the semiconductor thin film being disposed on a first face of an electrically insulating thin film; wherein to reduce parasitic capacitance, there is no bulk substrate attached to a second face of the electrically insulating thin film opposite to the first face, and to provide a path for heat flow from the devices, the thermal conductivity of the electrically insulating thin film is substantially greater than 1.4 W•m- 1 •K- 1 .

    Abstract translation: 一种绝缘体上半导体结构，包括其中形成有电子器件的半导体薄膜，所述半导体薄膜设置在电绝缘薄膜的第一面上; 为了减小寄生电容，不存在与第一面相反的电绝缘性薄膜的第二面附着的体基板，并且为了提供来自器件的热流的路径，电绝缘性薄膜的导热性为 基本上大于1.4Wm-1.K-1。

    A PHOTOVOLTAIC DEVICE AND A PROCESS FOR PRODUCING A PHOTOVOLTAIC DEVICE
    2.
    发明申请
    A PHOTOVOLTAIC DEVICE AND A PROCESS FOR PRODUCING A PHOTOVOLTAIC DEVICE 审中-公开
    一种光伏器件和一种用于生产光伏器件的方法

    公开(公告)号：WO2013019250A1

    公开(公告)日：2013-02-07

    申请号：PCT/US2011/051264

    申请日：2011-09-12

    Applicant: THE SILANNA GROUP PTY LTD ,  DUVALL, Steven ,  STUBER, Michael ,  ATANACKOVIC, Peter ,  READ, Andrew

    Inventor： DUVALL, Steven ,  STUBER, Michael ,  ATANACKOVIC, Peter ,  READ, Andrew

    IPC: H01L31/18 ,  H01L31/042

    CPC classification number: H01L31/075 ,  H01L31/1804 ,  H01L31/1892 ,  Y02E10/547 ,  Y02E10/548 ,  Y02P70/521

    Abstract: A photovoltaic device includes a semiconductor layer having photovoltaic solar cells formed therein, a handle substrate; and an interconnect layer disposed between the semiconductor layer and the handle substrate. The interconnect layer includes electrically conductive paths electrically connected to the photovoltaic solar cells in the semiconductor layer. A process forms photovoltaic devices in a semiconductor substrate; forms a planar interconnect layer having insulated, electrically conductive paths, the planar interconnect layer being formed on one of the semiconductor substrate and a planar handle substrate; bonds the other of the semiconductor substrate and the planar handle substrate to the interconnect layer to form a bonded stack in which the electrically conductive paths are electrically connected to the photovoltaic devices; and thins the semiconductor substrate to at least reduce the thickness of the semiconductor substrate between a face and the photovoltaic devices to improve the efficiency of the photovoltaic devices.

    Abstract translation: 光伏器件包括其中形成有光伏太阳能电池的半导体层，手柄基板; 以及布置在所述半导体层和所述手柄基板之间的互连层。 互连层包括电连接到半导体层中的光伏太阳能电池的导电路径。 一种工艺在半导体衬底中形成光电器件; 形成具有绝缘的导电路径的平面互连层，所述平面互连层形成在所述半导体衬底和平面处理衬底之一上; 将所述半导体衬底和所述平面处理衬底中的另一个键合到所述互连层，以形成其中所述导电路径电连接到所述光伏器件的键合叠层; 并且使半导体衬底沉淀以至少减小面和光电器件之间的半导体衬底的厚度，以提高光伏器件的效率。

    SEMICONDUCTOR ON INSULATOR SUBSTRATE
    3.
    发明申请
    SEMICONDUCTOR ON INSULATOR SUBSTRATE 审中-公开
    半导体绝缘体衬底

    公开(公告)号：WO2017093829A1

    公开(公告)日：2017-06-08

    申请号：PCT/IB2016/056720

    申请日：2016-11-08

    Applicant: THE SILANNA GROUP PTY LTD

    Inventor： BRAWLEY, Andrew ,  LIM, Gary ,  IMTHURN, George

    IPC: H01L21/762 ,  H01L21/265 ,  H01L21/18 ,  H01L23/00

    CPC classification number: H01L21/76254

    Abstract: Various semiconductor wafers and their methods of fabrication are disclosed. One exemplary process comprises, forming a layer consisting essentially of aluminum nitride on a first wafer. The first wafer includes a substrate. The process also comprises bonding a second wafer to the first wafer. The aluminum nitride layer is interposed between the substrate and the second wafer after the bonding step. The process also comprises separating the first and second wafers to form a semiconductor on insulator (SOI) wafer. The SOI receives a layer of semiconductor material from the second wafer during the separating step. The SOI wafer includes the layer of semiconductor material, the layer consisting essentially of aluminum nitride, and the substrate after the separating step.

    Abstract translation: 公开了各种半导体晶片及其制造方法。 一个示例性工艺包括在第一晶片上形成基本上由氮化铝构成的层。 第一晶片包括衬底。 该过程还包括将第二晶片结合到第一晶片。 在接合步骤之后，氮化铝层插入在衬底和第二晶片之间。 该工艺还包括分离第一和第二晶片以形成绝缘体上半导体（SOI）晶片。 SOI在分离步骤期间从第二晶片接收半导体材料层。 SOI晶片包括半导体材料层，基本上由氮化铝构成的层和分离步骤后的衬底。

    POWER CONVERTER WITH LOW THRESHOLD VOLTAGE TRANSISTOR
    4.
    发明申请
    POWER CONVERTER WITH LOW THRESHOLD VOLTAGE TRANSISTOR 审中-公开
    低电压电压转换器功率转换器

    公开(公告)号：WO2017056018A2

    公开(公告)日：2017-04-06

    申请号：PCT/IB2016/055803

    申请日：2016-09-28

    Applicant: THE SILANNA GROUP PTY LTD

    Inventor： MOGHE, Yashodhan Vijay

    IPC: H02M1/08 ,  H02M3/155 ,  H02M1/00

    CPC classification number: H02M3/158 ,  H02M3/1588 ,  H02M2001/0048 ,  Y02B70/1466 ,  Y02B70/1491

    Abstract: A power converter with a high side transistor and a low side transistor produces a phase voltage as the high and low side transistors turn on and off under control of a high side driver and a low side driver, respectively. The low side transistor has a low threshold voltage of 0.4 volts or less. In some embodiments, a drive voltage less than 0 volts turns off the low side transistor. In some embodiments, a low impedance between the low side driver and the low side transistor enables the drive voltage to turn off the low side transistor during high output transients. In some embodiments, the high side transistor, the low side transistor, the high side driver, and the low side driver are integrated together on the same integrated circuit die.

    Abstract translation: 具有高侧晶体管和低侧晶体管的功率转换器分别在高侧驱动器和低侧驱动器的控制下，由于高侧和低侧晶体管导通和关断而产生相电压。 低侧晶体管具有0.4伏或更小的低阈值电压。 在一些实施例中，小于0伏的驱动电压关断低侧晶体管。 在一些实施例中，低侧驱动器和低侧晶体管之间的低阻抗使得驱动电压能够在高输出瞬变期间关断低侧晶体管。 在一些实施例中，高侧晶体管，低侧晶体管，高侧驱动器和低侧驱动器在同一集成电路管芯上集成在一起。

    CMOS FABRICATION OF A THIN-FILM BULK ACOUSTIC RESONATOR
    9.
    发明申请
    CMOS FABRICATION OF A THIN-FILM BULK ACOUSTIC RESONATOR 审中-公开
    一种薄膜大容量谐波谐振器的CMOS制造

    公开(公告)号：WO2014012136A2

    公开(公告)日：2014-01-23

    申请号：PCT/AU2013/000785

    申请日：2013-07-15

    Applicant: THE SILANNA GROUP PTY LTD

    Inventor： BRAWLEY, Andrew J.

    IPC: H01L21/20

    CPC classification number: H03H9/205 ,  H01L21/76254 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/20 ,  H01L41/187 ,  H01L41/29 ,  H03H3/04 ,  H03H9/0542 ,  H03H9/173

    Abstract: A process of forming a thin-film bulk acoustic resonator (FBAR) device (130, 914) on a silicon-on-thin film aluminum-nitride on silicon (SOFTANOS) substrate (110) using a CMOS fabrication process is provided. The SOFTANOS substrate, which is an example of a high thermal conductivity silicon-on-insulator (SOI) substrate, comprises an aluminum nitride (AlN) layer (114) and a silicon layer (118). The AlN layer has low electrical conductivity, high thermal conductivity, and good piezoelectric properties. A CMOS device (140, 910) is formed in the silicon layer, and the FBAR device is formed in the AlN layer.

    Abstract translation: 提供了使用CMOS制造工艺在硅（SOFTANOS）衬底（110）上的硅上硅氮化铝上形成薄膜体声波谐振器（FBAR）器件（130,914）的工艺。 作为高导热性绝缘体上硅（SOI）衬底的实例的SOFTANOS衬底包括氮化铝（AlN）层（114）和硅层（118）。 AlN层具有低导电性，高导热性和良好的压电性能。 在硅层中形成CMOS器件（140,910），并且在AlN层中形成FBAR器件。

    POWER CONVERTER WITH LOW THRESHOLD VOLTAGE TRANSISTOR
    10.
    发明申请
    POWER CONVERTER WITH LOW THRESHOLD VOLTAGE TRANSISTOR 审中-公开
    具有低阈值电压晶体管的电源转换器

    公开(公告)号：WO2017056018A3

    公开(公告)日：2017-06-15

    申请号：PCT/IB2016055803

    申请日：2016-09-28

    Applicant: THE SILANNA GROUP PTY LTD

    Inventor： MOGHE YASHODHAN VIJAY

    IPC: H02M1/08 ,  H02M1/00 ,  H02M3/155

    CPC classification number: H02M3/158 ,  H02M3/1588 ,  H02M2001/0048 ,  Y02B70/1466 ,  Y02B70/1491

    Abstract: A power converter with a high side transistor and a low side transistor produces a phase voltage as the high and low side transistors turn on and off under control of a high side driver and a low side driver, respectively. The low side transistor has a low threshold voltage of 0.4 volts or less. In some embodiments, a drive voltage less than 0 volts turns off the low side transistor. In some embodiments, a low impedance between the low side driver and the low side transistor enables the drive voltage to turn off the low side transistor during high output transients. In some embodiments, the high side transistor, the low side transistor, the high side driver, and the low side driver are integrated together on the same integrated circuit die.

    Abstract translation: 随着高侧和低侧晶体管分别在高侧驱动器和低侧驱动器的控制下开启和关闭，具有高侧晶体管和低侧晶体管的功率转换器产生相电压。 低端晶体管具有0.4伏或更低的低阈值电压。 在一些实施例中，小于0伏的驱动电压关断低侧晶体管。 在一些实施例中，低侧驱动器和低侧晶体管之间的低阻抗使驱动电压在高输出瞬变期间关断低侧晶体管。 在一些实施例中，高侧晶体管，低侧晶体管，高侧驱动器和低侧驱动器一起集成在同一集成电路管芯上。

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