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    Semiconductor substrate of high reliability
    92.
    发明公开
    Semiconductor substrate of high reliability 失效
    Halbleitersubstrate von hoher Zuverlassigkeit

    公开(公告)号：EP1453089A3

    公开(公告)日：2004-09-08

    申请号：EP04012282.2

    申请日：1997-08-27

    Applicant: Dowa Mining Co., Ltd.

    Inventor： Sakuraba, Masami, c/o Dowa Mining co., Ltd. ,  Kimura, Masami, c/o Dowa Mining Co., Ltd. ,  Nakamura, Junji, c/o Dowa Mining Co., Ltd. ,  Takahara, Masaya, c/o Dowa Mining Co., Ltd.

    IPC: H01L23/15 ,  H01L23/373 ,  H05K1/02

    CPC classification number: H01L23/3735 ,  C04B37/026 ,  C04B2237/124 ,  C04B2237/125 ,  C04B2237/127 ,  C04B2237/343 ,  C04B2237/366 ,  C04B2237/407 ,  C04B2237/70 ,  H01L23/13 ,  H01L23/15 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0306 ,  H05K3/38 ,  H05K2201/0355 ,  H05K2201/09145 ,  H05K2201/098 ,  H05K2201/09845 ,  H01L2924/00

    Abstract: A paste of active metallic brazing material (2) is applied to the entire surface of each side of aluminum nitride or alumina ceramic substrate (1); circuit forming copper plate (3) having a thickness of 0.3 mm is placed in contact with one surface of the substrate and a heat dissipating copper plate (4) having a thickness of 0.25 mm placed in contact with the other surface; the individual members are compressed together and heated at 850°C in a vacuum furnace to form a joint; an etching resist is applied to the circuit forming copper plate and etching is performed with an iron chloride solution to form a circuit pattern and the unwanted brazing material (2) is removed from the marginal portions; a second resist layer is applied and etched with an iron chloride solution to form a second marginal step; a third resist layer is similarly applied and etched to form a third marginal step; the completed circuit board having three marginal steps of which the lowest one is solely or partly made of the brazing material (2) can withstand 1,500 heat cycles, which is the result that has been unattainable by the prior art. Having such high heat cycle characteristics, the circuit board is suitable for use as semiconductor substrate in automobiles, electric trains and other applications that require high output power.

    Abstract translation: 在氮化铝或氧化铝陶瓷基板（1）的每一侧的整个表面上施加活性金属钎料（2）的糊料。 与厚度为0.3mm的电路形成铜板（3）放置成与基板的一个表面接触，并且将厚度为0.25mm的散热铜板（4）放置成与另一个表面接触; 各个构件压缩在一起，在真空炉中在850℃下加热形成接头; 将抗蚀剂施加到形成铜电路的电路上，用氯化铁溶液进行蚀刻以形成电路图案，并且从边缘部分去除不需要的钎焊材料（2）; 施加第二抗蚀剂层并用氯化铁溶液蚀刻以形成第二边缘步骤; 类似地施加和蚀刻第三抗蚀剂层以形成第三边缘步骤; 完整的电路板具有三个边缘步骤，其中最低的一个仅由或部分由钎焊材料（2）制成，可承受1500次热循环，这是现有技术无法实现的结果。 具有这样高的热循环特性，电路板适用于需要高输出功率的汽车，电动列车和其他应用中的半导体衬底。

    Circuit board for use at high voltage
    95.
    发明公开
    Circuit board for use at high voltage 有权
    SchaltungsplattefürHochspannungseinsatz

    公开(公告)号：EP1111970A3

    公开(公告)日：2003-03-12

    申请号：EP00307630.4

    申请日：2000-09-04

    Applicant: Hitachi, Ltd.

    Inventor： Kusukawa, Junpei, Hitachi, Ltd. ,  Takeuchi, Ryozo, Hitachi, Ltd.

    IPC: H05K1/02 ,  H05K3/22

    CPC classification number: H05K3/22 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K1/0257 ,  H05K1/0306 ,  H05K3/244 ,  H05K3/38 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09145 ,  H05K2201/098 ,  H05K2203/0346 ,  H05K2203/105 ,  H05K2203/107 ,  H05K2203/128 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2924/00

    Abstract: In order to restrict a local concentration of an electric field in a conductor layer end portion (11a, 15a) of an insulating circuit board and increase a partial electric discharge starting voltage, thereby improving an insulating reliability of the insulating circuit board and a power semiconductor apparatus employing the same, the present invention provides a method of manufacturing a insulating circuit board comprising the step of applying a voltage between the circuit patterns of the insulating circuit board in an atmospheric or depressurized gas so as to allow the circuit board to discharge electricity, or irradiating a laser beam, thereby a projection shape of the end portion (11a, 15a) of the electrode conductor (3, 6) is melted and smoothened so as to restrict the concentration of the electric field.

    Abstract translation: 为了限制绝缘电路板的导体层端部（11a，15a）中的电场的局部浓度，并且增加了部分放电起始电压，从而提高了绝缘电路板和功率半导体的绝缘可靠性 本发明提供一种制造绝缘电路板的方法，该方法包括以下步骤：在绝缘电路板的电路图形之间在大气压或减压气体中施加电压，以允许电路板放电， 或照射激光束，由此使电极导体（3,6）的端部（11a，15a）的突起形状熔化并平滑，从而限制电场的浓度。

    A tape carrier package
    96.
    发明公开
    A tape carrier package 失效
    一个磁带载体包装

    公开(公告)号：EP0862212A3

    公开(公告)日：1998-12-16

    申请号：EP97308112.8

    申请日：1997-10-10

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Tanaka, Shinichi

    IPC: H01L23/498

    CPC classification number: H01L23/4985 ,  H01L24/50 ,  H01L2924/07811 ,  H01L2924/14 ,  H05K1/0269 ,  H05K1/0271 ,  H05K1/117 ,  H05K3/361 ,  H05K2201/09063 ,  H05K2201/09145 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10681 ,  H05K2203/0195 ,  H01L2924/00

    Abstract: To offer a tape carrier package in which many pins and fine pitches can be simultaneously attained through a simplified positioning during the connection to external devices. Leads 4 and 5 are formed from an over coat area 3, which is formed at the central area of a base film 2, which is made of a resin, such as polymide, for example. Furthermore, outer leads 4a at the input side and outer leads 5a at the output side are respectively formed in a manner so that they extend towards both edge areas of the base film 2. A notched section 6 is formed between the outer leads 5a at the output side of the base film 2, and through this, each of the regions 2a and 2b expands independently during a thermocompression bonding. The notched section 6 is provided almost at the central area of the base film 2 in the longitudinal direction, and outer leads 5 at the output side in the same number (256 for example) are formed at both of its sides in a pitch of approximately 70µm.

    Abstract translation: 提供一种带载封装，在与外部设备连接期间，通过简化的定位，可以同时获得多个引脚和精细间距。 引线4和5由覆盖区域3形成，覆盖区域3形成在例如由聚酰亚胺等树脂制成的基膜2的中央区域。 此外，输入侧的外引线4a和输出侧的外引线5a分别形成为朝向基膜2的两个边缘区域延伸。在外引线5a之间形成有凹口部分6， 在基膜2的输出侧，通过该热处理，各区域2a，2b在热压接时独立地膨胀。 切口部分6大致设置在基膜2的纵向中央区域，输出侧的外引线5的数量相同（例如256），其两侧以约 为70μm。

    Method and apparatus for connecting flexible circuits to printed circuit boards
    97.
    发明公开
    Method and apparatus for connecting flexible circuits to printed circuit boards 失效
    用于向印刷电路板的柔性电路的连接的方法和装置

    公开(公告)号：EP0814539A3

    公开(公告)日：1998-09-23

    申请号：EP97201697

    申请日：1997-06-04

    Applicant: EASTMAN KODAK CO

    Inventor： YOKAJTY JOSEPH E

    IPC: H05K1/14 ,  H01R12/62 ,  H05K1/11 ,  H05K3/36 ,  H01R9/07

    CPC classification number: H01R12/62 ,  H05K1/117 ,  H05K3/363 ,  H05K3/366 ,  H05K2201/048 ,  H05K2201/09063 ,  H05K2201/09145

    Abstract: A method and device for connecting a flexible circuit (12) to a printed circuit board (10) wherein the device is integral with flexible circuit and the printed circuit board resulting in an improvement in the ease and efficiency of assembly. The printed circuit board (10) includes a cut-out (32,36) in a side edge (34,38) thereof to yield an arcuate bearing rim (40,50) located between a pair of opposing nocks (45,55). The printed circuit board (10) includes a plurality of solder pads (46,56) adjacent the arcuate bearing rim and the arcuate bearing rim has a predetermined length. The flexible circuit (12) includes a pair of opposing notches (68) located one each in a lateral edge of the flexible circuit. The flexible circuit (12) also includes a plurality of solder pads (66) proximate to the pair of opposing notches (68). The flexible circuit (12) has a predetermined width at across the opposing notches (68) which is substantially equal to the predetermined length of said arcuate bearing rim (40,50). The flexible circuit (12) is caused to bow such that it can be inserted into the cut-out (32,36) so that the notches (68) interlock with the nocks (45,55) with the flexible circuit (12) engaging the bearing rim (40,50) to conform to the shape of the bearing rim and automatically align the solder pads (46,56) of the printed circuit board (10) with the solder pads (66) of the flexible circuit (12). The electrical and mechanical connection is completed by soldering.

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