公开(公告)号：EP3101912B1

公开(公告)日：2018-08-29

申请号：EP15739798.5

申请日：2015-01-21

Applicant: Olympus Corporation

Inventor： ITO Hiroshi ,  SHIOTANI Koichi

IPC: B06B1/06 ,  H01L41/277 ,  H01L41/047 ,  H01L23/00

CPC classification number: B06B1/0611 ,  A61B17/320068 ,  A61B2018/00607 ,  A61N2007/0078 ,  B06B3/00 ,  H01L24/29 ,  H01L24/32 ,  H01L24/50 ,  H01L24/86 ,  H01L41/0471 ,  H01L41/277 ,  H01L2224/29111 ,  H01L2224/32145 ,  H01L2924/01029 ,  H01L2924/01047

Abstract: A stacked ultrasound vibration device is provided with a plurality of piezoelectric bodies 61 between two mass materials 42 and 43, in which brazing materials 73 and 76 with an elastic constant smaller than elastic constants of the two mass materials 42 and 43 and the plurality of piezoelectric bodies 61 are used to bond the plurality of piezoelectric bodies 61 as similar material bonding portions by a first metal bonding layer with a first thickness d1 and to bond the plurality of piezoelectric bodies 61 and the mass materials 42 and 43 as dissimilar material bonding portions by a second metal bonding layer with a second thickness d2 thicker than the first thickness d1.

公开(公告)号：EP2811337A1

公开(公告)日：2014-12-10

申请号：EP14162711.7

申请日：2014-03-31

Applicant: Samsung Display Co., Ltd.

Inventor： Bae, Han-Sung ,  Kwak, Wonkyu

IPC: G02F1/1345 ,  H05K1/11 ,  H05K3/36

CPC classification number: H05K7/06 ,  G02F1/13458 ,  H01L23/49572 ,  H01L24/50 ,  H01L2224/50 ,  H01L2224/79 ,  H01L2224/86 ,  H01L2225/06579 ,  H01L2225/107 ,  H05K1/117 ,  H05K1/118 ,  H05K3/361 ,  H05K2201/094 ,  H05K2201/09418 ,  H05K2201/10128 ,  H05K2201/10681

Abstract: A display panel (110) includes a display configured to display an image by receiving a drive signal, and a pad region including first (PG1, PG3) and second (PG2, PG4) pad groups configured to receive the drive signal from an outside and to provide the received drive signal to the display, wherein the first pad group (PG1, PG3) includes a plurality of first pads extending along a plurality of first imaginary lines (L4), the first imaginary lines being tilted at a predetermined angle with respect to a reference line (RL), wherein the second pad group (PG2, PG4) includes a plurality of second pads extending along a plurality of second imaginary lines (L3), the second imaginary lines being tilted at a predetermined angle with respect to the reference line (RL), and wherein the plurality of first imaginary lines converges into a first point (P1, P3) and the plurality of second imaginary lines converges into a second point (P2, P4), the first and second points being located at different positions.

Abstract translation: 显示面板（110）包括被配置为通过接收驱动信号来显示图像的显示器和包括被配置为从外部接收驱动信号的第一（PG1，PG3）和第二（PG2，PG4） 以向所述显示器提供所接收的驱动信号，其中所述第一焊盘组（PG1，PG3）包括沿着多个第一假想线（L4）延伸的多个第一焊盘，所述第一假想线相对于 参考线（RL），其中所述第二焊盘组（PG2，PG4）包括沿着多个第二假想线（L3）延伸的多个第二焊盘，所述第二假想线相对于所述第二假想线倾斜预定角度 参考线（RL），并且其中所述多个第一假想线收敛到第一点（P1，P3），并且所述多个第二假想线收敛到第二点（P2，P4），所述第一和第二点位于 不同的posi 蒸发散。

公开(公告)号：EP2414801A1

公开(公告)日：2012-02-08

申请号：EP10759186.9

申请日：2010-03-11

Applicant: Megica Corporation

Inventor： LIN, Mou-Shiung ,  LEE, Jin-Yuan ,  LO, Hsin-Jung ,  YANG, Ping-Jung ,  LIU, Te-Sheng

IPC: G01L7/00 ,  G06F19/00

CPC classification number: G06F1/16 ,  G11C5/147 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/60 ,  H01L23/66 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6666 ,  H01L2224/02166 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02321 ,  H01L2224/0233 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/0237 ,  H01L2224/02371 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/0556 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/11 ,  H01L2224/11009 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/1191 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/1302 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13169 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13311 ,  H01L2224/13609 ,  H01L2224/1403 ,  H01L2224/1411 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/32105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48111 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/4918 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/81895 ,  H01L2224/81903 ,  H01L2224/83101 ,  H01L2224/83104 ,  H01L2224/83851 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/92125 ,  H01L2224/92127 ,  H01L2224/92147 ,  H01L2224/92225 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01059 ,  H01L2924/01068 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48869 ,  H01L2224/48744 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/0361 ,  H01L2924/0665 ,  H01L2224/81 ,  H01L2224/83 ,  H01L24/78 ,  H01L2224/85 ,  H01L21/56 ,  H01L21/78 ,  H01L2924/0635 ,  H01L2924/07025 ,  H01L21/304 ,  H01L21/76898 ,  H01L2224/0231

Abstract: Integrated circuit chips and chip packages are disclosed that include an over-passivation scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the integrated circuit chip using a top post-passivation technology and a bottom structure technology. The integrated circuit chips can be connected to an external circuit or structure, such as ball-grid-array (BGA) substrate, printed circuit board, semiconductor chip, metal substrate, glass substrate or ceramic substrate, through the over-passivation scheme or the bottom scheme. Related fabrication techniques are described.

公开(公告)号：EP1786034B1

公开(公告)日：2011-02-02

申请号：EP06023025.7

申请日：2006-11-06

Applicant: Semikron Elektronik GmbH & Co. KG Patentabteilung

Inventor： Göbl, Christian ,  Augustin, Karlheinz

IPC: H01L23/495 ,  H01L23/538 ,  H01L21/60 ,  H01L23/482

CPC classification number: H05K3/4007 ,  H01L23/49833 ,  H01L23/4985 ,  H01L23/5385 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L25/072 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/19107 ,  H01L2924/20757 ,  H05K1/0265 ,  H05K1/0393 ,  H05K1/09 ,  H05K3/4046 ,  H05K2201/0352 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/10166 ,  H05K2203/049 ,  H01L2924/00

公开(公告)号：EP1953819A4

公开(公告)日：2010-09-29

申请号：EP06832536

申请日：2006-11-13

Applicant: NEC CORP

Inventor： MIKAMI NOBUHIRO ,  WATANABE SHINJI ,  SATO JUNYA ,  SAWADA ATSUMASA

IPC: H01L23/498 ,  H01L23/12

CPC classification number: H01L23/4985 ,  H01L23/49816 ,  H01L24/50 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511

公开(公告)号：EP2219213A2

公开(公告)日：2010-08-18

申请号：EP09016022.7

申请日：2009-12-24

Applicant: SEMIKRON Elektronik GmbH & Co. KG

Inventor： Braml, Heiko, Dr. ,  Fey, Tobias, Dr. ,  Göbl, Christian ,  Sagebaum, Ulrich

IPC: H01L21/56 ,  H01L23/31

CPC classification number: H01L23/3142 ,  H01L21/563 ,  H01L24/50 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2924/12044 ,  H01L2924/00012

Abstract: Die Erfindung betrifft eine Halbleiteranordnung, insbesondere Leistungshalbleiteranordnung, bei der ein eine mit Kontakten (10) versehene Oberseite aufweisender Halbleiter (2, 4, 11, 12) mit einer aus einem Folienverbund (7, 8, 9) gebildeten elektrischen Verbindungseinrichtung (6) verbunden ist, wobei zwischen der Verbindungseinrichtung (6) und der Oberseite des Halbleiters (2, 4, 11, 12) eine Unterfüllung (14) vorgesehen ist. Zur Verbesserung der Haltbarkeit der Unterfüllung wird erfindungsgemäß vorgeschlagen, dass die Unterfüllung (14) eine aus einem präkeramischen Polymer gebildete Matrix aufweist.

Abstract translation: 半导体装置具有设置有具有半导体的触点（10）的上侧，该触点与由复合膜形成的电连接装置（6）连接。 底部填充物（14）具有由前陶瓷聚合物形成的基体。 陶瓷材料选自氮化硼，碳化硅，氮化硅粉末，氮化铝，滑石和堇青石。 该聚合物由聚硅氧烷，聚硅氮烷和聚碳硅烷制成。

公开(公告)号：EP1956647A1

公开(公告)日：2008-08-13

申请号：EP08000989.7

申请日：2008-01-19

Applicant: SEMIKRON Elektronik GmbH & Co. KG

Inventor： Beckedahl, Peter ,  Braml, Heiko ,  Göbl, Christian ,  Heilbronner, Heinrich, Dr.

IPC: H01L21/60

CPC classification number: H01L23/296 ,  H01L24/33 ,  H01L24/37 ,  H01L24/38 ,  H01L24/40 ,  H01L24/41 ,  H01L24/50 ,  H01L24/83 ,  H01L24/84 ,  H01L25/072 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/40225 ,  H01L2224/83201 ,  H01L2224/83209 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8484 ,  H01L2224/8584 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01058 ,  H01L2924/01068 ,  H01L2924/00014

Abstract: Die Erfindung beschreibt eine Schaltungsanordnung mit einem Substrat, auf einer Hauptfläche dieses Substrats angeordneten Leiterbahnen, mindestens einem mit seiner ersten Hauptfläche auf einer ersten Leiterbahn angeordnetem Halbleiterbauelement, einer elektrisch leitfähigen Verbindungseinrichtung zu mindestens einer Kontaktfläche der zweiten Hauptfläche des Halbleiterbauelement. Hierbei ist die Verbindung des Halbleiterbauelements mit der ersten Leiterbahn und / oder der Verbindungseinrichtung als Drucksinterverbindung ausgebildet und zwischen der Verbindungseinrichtung und einem zugeordneten Rand des Halbleiterbauelements ein Isolierstoff angeordnet.

Abstract translation: 本发明描述了与设置在该基板导体轨迹的主表面，至少一个设置在其第一主表面的第一导体轨道半导体器件上，导电的连接装置到所述半导体器件的所述第二主表面的至少一个接触表面的基底的电路布置。 这里，半导体元件的与所述第一导体轨道和/或所述连接装置的连接被构造为压力烧结连接和设置在所述绝缘材料，连接装置和半导体装置的所分配的边缘之间。

公开(公告)号：EP1953819A1

公开(公告)日：2008-08-06

申请号：EP06832536.4

申请日：2006-11-13

Applicant: NEC Corporation

Inventor： MIKAMI, Nobuhiro ,  WATANABE, Shinji ,  SATO, Junya ,  SAWADA, Atsumasa

IPC: H01L23/12

CPC classification number: H01L23/4985 ,  H01L23/49816 ,  H01L24/50 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511

Abstract: Even when a substrate on which a semiconductor package has been mounted is made curved, stress upon electrical connections is mitigated, thereby eliminating faulty connections and improving connection reliability. A semiconductor chip (10) has electrodes (11) on a second face (10b) thereof. Support blocks (20), capable of bending and flexing, are placed at two locations on a peripheral edge of a first face (10a) of the semiconductor chip (10). An interposer (30) is placed so as to span the support blocks with the support blocks interposed between itself and the semiconductor chip (10), and has a wiring pattern in a flexible resin film. Two end portions of the interposer are folded back onto the side of the second face (10b) of the semiconductor chip (10), and the wiring pattern thereof is electrically connected to the electrodes (11) of the semiconductor chip (10).

Abstract translation: 即使安装有半导体封装的基板弯曲，电连接上的应力减轻，从而消除了连接错误，提高了连接可靠性。 半导体芯片（10）在其第二面（10b）上具有电极（11）。 能够弯曲和弯曲的支撑块（20）被放置在半导体芯片（10）的第一面（10a）的周边边缘上的两个位置处。 插入件（30）被放置成跨越支撑块，其中支撑块插入其自身和半导体芯片（10）之间，并且在柔性树脂膜中具有布线图案。 插入器的两端部被折回到半导体芯片（10）的第二面（10b）的一侧，并且其布线图形电连接到半导体芯片（10）的电极（11）。

公开(公告)号：EP1786034A2

公开(公告)日：2007-05-16

申请号：EP06023025.7

申请日：2006-11-06

Applicant: Semikron Elektronik GmbH & Co. KG Patentabteilung

Inventor： Göbl, Christian ,  Augustin, Karlheinz

IPC: H01L23/495

CPC classification number: H05K3/4007 ,  H01L23/49833 ,  H01L23/4985 ,  H01L23/5385 ,  H01L23/5387 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L25/072 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/19107 ,  H01L2924/20757 ,  H05K1/0265 ,  H05K1/0393 ,  H05K1/09 ,  H05K3/4046 ,  H05K2201/0352 ,  H05K2201/0367 ,  H05K2201/09736 ,  H05K2201/10166 ,  H05K2203/049 ,  H01L2924/00

Abstract: Es wird ein Leistungshalbleitermodul (10) mit einem Substrat (12), einer Verbundfolie (14) und mindestens einem Leistungshalbleiterbauelement (16) beschrieben, das zwischen dem Substrat (12) und der Verbundfolie (14) vorgesehen ist. Die Verbundfolie (14) weist eine dünne schaltstrukturierte Logikmetallschicht (26) und eine im Vergleich hierzu dicke schaltstrukturierte Leistungsmetallschicht (28) sowie zwischen diesen eine dünne elektrisch isolierende Kunststofffolie (24) auf. Die Verbundfolie (14) ist mit Kontaktnoppen (30) ausgebildet, die zur Kontaktierung mit dem mindestens einen Leistungshalbleiterbauelement (16) dienen. Zwischen der Logikmetallschicht (26) und der Leistungsmetallschicht (28) sind Durchkontaktierungen (32) vorgesehen. Die Kunststofffolie (24) ist im Bereich der jeweiligen Durchkontaktierung (32) an einem von der Logikmetallschicht (26) freien Bereich (36) mit einer Aussparung (34) ausgebildet. Ein Stück (38) eines flexiblen Dünndrahtes (40) erstreckt sich durch den freien Bereich (36) der Logikmetallschicht und durch die Aussparung (34) in der Kunststofffolie (24) hindurch und ist mit der Logikmetallschicht (26) und mit der Leistungsmetallschicht (28) durch Bondstellen (44, 48) kontaktiert.

Abstract translation: 功率半导体模块（10）包括衬底; 功率半导体元件; 以及具有逻辑金属层（26），功率金属层（28），绝缘膜和接触凸点的复合膜（14）。 馈通孔（32）设置在逻辑和功率金属层之间。 塑料膜在每个孔的区域中限定了一个没有逻辑金属层的凹槽。 细线的柔性段延伸穿过没有逻辑金属层并通过凹槽的区域，并且在每个逻辑金属层和功率金属层处键合到结合位置。

公开(公告)号：EP1353374B1

公开(公告)日：2007-01-24

申请号：EP03076966.5

申请日：1991-09-24

Applicant: TESSERA, INC.

Inventor： Khandros, Igor Y. ,  Distefano, Thomas H.

IPC: H01L23/13 ,  H01L23/498

CPC classification number: H01L21/6836 ,  H01L21/822 ,  H01L22/32 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3164 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/49861 ,  H01L24/27 ,  H01L24/48 ,  H01L24/50 ,  H01L24/81 ,  H01L25/16 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K2201/10378 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599