公开(公告)号：EP1480291B1

公开(公告)日：2010-02-10

申请号：EP04011712.9

申请日：2004-05-18

Applicant: Muck, Siegfried

Inventor： Muck, Siegfried ,  König, Sibyll ,  Kleikemper, Vera

IPC: H01R12/04

CPC classification number: H01R12/62 ,  H01R43/0221 ,  H01R43/0263 ,  H05K3/363 ,  H05K3/4007 ,  H05K2201/091 ,  H05K2201/09172 ,  H05K2203/167

公开(公告)号：EP2117082A1

公开(公告)日：2009-11-11

申请号：EP06822495.5

申请日：2006-10-27

Applicant: Asahi Denka Kenkyusho Co., Ltd.

Inventor： MIZOGUCHI, Masanori

IPC: H01R12/04 ,  H01R12/32 ,  H05K1/14

CPC classification number: H01R12/592 ,  H01R12/58 ,  H01R12/613 ,  H01R12/62 ,  H01R12/777 ,  H01R12/778 ,  H01R12/78 ,  H01R12/79 ,  H05K1/118 ,  H05K3/326 ,  H05K3/365 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09063 ,  H05K2201/091 ,  H05K2201/0969 ,  H05K2201/1059 ,  H05K2201/209

Abstract: An electrical connection structure allowing reduction in height and easy disassembly, wherein a first connecting member comprises a flexible substrate comprising a flexible insulating film, at least one conductive pad formed on at least one side thereof, a conductive circuit pattern extending from the rim of the pad, a through-hole formed through the thickness thereof at a planar position within the pad, and a small aperture formed at a planar position within the pad and communicating with the through-hole, and a second connecting member comprises a conductive projection formed at least one side thereof and electrically connected with a conductive circuit pattern formed inside or on the second connecting member, where the electrical connection is formed in the manner such that the conductive projection is inserted in the through-hole, through the small aperture, and mechanically contacts the pad.

Abstract translation: 一种电连接结构，其允许降低高度并易于拆卸，其中第一连接构件包括柔性基底，该柔性基底包括柔性绝缘膜，至少一个导电垫在至少一个侧面上形成，导电电路图案从 衬垫，在衬垫内的平面位置处形成通过其厚度的通孔，以及形成在衬垫内的平面位置并与通孔连通的小孔，第二连接构件包括形成在 至少一个侧面，并与形成在第二连接构件内部或第二连接构件上的导电电路图形电连接，其中电连接形成为使得导电突起通过小孔插入到通孔中，并机械地 联系垫

公开(公告)号：EP2100327A1

公开(公告)日：2009-09-16

申请号：EP06829212.7

申请日：2006-11-24

Applicant: Fraunhofer-Gesellschaft zur Förderung der Angewandten Forschung e.V.

Inventor： MARENCO, Norman

IPC: H01L21/60 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L21/56 ,  H01L23/49855 ,  H01L24/81 ,  H01L2224/16 ,  H01L2224/81191 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/19043 ,  H01L2924/3011 ,  H05K3/12 ,  H05K3/326 ,  H05K3/386 ,  H05K2201/091 ,  H05K2201/10674 ,  H05K2203/0278 ,  Y10T156/10 ,  H01L2924/00 ,  H01L2924/00015

Abstract: The invention relates to an electronic, in particular microelectronic, functional group and to a method for its production. The method according to the invention includes the following steps: a) coating of a mount (5a) with a non-conductive adhesive (4a); b) application of a conductor structure (3) to a subarea of the adhesive layer (4a); c) arrangement of an electronic component (1) with at least one external electrical connecting contact (2) on the adhesive layer (4a) and on the conductor structure (3), with the at least one connecting contact (2) of the electronic component (1) being brought directly into contact with the conductor structure (3), and with a part of the outer casing of the component (1) being brought directly into contact with the adhesive layer (4a). The method according to the invention allows electronic, in particular microelectronic, functional groups to be produced with care, quickly and in particular at low cost.

公开(公告)号：EP2081418A2

公开(公告)日：2009-07-22

申请号：EP09000584.4

申请日：2009-01-16

Applicant: Harris Corporation

Inventor： Rendek, Louis Joseph Jr. ,  Shacklette, Lawrence Wayne ,  Marvin, Philip Anthony

IPC: H05K1/00

CPC classification number: H05K3/0014 ,  H01H2219/01 ,  H05K1/0284 ,  H05K1/185 ,  H05K3/4611 ,  H05K2201/0141 ,  H05K2201/091 ,  H05K2203/1105 ,  H05K2203/302

Abstract: A method is for making a non-planar three-dimensional (3D) multilayered circuit board. The method may include forming a stacked arrangement including at least one pair of liquid crystal polymer (LCP) layers with a bonding layer therebetween. The stacked arrangement may further include at least one electrically conductive pattern layer on at least one of the LCP layers. The method may further include heating and applying pressure to the stacked arrangement to shape the stacked arrangement into a non-planar 3D shape and concurrently causing the bonding layer to bond together the adjacent LCP layers of the stacked arrangement to thereby form the non-planar 3D multi-layered circuit board.

Abstract translation: 一种制造非平面三维（3D）多层电路板的方法。 该方法可以包括形成包括至少一对液晶聚合物（LCP）层的堆叠布置，其间具有结合层。 所述堆叠布置还可包括至少一个LCP层上的至少一个导电图案层。 该方法还可以包括加热和施加压力到堆叠布置以将堆叠布置形成为非平面3D形状并且同时使结合层将堆叠布置的相邻LCP层结合在一起，从而形成非平面3D 多层电路板。

公开(公告)号：EP1612047B1

公开(公告)日：2009-04-01

申请号：EP05254027.5

申请日：2005-06-28

Applicant: Brother Kogyo Kabushiki Kaisha

Inventor： Nakayama, Koji c/o Brother Kogyo Kabushiki Kaisha

IPC: B41J2/14 ,  H05K3/40 ,  B41J2/16

CPC classification number: H01R12/62 ,  B41J2/14209 ,  B41J2/1609 ,  B41J2/1623 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1634 ,  B41J2002/14217 ,  B41J2002/14225 ,  B41J2002/14306 ,  B41J2002/14459 ,  B41J2002/14491 ,  H05K1/0393 ,  H05K3/363 ,  H05K3/4007 ,  H05K2201/0191 ,  H05K2201/091 ,  H05K2203/0195 ,  Y10T29/49002 ,  Y10T29/49021 ,  Y10T29/49147 ,  Y10T29/49151

公开(公告)号：EP1450439A3

公开(公告)日：2008-12-10

申请号：EP04002351.7

申请日：2004-02-03

Applicant: Tyco Electronics AMP GmbH

Inventor： Reissmann, Tobias

IPC: H01R4/48

CPC classification number: H01R12/58 ,  H01R4/4818 ,  H01R12/718 ,  H05K1/118 ,  H05K3/326 ,  H05K2201/09081 ,  H05K2201/091 ,  H05K2201/09954 ,  H05K2201/1059

Abstract: Die Erfindung beschreibt eine Kontaktanordnung zur Kontaktierung eines Kontaktstiftes, wobei als Kontaktelement zwei sich gegenüberstehende Reihen von Kontaktzungen verwendet werden.
Die Kontaktzungen einer Reihe erstrecken sich bis in Zwischenräume von Kontaktzungen der gegenüberliegenden Reihe.
Durch die Verwendung von Kontaktzungen, die sich über eine Mittenachse des Kontaktelementes erstrecken, ist eine elektrische Kontaktierung eines Kontaktstiftes mit guter Leitfähigkeit möglich, obwohl dessen Position seitlich aus der Mittenachse verschoben ist. Vorzugsweise stehen sich Reihen von unterschiedlich langen Kontaktzungen gegenüber, wobei einer kurzen Kontaktzunge einer ersten Reihe eine lange Kontaktzunge einer zweiten Reihe zugeordnet ist. Vorzugsweise sind zwei identisch aufgebaute Kontaktelemente übereinander angeordnet, wobei jeweils eine lange und eine kurze Kontaktzunge übereinander angeordnet sind. Die kurzen Kontaktzungen dienen zur Erhöhung der Anpresskraft der langen Kontaktzungen. Auf diese Weise kann eine verbesserte elektrische Kontaktierung von Kontaktstiften mit einer flexiblen Leiterplatte, insbesondere von elektrischen Relais mit einer flexiblen Leiterplatte erreicht werden.

公开(公告)号：EP1939006A2

公开(公告)日：2008-07-02

申请号：EP07123217.7

申请日：2007-12-14

Applicant: Palo Alto Research Center Incorporated

Inventor： Debruyker, Dirk ,  Lu, Jeng Ping ,  Daniel, Jurgen H. ,  Chow, Eugene M. ,  Volkel, Armin R.

IPC: B41M1/04 ,  B41M1/06 ,  B41M1/10

CPC classification number: B41M1/10 ,  B41M1/04 ,  B41M1/06 ,  H05K3/207 ,  H05K2201/091 ,  H05K2203/105

Abstract: A printing surface includes a substrate (10) having latching electrodes (14a, 14b) on a first surface, a spacer layer on the first surface of the substrate, the spacer layer (24) patterned to form wells such that the latching electrodes reside in the wells, a deformable membrane (18), the membrane having conductive regions, on the spacer layer (24) to enclose the wells, each enclosed well and its associated region of the membrane forming a pixel membrane, and actuation circuitry to actuate the electrodes to cause selected ones of the pixel membranes to remain in a deflected state when the pixel membranes receive an impulse to return to an undeflected state.

Abstract translation: 打印表面包括在第一表面上具有闩锁电极（14a，14b）的衬底（10），衬底的第一表面上的间隔层，所述间隔层（24）被图案化以形成阱，使得锁定电极驻留在 所述孔，所述隔膜具有导电区域，所述隔膜具有导电区域，位于所述间隔层上以封闭所述孔，每个封闭的阱以及形成像素膜的所述膜的相关区域以及用于致动所述电极的致动电路 当像素膜接收脉冲以返回到未偏转状态时，使选定的像素膜保持在偏转状态。

公开(公告)号：EP1599079A1

公开(公告)日：2005-11-23

申请号：EP05703984.4

申请日：2005-01-21

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： NISHII, Toshihiro

IPC: H05K3/46 ,  H05K1/11 ,  H05K3/40

CPC classification number: H05K3/4069 ,  H05K3/382 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2201/0382 ,  H05K2201/091 ,  H05K2203/1461 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T428/24917

Abstract: A conductive portion is formed in a hole formed in a material sheet. A metal foil is placed on a surface of the material sheet to provide a laminated sheet. The laminated sheet is heated and pressed to provide a circuit-forming board. The metal foil includes a pressure absorption portion and a hard portion adjacent to the pressure absorption portion. The pressure absorption portion has a thickness changing according to a pressure applied thereto. The circuit-forming board provided by this method provides a high-density circuit board of high quality having reliable electrical connection.

Abstract translation: 导电部分形成在材料片中形成的孔中。 将金属箔放置在材料片的表面上以提供层压片。 层压片被加热和压制以提供电路形成板。 金属箔包括压力吸收部分和与压力吸收部分相邻的硬质部分。 压力吸收部分的厚度根据施加于其上的压力而变化。 由该方法提供的电路形成板提供具有可靠电连接的高质量高密度电路板。

公开(公告)号：EP0963021B1

公开(公告)日：2005-07-27

申请号：EP98957178.1

申请日：1998-12-04

Applicant: The Furukawa Electric Co., Ltd.

Inventor： MIYAJIMA, Kazuo ,  HASEGAWA, Shin ,  SAWAKI, Yoshiaki

IPC: H02G3/16 ,  H01R9/22 ,  H01R43/16

CPC classification number: H02G3/16 ,  H02G3/081 ,  H02G5/005 ,  H05K3/202 ,  H05K3/326 ,  H05K2201/091 ,  H05K2201/10946 ,  H05K2201/2072 ,  Y10S439/949 ,  Y10T29/49117 ,  Y10T29/49121 ,  Y10T29/49128 ,  Y10T29/49151 ,  Y10T29/49153 ,  Y10T29/49833 ,  Y10T29/49845 ,  Y10T29/49908

Abstract: A bus bar wiring board comprising a bus bar pattern for electric wiring formed in a predetermined shape, and a bus bar piece formed separately from the bus bar pattern and electrically connected and secured to the bus bar pattern. A method of producing the bus bar wiring board comprising a bus bar pattern punching step for punching a bus bar pattern for electric wiring that is laid out in a predetermined shape out of an electrically conducting metal plate, a bus bar piece punching step for punching a bus bar piece laid out in a predetermined shape in a remaining space on the electrically conducting metal plate, and a connection step for electrically connecting and securing together the bus bar pattern punched in the bus bar pattern punching step and the bus bar pieve punched in the bus bar piece punching step, whereby reducing the waste in the electrically conducting metal plate out of which the bus bar patterns are punched and decreasing the cost of production or the cost of a product.

公开(公告)号：EP0665609B1

公开(公告)日：2003-10-29

申请号：EP95100939.8

申请日：1995-01-25

Applicant: MOLEX INCORPORATED

Inventor： Fuerst, Robert M. ,  Krehbiel, Fred Love

IPC: H01R12/04 ,  H01R12/08 ,  H05K3/32 ,  H05K3/40

CPC classification number: H05K3/326 ,  H05K1/118 ,  H05K3/306 ,  H05K3/4007 ,  H05K2201/091 ,  H05K2201/1059 ,  H05K2201/10977