公开(公告)号：EP0508305A2

公开(公告)日：1992-10-14

申请号：EP92105662.8

申请日：1992-04-02

Applicant: MOLEX INCORPORATED

Inventor： Ponn, Timothy R.

IPC: H05K3/00

CPC classification number: H05K1/189 ,  H01R13/719 ,  H05K1/182 ,  H05K3/326 ,  H05K2201/09081 ,  H05K2201/10189 ,  H05K2201/10492 ,  H05K2201/1053 ,  H05K2201/1059 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/4913 ,  Y10T29/49153

Abstract: A method for mounting electronic components, such as capacitor, to a flat flexible insulating substrate (16) having conductive material thereon. In one form of the invention, an electronic component (14) is attached to a given area of the substrate with one conductive side (14b) of the electronic component in electrical connection with the conductive material on the substrate. A slot (20) is formed in the substrate substantially about the electronic component but less than 360° thereabout to define a tongue (22a), including the electronic component, and an integral hinge portion (24) of the substrate. The tongue is bent about the integral hinge portion to move the tongue out of the plane of the substrate and thereby move the electronic component therewith into a desired position for connection of an opposite conductive side of the electronic component to an appropriate terminal. In another form of the invention, a closed or 360 ° slot (56) is formed in the substrate (50). One conductive (46) side of the electronic component (14) is in electrical connection with the conductive material on the substrate (58) within the closed slot, and the other conductive side (14) of the electronic component is in electrical connection with the conductive material on the substrate outside the closed slot. A terminal (62) is electrically connected to the conductive material on the substrate inside the closed slot.

Abstract translation: 一种用于将诸如电容器的电子部件安装到其上具有导电材料的扁平柔性绝缘基板（16）上的方法。 在本发明的一种形式中，电子部件（14）被附接到基板的给定区域，其中电子部件的一个导电侧（14b）与基板上的导电材料电连接。 基板上基本上围绕电子部件形成狭槽（20），但在其周围小于360度，以限定包括电子部件的舌部（22a）和基板的整体铰链部分（24）。 舌部围绕整体铰链部分弯曲，以将舌片移出基板的平面，从而将其中的电子部件移动到期望的位置，以将电子部件的相对的导电侧连接到适当的端子。 在本发明的另一种形式中，在衬底（50）中形成一个封闭的或360°的槽（56）。 电子部件（14）的一个导电（46）侧与闭合槽内的基板（58）上的导电材料电连接，并且电子部件的另一导电侧（14）与 封闭槽外的基板上的导电材料。 端子（62）电连接到封闭槽内的基板上的导电材料。

公开(公告)号：EP0468139A3

公开(公告)日：1992-03-04

申请号：EP91105327.0

申请日：1991-04-04

Applicant: Mii, Adam

Inventor： Mii, Adam

IPC: H01L33/00 ,  G09F9/33 ,  H01L23/495

CPC classification number: H01L33/62 ,  H01L25/13 ,  H01L2924/0002 ,  H05K1/18 ,  H05K2201/10106 ,  H05K2201/1053 ,  H05K2201/10757 ,  H05K2201/10924 ,  H01L2924/00

Abstract: A semiconductor element string has a number of semiconductor elements (1), each of which has the first and second leads (14 and 15) mounted on a transverse plate (2). The first leads (14) are cut off from the transverse plate (2), when the semiconductor element string is to be mounted on the printed circuit board (3). The second leads (15) connected to the transverse plate (2) serve as the ground lines for the respective semiconductor elements by bending two distal ends of the transverse plate (2) to be mounted on the printed circuit board (3). A linking piece (13) is provided crossing over the middle portions of the first and second leads (14 and 15) so as to make the whole construction more stable. The second leads (15) are bent into a S-shaped structure. Each second lead (15) and its corresponding first lead (14) are located on a first vertical plane which intersects with a second vertical plane (X-Z) passing through a common longitudinal axis of the semiconductor element string by an angle.

公开(公告)号：EP0315792A3

公开(公告)日：1991-12-18

申请号：EP88117121.9

申请日：1988-10-14

Applicant: LORAL AEROSPACE CORPORATION

Inventor： Chall, Louis Edmond, Jr.

IPC: H01L23/48 ,  H05K7/20 ,  H01L23/52

CPC classification number: H01L23/52 ,  G01R31/318505 ,  G11C29/006 ,  H01L23/13 ,  H01L23/473 ,  H01L23/5385 ,  H01L2924/0002 ,  H01L2924/15162 ,  H01L2924/3011 ,  H05K1/0286 ,  H05K1/142 ,  H05K3/3442 ,  H05K3/403 ,  H05K7/20545 ,  H05K2201/09181 ,  H05K2201/09418 ,  H05K2201/1053 ,  H05K2201/10727 ,  Y02P70/613 ,  H01L2924/00

Abstract: A novel packaging system for VLSI circuits allows low-cost construction and maintenance of complex high density high-­performance devices with low power requirements. The devices can be individually created by software means from a small selection of standardizable IC chips by disposing a plurality of chips in leadless chip carriers in a mosaic on a substrate, and configuring them by software to selectively communicate with other chips of the mosaic or even to individually change their operating function. The immediate juxtaposition of the chip carries in the mosaic eliminates transmission line data skew, and also allows considerable savings in chip space and power requirements by dispensing with interconnection drivers, receivers and bonding pads. The chip carrier mosaics may be assembled into modules suitable for plug-in connection to an interconnecting backplane to create even larger devices, and individual modules can be dynamically tested in their high-performance mode by configuring one or more modules as test modules and either plugging them into modules to be tested or making them a permanent part of the device's module array.

公开(公告)号：EP0391926A1

公开(公告)日：1990-10-17

申请号：EP88909138.0

申请日：1988-09-23

Applicant: CARMIS ENTERPRISES S.A.

Inventor： FRIMAN, Alf

IPC: H05K9 ,  H01L23 ,  H05K1

CPC classification number: H01L23/585 ,  H01L23/642 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K2201/1053 ,  H05K2201/10689 ,  H01L2924/00

Abstract: La présente invention se rapporte à un agencement servant à désactiver électriquement des circuits intégrés au moyen de condensateurs de désactivation. Selon la présente invention, on obtient un moyen particulièrement simple et efficace de désactivation électrique de tels circuits en montant, par exemple par collage, une feuille de métal (2) sur le circuit. La dérivation à la terre (3) du circuit est connectée au bord de la feuille via un conducteur court et la sortie de signal (4) et le conducteur d'alimentation (5) sont chacun connectés directement au bord de la feuille via un condensateur à puce soudée respectif (7, 8).

公开(公告)号：EP0315905A2

公开(公告)日：1989-05-17

申请号：EP88118370.1

申请日：1988-11-04

Applicant: Müller, Werner

Inventor： Müller, Werner

IPC: H01L33/00 ,  H01L25/04 ,  H05K1/18

CPC classification number: H01L33/62 ,  F21W2111/00 ,  H01L25/0753 ,  H01L25/167 ,  H01L2224/48091 ,  H01L2224/48227 ,  H05K1/0306 ,  H05K1/18 ,  H05K3/284 ,  H05K2201/10022 ,  H05K2201/10106 ,  H05K2201/10113 ,  H05K2201/1053 ,  H05K2203/1316 ,  H01L2924/00014

Abstract: Es wird ein elektronisches Leuchtelement beschrieben umfassend einen Glühlampensockel (9), ein Übergangselement (7), eine Leiterplatte (1), welche keramisches Material enthält und wenigstens einen Leuchtdiodenchip (6), welcher auf der Leiterplatte (1) innerhalb einer Epoxiharzmasse (3) angeordnet ist.
Es wird ein Verfahren zur Herstellung eines derartigen Leuchtelementes beschrieben. Das Verfahren beruht darauf, daß duch ein modifiziertes, stark thixotropes Epoxiharz das Umhüllen der Leuchtdiode (6) auf der Leiterplatte (1) ohne formgebendes Werkzeug ermöglicht wird.

Abstract translation: 一种电致发光器件，包括白炽灯基座，适配器装置，含陶瓷材料的导体板和至少一个安装在环氧树脂材料内的导体板上的发光二极管芯片。 电致发光器件是值得注意的，因为它可以用于通常形成人与机器之间的接口的可照明指令装置和信号灯中，作为小型白炽灯的替代品，而不具有后者的已知缺点， 这些都是常用的。 制造这种电致发光器件的方法是基于以下事实：改性的强触发性环氧树脂使得可以在不使用成形工具的情况下将发光二极管封装在导体板上。

公开(公告)号：EP2289075B1

公开(公告)日：2017-09-06

申请号：EP09749929.7

申请日：2009-05-22

Applicant: Epcos AG

Inventor： FEICHTINGER, Thomas ,  ENGEL, Günter ,  PECINA, Axel

IPC: H05K1/02 ,  H05K1/18 ,  H01C7/10 ,  H01C1/084 ,  H01C7/12

CPC classification number: H01C1/084 ,  H01C7/10 ,  H01C7/12 ,  H01L2224/48091 ,  H05K1/0203 ,  H05K1/181 ,  H05K2201/10022 ,  H05K2201/10106 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/00014

公开(公告)号：EP3128549A1

公开(公告)日：2017-02-08

申请号：EP15773072.2

申请日：2015-03-12

Applicant: Shin-Etsu Chemical Co., Ltd.

Inventor： TAKEMURA, Katsuya ,  SOGA, Kyoko ,  ASAI, Satoshi ,  KONDO, Kazunori ,  SUGO, Michihiro ,  KATO, Hideto

IPC: H01L23/12 ,  C25D5/02 ,  C25D7/00 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L23/522 ,  H01L25/10 ,  H01L25/11 ,  H01L25/18 ,  H05K1/11 ,  H05K3/28 ,  H05K3/40

CPC classification number: H01L23/12 ,  B23K1/0016 ,  B29C70/78 ,  B29C70/882 ,  B29K2063/00 ,  B29K2083/00 ,  B29K2105/20 ,  B29K2995/0005 ,  B29L2031/3493 ,  C23C14/042 ,  C23C14/34 ,  C23C14/58 ,  C25D3/60 ,  C25D5/022 ,  C25D5/48 ,  C25D5/505 ,  C25D5/54 ,  C25D7/00 ,  C25D7/123 ,  H01L21/02282 ,  H01L21/4857 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/82005 ,  H01L2224/92244 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  H01L2224/19 ,  H01L2224/83005

Abstract: The present invention is a semiconductor apparatus including a semiconductor device, an on-semiconductor-device metal pad and a metal interconnect each electrically connected to the semiconductor device, a through electrode and a solder bump each electrically connected to the metal interconnect, a first insulating layer on which the semiconductor device is placed, a second insulating layer formed on the semiconductor device, a third insulating layer formed on the second insulating layer, wherein the metal interconnect is electrically connected to the semiconductor device via the on-semiconductor-device metal pad at an upper surface of the second insulating layer, penetrates the second insulating layer from its upper surface, and is electrically connected to the through electrode at an lower surface of the second insulating layer, and an under-semiconductor-device metal interconnect is disposed between the first insulating layer and the semiconductor device, and the under-semiconductor-device metal interconnect is electrically connected to the metal interconnect at the lower ' surface of the second insulating layer. This semiconductor apparatus can be easily placed on a circuit board and stacked, and can reduce its warpage even with dense metal interconnects.

Abstract translation: 本发明是一种半导体装置，导通半导体器件的金属焊盘和金属互连的每个电连接到所述半导体器件中，通过电极和焊料凸块的每个电连接到所述金属互连，第一绝缘的半导体装置 在其上的半导体器件被置于层，形成在半导体器件上形成第二绝缘层，形成在第二绝缘层上的第三绝缘层，worin金属互连电连接到所述半导体器件经由所述上半导体器件的金属垫 在在所述第二绝缘层的上表面上，贯穿其上表面上的第二绝缘层，以及电连接到所述贯通电极在在所述第二绝缘层的下表面上，并在下半导体器件的金属互连件之间设置 在第一绝缘层和所述半导体器件中，和下半导体的 设备金属互连在所述第二绝缘层的下部“表面电连接至所述金属互连。 该半导体装置可以被容易地放置在电路板上并堆叠，并能减少其翘曲即使致密的金属互连件。

公开(公告)号：EP2624268A4

公开(公告)日：2016-07-20

申请号：EP11748868

申请日：2011-03-22

Applicant: OMRON TATEISI ELECTRONICS CO

Inventor： SHIMIZU RYOJI ,  SATO MAKOTO

IPC: H01G9/00 ,  H01G2/06 ,  H01G2/10 ,  H01G9/28 ,  H05K3/34

CPC classification number: H01G2/06 ,  H01G2/106 ,  H01G9/28 ,  H05K3/3421 ,  H05K2201/10015 ,  H05K2201/10325 ,  H05K2201/1053 ,  Y02P70/613

公开(公告)号：EP3042408A1

公开(公告)日：2016-07-13

申请号：EP14766865.1

申请日：2014-09-04

Applicant: Johnson Controls Technology Company

Inventor： DEKEUSTER, Richard, M. ,  SOLESKI, Edward, J. ,  MACK, Robert, J. ,  HOUCHIN-MILLER, Gary P. ,  CASH, Stephen, D. ,  WINDERS, Lisa, L. ,  JOHNSON, Jack, L.

IPC: H01M2/10 ,  H01M2/12 ,  H01M2/20 ,  H01M10/42 ,  H01M10/48 ,  H05K1/00 ,  H01M2/30 ,  H01M10/613 ,  H01M10/625 ,  H01M10/647 ,  H01M10/6551

CPC classification number: H01M2/22 ,  B60L1/003 ,  B60L1/02 ,  B60L1/14 ,  B60L3/0046 ,  B60L3/12 ,  B60L11/123 ,  B60L11/14 ,  B60L11/1803 ,  B60L11/1851 ,  B60L11/1861 ,  B60L11/1864 ,  B60L11/1874 ,  B60L11/1877 ,  B60L11/1879 ,  B60L15/20 ,  B60L2210/10 ,  B60L2210/40 ,  B60L2240/34 ,  B60L2240/545 ,  B60L2240/547 ,  B60L2240/549 ,  B60L2250/10 ,  B60L2260/26 ,  B60L2270/20 ,  B60R16/03 ,  B60R16/033 ,  G01R31/025 ,  G01R31/362 ,  G01R31/3627 ,  H01H47/325 ,  H01M2/1077 ,  H01M2/1205 ,  H01M2/1211 ,  H01M2/1252 ,  H01M2/20 ,  H01M2/206 ,  H01M2/24 ,  H01M2/305 ,  H01M2/32 ,  H01M2/34 ,  H01M2/342 ,  H01M4/661 ,  H01M4/665 ,  H01M10/04 ,  H01M10/0413 ,  H01M10/058 ,  H01M10/425 ,  H01M10/4257 ,  H01M10/482 ,  H01M10/486 ,  H01M10/6551 ,  H01M2010/4271 ,  H01M2010/4278 ,  H01M2200/103 ,  H01M2220/20 ,  H01M2250/20 ,  H01R12/716 ,  H02H7/18 ,  H02J7/0021 ,  H02J7/0063 ,  H05K1/0262 ,  H05K1/0263 ,  H05K1/18 ,  H05K3/32 ,  H05K2201/10492 ,  H05K2201/1053 ,  H05K2201/10545 ,  Y02T10/6217 ,  Y02T10/645 ,  Y02T10/7005 ,  Y02T10/7011 ,  Y02T10/7016 ,  Y02T10/7022 ,  Y02T10/7044 ,  Y02T10/705 ,  Y02T10/7061 ,  Y02T10/7077 ,  Y02T10/7216 ,  Y02T10/7241 ,  Y02T10/7275 ,  Y10T29/49108 ,  Y10T29/4911 ,  Y10T29/49114

Abstract: A method of manufacturing a battery module for use in a vehicle is presented. The method may include disposing battery cells into a lower housing and disposing a lid assembly over the battery cells. The lid assembly may include a lid and bus bar interconnects disposed on the lid. The method may also include disposing a printed circuit board (PCB) assembly onto the lid assembly and electrically coupling portions of the lid assembly, portions of the PCB assembly, and the battery cells to each other.

Abstract translation: 提供一种母线，其包括包括第一材料的第一端和包括第二材料的第二端和制造方法。 第一端被设计成耦合到电池模块的第一电池单元的端子，并且包括设置在第一端上的第一环，设计成接收和围绕电池模块的第一电池单元的端子。 第二端被设计成耦合到电池模块的第二电池单元的端子，并且包括设置在第二端上的第二套环，其设计成接收和围绕电池模块的第二电池的端子。 电池模块的第一和第二电池彼此相邻。 此外，母线包括电连接和机械耦合第一端和第二端的接头。

公开(公告)号：EP1480236B1

公开(公告)日：2016-06-08

申请号：EP04010108.1

申请日：2004-04-28

Applicant: Marvell World Trade Ltd.

Inventor： Sutardja, Sehat

IPC: H01G4/232 ,  H01G4/30 ,  H05K1/18 ,  H01G4/35 ,  H01G4/40 ,  H05K1/02

CPC classification number: H01G4/232 ,  H01G4/30 ,  H01G4/35 ,  H01G4/40 ,  H05K1/0231 ,  H05K1/0233 ,  H05K2201/10515 ,  H05K2201/1053