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    CURRENT REDISTRIBUTION IN A PRINTED CIRCUIT BOARD
    81.
    发明公开
    CURRENT REDISTRIBUTION IN A PRINTED CIRCUIT BOARD 审中-公开
    STROMUMVERTEILUNG BEI EINER LEITERPLATTE

    公开(公告)号：EP2912928A1

    公开(公告)日：2015-09-02

    申请号：EP13735145.8

    申请日：2013-06-25

    Applicant: Cisco Technology, Inc.

    Inventor： SABAVAT, Goutham ,  MOHAMED, Javid ,  RAMANATHAN, Subramanian ,  SCEARCE, Stephen

    IPC: H05K1/02

    CPC classification number: H05K3/225 ,  G06F17/5036 ,  G06F17/5045 ,  G06F17/5068 ,  H05K1/0224 ,  H05K1/0265 ,  H05K1/0298 ,  H05K2201/093 ,  H05K2201/09681 ,  H05K2201/0969

    Abstract: In one implementation, a multilayered printed circuit board is configured to redirect current distribution. The current may be distributed by steering, blocking, or otherwise manipulating current flows. The multilayered printed circuit board includes at least one power plane layer. The power plane layer does not distribute current evenly. Instead, the power plane layer includes multiple patterns with different resistances. The patterns may include a hatching pattern, a grid pattern, a directional pattern, a slot, a void, or a continuous pattern. The pattern is a predetermined spatial variation such that current flows in a first area differently than current flows in a second area.

    Abstract translation: 在一个实现中，多层印刷电路板被配置为重定向电流分布。 电流可以通过转向，阻塞或以其它方式操纵电流来分配。 多层印刷电路板包括至少一个电源层。 电源层不均匀分布电流。 替代地，功率平面层包括具有不同电阻的多个图案。 图案可以包括阴影图案，网格图案，方向图案，狭缝，空隙或连续图案。 图案是预定的空间变化，使得电流在第一区域中不同于电流在第二区域中流动。

    Printed circuit board
    84.
    发明公开
    Printed circuit board 有权
    印刷电路板

    公开(公告)号：EP2651199A2

    公开(公告)日：2013-10-16

    申请号：EP13162441.3

    申请日：2013-04-05

    Applicant: Canon Kabushiki Kaisha

    Inventor： Murai, Yusuke ,  Hoshi, Sou ,  Yamashita, Nobuaki

    IPC: H05K1/02

    CPC classification number: H05K1/025 ,  H01L2224/16225 ,  H05K1/0225 ,  H05K1/0243 ,  H05K1/181 ,  H05K2201/09263 ,  H05K2201/093 ,  H05K2201/09709

    Abstract: Provided is a printed circuit board 100 capable of increasing an inductance value of a power pattern and a ground pattern while keeping a low electric resistance value of the power pattern and the ground pattern. The printed circuit board includes a printed wiring board 101 including: a power layer 113 having a power pattern 131 formed therein; and a ground layer 112 having a ground pattern 121 formed therein. On the printed wiring board, an LSI 102 as a semiconductor device and an LSI 104 as a power supply member are mounted. The ground pattern has a first ground region R that overlaps the power pattern as viewed from the direction perpendicular to the surface of the printed wiring board. In the first ground region, at least one defect portion 122 is formed. In the first ground region, the defect portion forms a region 121a that is narrower than the power pattern.

    Abstract translation: 提供了一种印刷电路板100，其能够在保持电源图案和接地图案的低电阻值的同时增加电源图案和接地图案的电感值。 印刷电路板包括印刷线路板101，印刷线路板101包括：功率层113，其具有形成在其中的功率图案131; 以及其中形成有接地图案121的接地层112。 在印刷线路板上安装有作为半导体装置的LSI102和作为电源部件的LSI104。 从垂直于印刷线路板表面的方向来看，接地图案具有与电源图案重叠的第一接地区域R. 在第一接地区域中，形成至少一个缺陷部分122。 在第一接地区域中，缺陷部分形成比功率图案窄的区域121a。

    10G XFP COMPLIANT PCB
    87.
    发明公开
    10G XFP COMPLIANT PCB 审中-公开
    10G-XFP-兼容多氯联苯

    公开(公告)号：EP2263429A2

    公开(公告)日：2010-12-22

    申请号：EP09719200.9

    申请日：2009-03-02

    Applicant: Alcatel Lucent

    Inventor： OPREA, Dorin Ionel ,  DRIEDIGER, Steve

    IPC: H05K1/02

    CPC classification number: H05K1/0218 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09618 ,  H05K2201/0969 ,  H05K2201/10121

    Abstract: The present invention is a specially designed PCB (11) thatallows XFP compliant transceiver modules and EMI gaskets to be used in a manner specified in the XFP standard and results in an integrated solution that is compliant with the XFP standard. Various geometric features are incorporated into the PCB to achieve improvements that in combination result in an integrated solution meeting the XFP standard. Some of these improved features include: specific thickness of prepreg and other layering of the PCB, specific spacing, dimensions and weights for certain components of the PCB, an opening on the first layer XFP cage ground shield (20) connecting to the EMI gasket, guard ground traces (27) in the second layer (25) surrounding the differential pair signal traces (26), openings (32) in the copper of the third layer (31) beneath the XFP cage ground shield and XFP connector pads (12), and ground vias (14) at the XFP connector and PHY connector pads (15).

    Noise suppressing structure and printed wiring board
    88.
    发明公开
    Noise suppressing structure and printed wiring board 有权
    Geräuschunterdrückungsstrukturund Leiterplatte

    公开(公告)号：EP2222144A2

    公开(公告)日：2010-08-25

    申请号：EP10004994.9

    申请日：2007-06-29

    Applicant: SHIN-ETSU POLYMER CO., LTD.

    Inventor： The designation of the inventor has not yet been filed

    IPC: H05K1/02 ,  H05K9/00

    CPC classification number: H05K1/0234 ,  H05K1/0298 ,  H05K1/167 ,  H05K2201/0191 ,  H05K2201/0317 ,  H05K2201/0326 ,  H05K2201/093 ,  H05K2201/09309

    Abstract: The present invention relates to a wiring member including: a copper foil layer having a smooth surface with a surface roughness Rz of 2 µm or less; a noise suppressing layer containing a metallic material or a conductive ceramic and having a thickness of 5 to 200 nm; and an insulating resin layer provided between the smooth surface of the copper foil layer and the noise suppressing layer, and also relates to a printed wiring board equipped with the wiring member. Moreover, the present invention relates to a noise suppressing structure including: a first conductive layer; a second conductive layer; a noise suppressing layer provided between the first conductive layer and the second conductive layer, the noise suppressing layer being to be electromagnetically-coupled with the first conductive layer, the noise suppressing layer comprising a metallic material or a conductive ceramic, and the noise suppressing layer having a thickness of 5 to 300 nm; a first insulating layer provided between the first conductive layer and the noise suppressing layer; and a second insulating layer provided between the second conductive layer and the noise suppressing layer; wherein the noise suppressing structure has: a region (I) in which the noise suppressing layer and the first conductive layer face each other; and a region (II) in which the noise suppressing layer and the first conductive layer do not face each other but the noise suppressing layer and the second conductive layer face each other, the regions (I) and (II) neighboring each other.

    Abstract translation: 布线构件技术领域本发明涉及一种布线构件，其包括：具有表面粗糙度Rz为2μm以下的光滑表面的铜箔层; 含有金属材料或导电陶瓷的噪声抑制层，其厚度为5〜200nm; 以及设置在铜箔层的光滑表面和噪声抑制层之间的绝缘树脂层，并且还涉及配备有配线构件的印刷线路板。 此外，本发明涉及一种噪声抑制结构，包括：第一导电层; 第二导电层; 设置在第一导电层和第二导电层之间的噪声抑制层，噪声抑制层与第一导电层电磁耦合，噪声抑制层包括金属材料或导电陶瓷，噪声抑制层 具有5〜300nm的厚度; 设置在所述第一导电层和所述噪声抑制层之间的第一绝缘层; 以及设置在所述第二导电层和所述噪声抑制层之间的第二绝缘层; 其中所述噪声抑制结构具有：所述噪声抑制层和所述第一导电层彼此面对的区域（I）; 以及区域（I）和（II）彼此相邻的区域（II），其中噪声抑制层和第一导电层彼此不相对，但噪声抑制层和第二导电层彼此面对。

    SYSTEM, APPARATUS, AND METHOD FOR PCB-BASED AUTOMATION TRACEABILITY
    89.
    发明公开
    SYSTEM, APPARATUS, AND METHOD FOR PCB-BASED AUTOMATION TRACEABILITY 审中-公开
    系统，设备和方法基于PCB AUTOMATISIERUNGSVERFOLGBARKEIT

    公开(公告)号：EP2208172A1

    公开(公告)日：2010-07-21

    申请号：EP07871396.3

    申请日：2007-11-07

    Applicant: NXP Semiconductors B.V.

    Inventor： The designation of the inventor has not yet been filed

    IPC: G06K19/077 ,  H01Q1/38

    CPC classification number: G06K19/07749 ,  H01Q1/2225 ,  H01Q13/10 ,  H05K1/0266 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/10098

    Abstract: A system, apparatus, and method are provided for using a PCB component as an antenna to allow for RFID communication in the UHF band. The present invention enables supply chain management of a PCB and products containing the PCB by enabling tracking of a PCB at the assembly level such that at each production stage of the board production it is known exactly where the product is and what is its present state of test. One embodiment uses an existing ground plane of a PCB, splitting the ground plane of all the layers of the PCB, allowing for a dipole structure that provides an adequate received energy level to power the circuit to the 'on' state thereby allowing RFID/Electronic Product Code transactions. In alternative embodiments, existing or added traces are used in place of the split ground plane as an antenna for the RFID IC. The supply chain management can employ a dedicated RFID interrogator that is connected to an IT network and allows for bill of materials to be fulfilled in an automated fashion throughout the assembly of the PCB. The manufacturer of the end product can also use the RFID IC in an own end product item level supply management system that includes inventory, shipments, and returns.

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