公开(公告)号：EP2100783B1

公开(公告)日：2017-12-20

申请号：EP09155248.9

申请日：2009-03-16

Applicant: Guardian Industries Corp.

Inventor： Veerasamy, Vijayen S.

IPC: B60S1/08 ,  B32B17/10 ,  G01D5/24 ,  G01N21/25 ,  H05K1/02

CPC classification number: B60S1/0825 ,  B32B17/10036 ,  B32B17/10174 ,  B32B17/10761 ,  B32B17/10788 ,  B60S1/0822 ,  B60S1/087 ,  G01D5/2405 ,  H05K1/0218 ,  H05K1/0219 ,  H05K1/0298 ,  H05K1/162 ,  H05K1/189 ,  H05K3/0058 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09663

Abstract: A system and/or method for sensing the presence of moisture (e.g., rain) and/or other material(s) on a window such as a vehicle window (e.g., vehicle windshield, sunroof or backlite). In certain example embodiments, a plurality of sensing capacitors are supported by a window such as a vehicle windshield, the capacitors each having a different field and/or pattern. A sensing circuit outputs an analog signal that is based on and/or related to the capacitances of one or more of the sensing capacitors. In certain example embodiments, a flexible printed circuit board (PCB) mountable in or on a vehicle window is provided. First and second sensing circuits are formed on opposing sides of the flexible PCB, with each said sensing circuit comprising a plurality of different fractal structures. A ground plane is located between the first and second sensing circuits, with the ground plane being arranged so as to decouple the first and second capacitor arrays and to shield the first capacitor array from fields emanating from the second capacitor array and vice versa. The electronic device is configured to detect moisture on an exterior surface of the vehicle window, humidity on an interior surface of the vehicle window, and EMI.

公开(公告)号：EP2759182A1

公开(公告)日：2014-07-30

申请号：EP12783083.4

申请日：2012-08-17

Applicant: ERNI Production GmbH & Co. KG.

Inventor： EIFER, Bernd ,  TSCHRITTER, Jakob

IPC: H05K1/02

CPC classification number: H05K1/0216 ,  H05K1/0224 ,  H05K1/0228 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/0298 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/09336

Abstract: The invention relates to an electric multilayer printed circuit board which satisfies the PICMG specification EXP.O, comprising a first signal layer and a second signal layer. The first signal layer comprises at least one first conductive path (33) and a first shielding region. The second signal layer comprises at least one second conductive path (43) and a second shielding region. The at least one first conductive path (33) and the at least one second conductive path (34) can be arranged such that said paths cross in at least one crossing point K. The first conductive path (33) is arranged adjacently to the second shielding region at each point where the first conductive path does not cross a second conductive path (43), and each second conductive path (43) is arranged adjacently to the first shielding region at each point where the second conductive path does not cross a conductive path (33).

公开(公告)号：EP2619793A4

公开(公告)日：2014-03-12

申请号：EP11827724

申请日：2011-09-26

Applicant: INTEL CORP

Inventor： ZOU BIN ,  GUO YAN ,  SANKMAN ROBERT L ,  HE JIANGQI

IPC: H01L23/48 ,  H01L21/60 ,  H01R12/57 ,  H01R43/16 ,  H01R103/00 ,  H05K1/02 ,  H05K1/11

CPC classification number: H01R43/16 ,  H01L23/49811 ,  H01L2924/0002 ,  H01R12/57 ,  H01R2103/00 ,  H05K1/0219 ,  H05K1/0231 ,  H05K1/0242 ,  H05K1/0251 ,  H05K1/113 ,  H05K2201/09336 ,  H05K2201/09663 ,  H05K2201/1031 ,  Y02P70/611 ,  Y10T29/49204 ,  H01L2924/00

公开(公告)号：EP1721497B1

公开(公告)日：2013-12-18

申请号：EP05745171.8

申请日：2005-03-04

Applicant: RAYTHEON COMPANY

Inventor： TONOMURA, Samual D. ,  CISCO, Terry C. ,  HOLTER, Clifton Ole

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H01P1/20

CPC classification number: H01L23/552 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/81801 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/3025 ,  H01P1/2005 ,  H05K1/0236 ,  H05K1/0306 ,  H05K1/09 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09681 ,  H01L2924/00

Abstract: A hybrid assembly having improved cross talk characteristics includes a substrate having an upper surface. Conductive paths on the upper surface are provided for conducting high frequency signals. Regular polygons made of an electromagnetic band gap (EBG) material having slow wave characteristics are deposited on the upper surface and form a lattice for tessellating the upper surface. Each of the polygons has a periphery. The polygons are separated along their periphery from adjacent polygons by an interspace and are covered with an insulating material. Second polygons, also made of an electromagnetic band gap material, are deposited over the insulating material. Semiconductor structures are mounted over the second polygons. The semiconductor structures have a plurality of electrical contacts with the conductive paths. The regular polygons can be hexagons, triangles, octagons or any other combination that forms a lattice and can be printed onto the substrate.

公开(公告)号：EP2619793A2

公开(公告)日：2013-07-31

申请号：EP11827724.3

申请日：2011-09-26

Applicant: Intel Corporation

Inventor： ZOU, Bin ,  GUO, Yan ,  SANKMAN, Robert L. ,  HE, Jiangqi

IPC: H01L23/48 ,  H01L21/60

CPC classification number: H01R43/16 ,  H01L23/49811 ,  H01L2924/0002 ,  H01R12/57 ,  H01R2103/00 ,  H05K1/0219 ,  H05K1/0231 ,  H05K1/0242 ,  H05K1/0251 ,  H05K1/113 ,  H05K2201/09336 ,  H05K2201/09663 ,  H05K2201/1031 ,  Y02P70/611 ,  Y10T29/49204 ,  H01L2924/00

Abstract: Methods and apparatus relating to self-referencing pins are described. In one embodiment, a pin electrically couples a first agent to a second agent. The pin includes two or more portions that are at least partially separated by an insulator, e.g., to improve crosstalk performance. Other embodiments are also disclosed and claimed.

公开(公告)号：EP1959716A3

公开(公告)日：2009-10-21

申请号：EP08100555.5

申请日：2008-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Park, Hark Byeong ,  Seol, Byong Su ,  Kim, Hyung Geun ,  Park, Hyun Ho ,  Lee, Jong Sung ,  Lee, Hyung Seok ,  Moon, Young Jun

IPC: H05K1/02

CPC classification number: H05K1/0234 ,  H05K1/162 ,  H05K1/167 ,  H05K2201/09309 ,  H05K2201/09336

Abstract: Disclosed is a multilayer printed circuit board (10). The multilayer printed circuit board (10) includes a power source surface (12) to provide power to each component disposed on the power source surface, a ground surface (13) having a reference voltage, a strip line (14) which passes through the power source surface and/or the ground surface so as to transmit signals between components, an antenna installed in proximity to a sectional region of the power source surface and the ground surface, and an electromagnetic wave reduction member (20) which is provided between the power source surface (12) and the ground surface (13) to effectively reduce an electromagnetic wave generated from the strip line (14).

Abstract translation: 公开了一种多层印刷电路板（10）。 多层印刷电路板（10）包括：电源表面（12），用于向设置在电源表面上的每个部件供电;具有参考电压的接地表面（13）;带状线（14），其穿过 电源表面和/或接地表面，以便在部件之间传输信号，天线安装在电源表面的截面区域和接地表面附近，以及电磁波减少部件（20），其设置在电源表面和/ 电源表面（12）和接地表面（13），以有效地减少从带状线（14）产生的电磁波。

公开(公告)号：EP2109349A1

公开(公告)日：2009-10-14

申请号：EP08103866.3

申请日：2008-05-08

Applicant: Mediatek Inc.

Inventor： Chen, Nan-Jang ,  Lin, Hong-Chin

IPC: H05K1/02 ,  H01L23/66 ,  H05K3/46

CPC classification number: H05K1/0216 ,  H01L2924/0002 ,  H05K3/222 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/10363 ,  H05K2201/10515 ,  H05K2201/10689 ,  H01L2924/00

Abstract: A printed circuit board (500a-d) is disclosed. The printed circuit board comprises a substrate (200) having a top surface (202) and a bottom surface (203). A ground plane (228) is on the bottom surface. A first signal trace (212a) is on the top surface along a first direction. At least two isolated power planes (208, 210) are on the top surface adjacent to opposite sides of the first signal trace, respectively. A conductive connection (216) along a second direction couples to the two power planes, across the first signal trace (212a) without electrically connecting to the signal trace, wherein the first signal trace (212a) doesn't directly pass over any split of the ground plane (228).

Abstract translation: 公开了一种印刷电路板（500a-d）。 印刷电路板包括具有顶表面（202）和底表面（203）的基底（200）。 接地平面（228）位于底面。 第一信号迹线（212a）沿着第一方向在顶表面上。 至少两个隔离电源平面（208,210）分别位于与第一信号迹线的相对侧相邻的顶表面上。 沿着第二方向的导电连接（216）跨过第一信号迹线（212a）耦合到两个电源层，而不电连接到信号迹线，其中第一信号迹线（212a）不直接通过 地面（228）。

公开(公告)号：EP1414279A3

公开(公告)日：2006-10-25

申请号：EP03022912.4

申请日：2003-10-09

Applicant: MURATA MANUFACTURING CO., LTD.

Inventor： Furutani, Koji, (170)Intellectual Property Dept.

IPC: H05K1/02 ,  H05K3/46 ,  H01L23/538

CPC classification number: H01L23/50 ,  H01L23/49822 ,  H01L2924/0002 ,  H04B1/005 ,  H04B1/0057 ,  H04B1/006 ,  H04B1/52 ,  H05K1/0237 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/112 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/0979 ,  H01L2924/00

Abstract: In a high-frequency module, intermediate ground electrodes (Go1, Gm1, Gg1, Go2, Gm2, Gg2) are provided between a common ground electrode (Gd) and upper-surface ground electrodes (Gq1, Gq2,) for mounting high-frequency components (21, 22) on an upper surface of a multilayer substrate. With regard to the number of via-hole conductors interconnecting ground electrodes, the number of via-hole conductors (Vdg) between the intermediate ground electrodes (Go1, Gm1, Gg1, Go2, Gm2, Gg2) and the common ground electrode (Gg) is larger than the number of via-hole conductors (Voq) between the upper-surface ground electrodes (Gq1, Gq2) and the intermediate ground electrodes (Go1, Gm1, Gg1, Go2, Gm2, Gg2).

Abstract translation: 多层基板（1）通过层压电极层和电介质层（11-15）而形成。 高频部件（21,22）的接地端子与基板的上表面接地电极（Gq1，Gq2）连接。 使用通孔导体（Vdg，Vmo，Voq，Vgm），将接地电极（Go1，Gm1，Gg1，Go2，Gm2，Gg2）设置在接地电极（Gd）和上表面接地电极之间。 通信设备还包括独立的权利要求。

公开(公告)号：EP1061784B1

公开(公告)日：2006-09-27

申请号：EP98958417.2

申请日：1998-07-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： ROG, Andrei Leonidovich ,  KORULIN, Vitaly Nikolaevich ,  OSIPOV, Oleg Dmitrievich ,  SOLDATENKOV, Anatoly Nikolaevich ,  USTINOV, Igor Vladimirovich ,  MALASHIN, Viktor Ivanovich

IPC: H05K1/02 ,  H05K3/46 ,  H05K1/14 ,  H01L27/02

CPC classification number: H05K1/0218 ,  H05K1/0237 ,  H05K1/0298 ,  H05K3/429 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/09354 ,  H05K2201/09618 ,  H05K2201/09663 ,  H05K2201/09972

Abstract: The present invention pertains to the field of radio-electronics and may be used in the structures of radio-electronic units for receiving and processing signals from satellite radio-navigation systems. This invention essentially relates to a radio-electronic unit that comprises a multi-layered printed plate as well as a plurality of conductors. These conductors, which are used for shielding the corresponding signal communication conductor and which are arranged on both sides thereof, are connected to ground planes through the metallised openings of inter-layer connections formed at least at the beginning and at the end of each isolation conductor so as to define a closed-loop electric circuit.

公开(公告)号：EP1098555A3

公开(公告)日：2005-04-13

申请号：EP00309666.6

申请日：2000-11-01

Applicant: CANON KABUSHIKI KAISHA

Inventor： Otaki, Toru ,  Inagawa, Hideho ,  Osaka, Toru

IPC: H05K1/11

CPC classification number: H05K1/112 ,  H05K2201/09227 ,  H05K2201/09336 ,  H05K2201/0939 ,  H05K2201/09627 ,  H05K2201/10734

Abstract: A printed wiring board having assembled thereon a grid array type package, a multi-terminal device with many terminals arranged in matrix, is provided, through first signal connection holes, signal lines, and second connection holes, with many numbers of lands divided into plural blocks, being arranged in matrix on a first layer to connect each terminal of the multi-terminal device correspondingly, signal line patterns connected with many lands, and drawn out in the same direction per block, and first signal patterns from lands positioned on the innermost line of many lands. Then, the wiring patterns of the signal lines are drawn out regularly from many lands formed in matrix on the assembling surface of the grid array type package to make it easier for the printed wiring board to effectuate wiring connections without making them complicated or increasing the number of layers of the printed wiring board. Also, with the provision of ground patterns that surround signal lines, it is made possible to reduce unwanted radiation, as well as to suppress the occurrence of malfunctions of electronic equipment due to reflections and ground bounces.