公开(公告)号：US20060173261A1

公开(公告)日：2006-08-03

申请号：US11052740

申请日：2005-01-31

申请人： Magnus Kall ,  Edvard Kalvesten

发明人： Magnus Kall ,  Edvard Kalvesten

IPC分类号： A61B5/04

CPC分类号： A61B5/0492 ,  A61B2562/046 ,  A61B2562/125

摘要： A sensor for measuring biopotential signals from the skin of a patient. The sensor comprises a carrier having a top surface positioned contiguous with the skin of the patient when the sensor is applied to the patient's skin and a bottom surface facing away from the patient when the sensor is applied to the patient's skin. The carrier has further plurality of spikes extending from the top surface for being inserted into the skin of the patient when the sensor is applied to the patient's skin. The sensor further comprises means for obtaining the biopotential signal and for making the biopotential signal available externally of the sensor. The carrier is manufactured of non-conductive material and the non-conductive material is made conductive to form electrical connection between the top and bottom surfaces of the carrier.

摘要翻译： 用于测量来自患者皮肤的生物电位信号的传感器。 传感器包括载体，当将传感器施加到病人的皮肤上时，顶部表面定位成与患者的皮肤邻接，当传感器被施加到病人的皮肤上时，该表面背离病人。 载体具有从顶表面延伸的另外多个尖峰，以便当传感器被施加到病人的皮肤上时插入患者的皮肤。 传感器还包括用于获得生物电位信号并使生物电位信号在传感器外部可用的装置。 载体由非导电材料制成，并且非导电材料被导电以在载体的顶表面和底表面之间形成电连接。

公开(公告)号：US20090195948A1

公开(公告)日：2009-08-06

申请号：US12162599

申请日：2007-01-31

申请人： Edvard Kalvesten ,  Tomas Bauer ,  Thorbjorn Ebefors

发明人： Edvard Kalvesten ,  Tomas Bauer ,  Thorbjorn Ebefors

IPC分类号： H02H9/00 ,  H01L21/762 ,  H01L21/768 ,  H01L23/48 ,  H01L21/322 ,  H01L29/861 ,  H01L31/00

CPC分类号： H01L23/49827 ,  H01L21/76898 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections. Also there is provided a wafer substrate for making integrated electronic circuits and/or components, comprising a low resistivity silicon base (110) having a high resistivity top layer (122) suitable for semiconductor engineering, characterized by having low resistivity wafer through connections (140).

摘要翻译： 本发明涉及一种通过连接（140; 192）制造具有电晶片的用于半导体工程的起始衬底晶片的方法。 它包括提供具有前侧和后侧的具有低电阻率硅基底和前侧的高电阻率材料层的晶片（110,150）。 在晶片上，在高电阻率材料层中存在低电阻率材料岛。 这些岛与硅基材料接触。 沟槽从晶片的背面蚀刻，但并不全部穿过晶片，以提供通过连接（140; 192）限定晶片的绝缘外壳。 沟槽填充有绝缘材料。 然后研磨晶片的正面以露出绝缘材料，以通过连接产生晶片。 还提供了一种用于制造集成电子电路和/或部件的晶片基板，包括具有适用于半导体工程的高电阻率顶层（122）的低电阻率硅基底（110），其特征在于具有低电阻率晶圆连接（140 ）。

公开(公告)号：US20070020926A1

公开(公告)日：2007-01-25

申请号：US10550199

申请日：2004-03-22

申请人： Edvard Kalvesten ,  Thorbjorn Ebefors ,  Nikias Svedin ,  Pelle Rangsten ,  Tommy Schonberg

发明人： Edvard Kalvesten ,  Thorbjorn Ebefors ,  Nikias Svedin ,  Pelle Rangsten ,  Tommy Schonberg

IPC分类号： H01L21/44

CPC分类号： B81B7/0006 ,  H01L21/76898 ,  H01L23/481 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05599

摘要： A method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate includes creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of the substrate, defined by the trench. Also described is a product usable as a starting substrate for the manufacture of micro-electronic and/or micro-mechanic devices, including a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least one electrically conducting member extending through the substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and includes the same material as the substrate, i.e. it is made from the wafer material.

摘要翻译： 在导电或半导体衬底的第一（顶部）和第二（底部）表面之间形成电连接的方法包括在第一表面中形成沟槽，以及建立绝缘外壳，其将衬底的一部分完全分开， 由沟槽限定。 还描述了可用作制造微电子和/或微机械装置的起始衬底的产品，包括半导体或导电材料的平坦衬底，并且具有第一和第二表面以及至少一个 延伸穿过基底的导电构件。 导电构件通过绝缘材料的有限层与平坦基板的周围材料绝缘，并且包括与基板相同的材料，即由晶片材料制成。

公开(公告)号：US20100053922A1

公开(公告)日：2010-03-04

申请号：US12523811

申请日：2008-01-25

申请人： Thorbjorn Ebefors ,  Edvard Kalvesten ,  Tomas Bauer

发明人： Thorbjorn Ebefors ,  Edvard Kalvesten ,  Tomas Bauer

IPC分类号： H01R9/00 ,  H01L21/302

CPC分类号： H01L21/762 ,  B81C1/00246 ,  H01L21/823481 ,  H01L23/055 ,  H01L23/147 ,  H01L23/26 ,  H01L23/49838 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6622 ,  H01L2223/6688 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/16195 ,  H01L2924/16251 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method of micro-packaging a component wherein at least a first and a second semi-conductor substrate are provided, one of which has electrical through connections (vias). A depression in either one of the substrates or in both is etched. A component is provided above vias and connected thereto. The substrates are joined to form a sealed package. A micro-packaged electronic or micromechanic device, including a thin-walled casing of a semi-conductor material having electrical through connections through the bottom of the casing is also disclosed. An electronic or micromechanic component is attached to the electrical through connections, and the package is hermetically sealed for maintaining a desired atmosphere, suitably vacuum inside the box.

摘要翻译： 一种微封装组件的方法，其中至少提供了第一和第二半导体衬底，其中一个具有电穿透连接（通路）。 在任一个基板中或两者中的凹陷被蚀刻。 在通孔上面提供一个组件并与之连接。 基板接合形成密封的包装。 还公开了一种微型封装的电子或微机电装置，其包括具有穿过套管底部的电穿透连接的半导体材料的薄壁外壳。 电子或微机械部件附接到电气通过连接件，并且封装被密封以保持期望的气氛，适当地在箱内真空。

公开(公告)号：US20080308884A1

公开(公告)日：2008-12-18

申请号：US12090096

申请日：2006-10-05

申请人： Edvard Kalvesten

发明人： Edvard Kalvesten

IPC分类号： H01L29/00 ,  H01L21/00

CPC分类号： B81B7/0061 ,  B81B2201/058

摘要： A method of making a fluid communication channel between a micro mechanical structure provided on a front side of a device and the back side of said device is described. It includes making the required structural components by lithographic and etching processes on said front side. Holes are then drilled from the back side of said device in precise alignment with the structures on said front side, to provide inlets and/or outlets to and/or from the micromechanical structure.

摘要翻译： 描述了在设置在设备的前侧的微机械结构与所述设备的背面之间形成流体连通通道的方法。 它包括在所述前侧通过光刻和蚀刻工艺制造所需的结构部件。 然后从所述装置的背面钻出孔，以与所述前侧上的结构精确对准，以向微机械结构提供入口和/或出口。

公开(公告)号：US07207227B2

公开(公告)日：2007-04-24

申请号：US11250548

申请日：2005-10-17

申请人： Pelle Rangsten ,  Edvard Kalvesten ,  Marianne Mechbach

发明人： Pelle Rangsten ,  Edvard Kalvesten ,  Marianne Mechbach

IPC分类号： G01L9/16

CPC分类号： G01L9/0042 ,  G01L9/0055 ,  Y10T29/49002 ,  Y10T29/49004 ,  Y10T29/49007

摘要： In manufacturing a pressure sensor a recess that will form part of the sensor cavity is formed in a lower silicon substrate. An SOI-wafer having a monocrystalline silicon layer on top of a substrate is bonded to the lower silicon substrate closing the recess and forming the cavity. The supporting substrate of the SOI-wafer is then etched away, the portion of the monocrystalline layer located above the recess forming the sensor diaphragm. The oxide layer of the SOI-wafer here acts as an “ideal” etch stop in the case where the substrate wafer is removed by dry (plasma) or wet etching using e.g. KOH. This is due to high etch selectivity between silicon and oxide for some etch processes and it results in a diaphragm having a very accurately defined and uniform thickness. The cavity is evacuated by forming a opening to the cavity and then sealing the cavity by closing the opening using LPCVD. Sensor paths for sensing the deflection of the diaphragm are applied on the outer or inner surface of the diaphragm. The monocrystalline diphragm gives the sensor a good long-term stability. Also the sensor path can be made of monocrystalline material, this giving the sensor even better good long-term characteristics. An increased sensitivity can be obtained by making active portions of the sensor paths freely extending, unsupported by other material of the pressure sensor, by suitable etching procedures.

摘要翻译： 在制造压力传感器中，形成传感器腔的一部分的凹部形成在下硅衬底中。 在衬底顶部具有单晶硅层的SOI晶片被接合到下硅衬底上，封闭凹部并形成空腔。 然后蚀刻掉SOI晶片的支撑衬底，单晶层的部分位于形成传感器膜片的凹部之上。 SOI晶片的氧化物层在此通过干式（等离子体）或湿式蚀刻方式除去基板晶片的情况下，作为“理想的”蚀刻停止。 KOH。 这是由于在一些蚀刻工艺之间硅和氧化物之间的高蚀刻选择性，并且其导致膜具有非常精确地限定和均匀的厚度。 通过向腔体形成开口并且然后通过使用LPCVD闭合开口来密封空腔来抽空空腔。 用于感测隔膜偏转的传感器路径被施加在隔膜的外表面或内表面上。 单晶diphragm给传感器良好的长期稳定性。 此外，传感器路径也可以由单晶材料制成，这给传感器带来更好的长期特性。 传感器路径的有效部分通过适当的蚀刻程序自由延伸，不受压力传感器的其他材料支撑，可以获得增加的灵敏度。

公开(公告)号：US20120288422A1

公开(公告)日：2012-11-15

申请号：US13469377

申请日：2012-05-11

申请人： Edvard KALVESTEN

发明人： Edvard KALVESTEN

IPC分类号： B81B1/00 ,  B32B3/20 ,  C03B23/24

CPC分类号： C03B23/24 ,  B81B2201/051 ,  B81B2203/0338 ,  B81C1/00119 ,  B81C2203/036 ,  Y10T428/24562

摘要： A method of making a microfluidic device, includes: providing an optically transparent bottom substrate and an optically transparent top substrate, each made of glass. Recesses are made in the top substrate and the top and bottom substrates are bonded together. Then, material is removed from the top substrate to expose the recesses, and a lid is attached to the top substrate so as to cover the recesses whereby channels are formed. At least that surface of the lid facing towards the recesses in the top substrate has a surface roughness of

摘要翻译： 制造微流体装置的方法包括：提供每个由玻璃制成的光学透明的底部基底和光学透明的顶部基底。 在顶部基板上形成凹部，顶部和底部基板结合在一起。 然后，将材料从顶部基板移除以露出凹部，并且将盖子附接到顶部基板，以覆盖凹部，从而形成通道。 至少面向顶部衬底中的凹部的盖的表面具有<5nm，优选<2nm的表面粗糙度。 还描述了一种微流体装置，其包括光学透明材料的主体，以及在主体内延伸的至少一个通道，还具有底表面，顶表面和侧壁的通道。 顶表面和底表面均表现出粗糙度<5nm，优选<2nm。

公开(公告)号：US20050124159A1

公开(公告)日：2005-06-09

申请号：US10504714

申请日：2003-02-14

申请人： Edvard Kalvesten ,  Thorbjorn Ebefors ,  Niklas Svedin ,  Hakan Westin

发明人： Edvard Kalvesten ,  Thorbjorn Ebefors ,  Niklas Svedin ,  Hakan Westin

IPC分类号： B81B3/00 ,  B81B7/04 ,  G02F1/29 ,  H01L21/00 ,  H01L21/30 ,  H01L21/302 ,  H01L21/46 ,  H01L21/461

CPC分类号： B81C1/0015 ,  B81B2201/042 ,  B81C1/00142 ,  B81C3/002 ,  B81C2201/019 ,  B81C2201/0191 ,  B81C2203/058

摘要： A method of making a deflectable, free hanging micro structure having at least one hinge member, the method includes the steps of providing a first sacrificial wafer having a single crystalline material constituting material forming the micro structure. A second semiconductor wafer including necessary components for forming the structure in cooperation with the first wafer is provided. Finite areas of a structured bonding material is provided, on one or both of the wafers at selected locations, the finite areas defining points of connection for joining the wafers. The wafers are bonded using heat and optionally pressure. Sacrificial material is etched away from the sacrificial wafer, patterning the top wafer by lithography is performed to define the desired deflectable microstructures having hinges, and subsequently silicon etch to make the structures.

摘要翻译： 一种制造具有至少一个铰链构件的可偏转的自由悬挂微结构的方法，所述方法包括以下步骤：提供具有形成微结构的单晶材料构成材料的第一牺牲晶片。 提供了包括与第一晶片协作形成结构的必要部件的第二半导体晶片。 在选定位置的一个或两个晶片上提供结构化接合材料的有限区域，限定用于接合晶片的连接点。 使用热和任选的压力将晶片接合。 牺牲材料被蚀刻离开牺牲晶片，通过光刻来图案化顶部晶片以限定具有铰链的期望的可偏转微结构，并随后进行硅蚀刻以制造结构。

公开(公告)号：US6124145A

公开(公告)日：2000-09-26

申请号：US12660

申请日：1998-01-23

申请人： Goran Stemme ,  Edvard Kalvesten

发明人： Goran Stemme ,  Edvard Kalvesten

IPC分类号： B81B3/00 ,  B81B7/00 ,  G02B5/20 ,  G01R31/26 ,  H01L21/66

CPC分类号： G02B5/202

摘要： Micromachining, etching and bonding techniques are employed to fabricate hermetically sealed gas-filled chambers from silicon and/or glass wafers. The hermetically sealed gas-filled chambers have precise dimensions and are filled with a preselected concentration of gas, thus rendering exceptional performance for use as an optical gas filter. The first step involves etching one or more cavities or holes in one or more glass or silicon wafers. These wafers eventually become part of a chip assembly having one or more hermetically sealed gas-filled chambers after appropriate bonding procedures. Interfaces between aligned silicon wafers are bonded using fusion bonding techniques whereas interfaces between silicon and glass wafers are bonded using anodic bonding techniques. Bonding is accomplished in an over-pressured gas-filled bonding environment that contains a selected concentration of gas which is maintained at the bonding temperature in order to encapsulate a precise concentration of the gas within the micromachined cavity.

公开(公告)号：US09936918B2

公开(公告)日：2018-04-10

申请号：US14367053

申请日：2012-11-29

申请人： Edvard Kalvesten ,  Thorbjorn Ebefors ,  Anders Eriksson

发明人： Edvard Kalvesten ,  Thorbjorn Ebefors ,  Anders Eriksson

IPC分类号： A61B5/04 ,  H01L21/02 ,  H01L21/762 ,  A61B5/00 ,  A61M37/00 ,  H01L21/768 ,  H01L23/48 ,  H01L21/308 ,  G01R1/067 ,  G01R3/00

CPC分类号： A61B5/685 ,  A61B5/04001 ,  A61M37/0015 ,  A61M2037/0053 ,  G01R1/06744 ,  G01R3/00 ,  H01L21/02 ,  H01L21/0226 ,  H01L21/02334 ,  H01L21/02362 ,  H01L21/308 ,  H01L21/762 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of providing a metal coating on a substrate (10), and electrically insulating sections/parts of the metal coated substrate from each other. A substrate is provided with an insulating material in the substrate, the insulating first material extending through the thickness of the substrate and protruding above one surface of the substrate. It forms an enclosed section/portion (14) of the substrate. A protective structure (15) is provided on the insulating material such that it covers the entire circumference thereof. The insulating material is selectively etched to create an under-etch (18) under the protective structure. Finally conductive material (19) is deposited to provide a metal coating over the substrate, whereby the under-etch will provide a disruption in the deposited metal coating, thereby electrically insulating the enclosed section from the surrounding substrate.