公开(公告)号：US10910329B2

公开(公告)日：2021-02-02

申请号：US15603314

申请日：2017-05-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kuo-Hsien Liao ,  Alex Chi-Hong Chan

IPC: H01Q13/24 ,  H01L23/66 ,  H01L23/552 ,  H01Q1/52 ,  H01Q1/22 ,  H01P3/12 ,  H01P5/107 ,  H01L23/538 ,  H01L23/498

Abstract: The disclosure relates to a semiconductor package device. The semiconductor package device includes a substrate, a waveguide component, a package body, a first dielectric layer, an antenna pattern, and an antenna feeding layer. The waveguide component is on the substrate. The package body is on the substrate and encapsulates the waveguide component. The first dielectric layer is on the package body and has a first surface and a second surface adjacent to the package body and opposite to the first surface. The antenna pattern is on the first surface of the first dielectric layer. The antenna feeding layer is on the second surface of the first dielectric layer.

公开(公告)号：US09269673B1

公开(公告)日：2016-02-23

申请号：US14521342

申请日：2014-10-22

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： I-Chia Lin ,  Chieh-Chen Fu ,  Kuo-Hsien Liao ,  Cheng-Nan Lin

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/60

CPC classification number: H01L23/552 ,  H01L23/13 ,  H01L23/31 ,  H01L23/3121 ,  H01L23/49805 ,  H01L23/49822 ,  H01L24/97 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2224/85005 ,  H01L2224/97 ,  H01L2924/15159 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00012

Abstract: A semiconductor device package includes a substrate, at least one component, a package body, a first conductive layer, a first shielding layer, a second shielding layer and a second conductive layer. The component is disposed on a first surface of the substrate. The package body is disposed on the first surface of the substrate and covers the component. The first conductive layer covers the package body and at least a portion of the substrate. The first shielding layer covers the first conductive layer and has a first thickness and includes a high conductivity material. The second shielding layer covers the first shielding layer and has a second thickness and includes a high permeability material. A ratio of the first thickness to the second thickness being in a range of 0.2 to 3. The second conductive layer covers the second shielding layer.

Abstract translation: 半导体器件封装包括衬底，至少一个部件，封装体，第一导电层，第一屏蔽层，第二屏蔽层和第二导电层。 该部件设置在基板的第一表面上。 包装体设置在基板的第一表面上并覆盖该部件。 第一导电层覆盖封装主体和衬底的至少一部分。 第一屏蔽层覆盖第一导电层并且具有第一厚度并且包括高导电性材料。 第二屏蔽层覆盖第一屏蔽层并且具有第二厚度并且包括高磁导率材料。 第一厚度与第二厚度的比率在0.2至3的范围内。第二导电层覆盖第二屏蔽层。

公开(公告)号：US20140239464A1

公开(公告)日：2014-08-28

申请号：US13779249

申请日：2013-02-27

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L21/78

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。

公开(公告)号：US12009312B2

公开(公告)日：2024-06-11

申请号：US17483720

申请日：2021-09-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chanyuan Liu ,  Kuo-Hsien Liao ,  Yu-Hsiang Sun

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/552 ,  H01L23/3121 ,  H01L23/49811

Abstract: A semiconductor device package and a fabrication method thereof are disclosed. The semiconductor package comprises: a substrate having a first face and an opposing second face, wherein the first face is mounted with a first semiconductor component and a plurality of connectors; and a first shielding member covering the first semiconductor component and a first group of the plurality of connectors, while exposing a second group of the plurality of connectors.

公开(公告)号：US20170012007A1

公开(公告)日：2017-01-12

申请号：US15271555

申请日：2016-09-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L21/78 ,  H01L23/31 ,  H01L21/56 ,  H01L23/367 ,  H01L23/00

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。

公开(公告)号：US09484313B2

公开(公告)日：2016-11-01

申请号：US13779249

申请日：2013-02-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/552 ,  H01L23/60 ,  H01L23/00

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.

Abstract translation: 半导体封装包括基板，管芯，第一金属层，第二金属层和可选的种子层。 封装体至少部分地将裸片封装在基板上。 种子层设置在包装体上，第一金属层设置在种子层上。 第二金属层设置在第一金属层和基板的侧表面上。 第一金属层和第二金属层形成外部金属帽，其提供散热和电磁干扰（EMI）屏蔽。

公开(公告)号：US11239178B2

公开(公告)日：2022-02-01

申请号：US16694847

申请日：2019-11-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chanyuan Liu ,  Han-Chee Yen ,  Kuo-Hsien Liao ,  Alex Chi-Hong Chan ,  Christophe Zinck

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498

Abstract: A semiconductor package structure includes a substrate structure having a first surface and a second surface opposite to the first surface; at least two electronic components electrically connected to the first surface of the substrate structure; at least one shielding pad disposed on the first surface of the substrate structure; a plurality of vias connected to the at least one shielding pad; a plurality of shielding wirebonds disposed between the electronic components. Each of the shielding wirebonds includes a first bond and a second bond opposite to the first bond, the first bond and the second bond being electrically connected to the at least one shielding pad, and the vias being free from overlapping with any of the plurality of vias.

公开(公告)号：US10784208B2

公开(公告)日：2020-09-22

申请号：US15175992

申请日：2016-06-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kuo-Hsien Liao ,  Cheng-Nan Lin ,  Chieh-Chen Fu

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/31 ,  H01L21/56 ,  H01L25/16 ,  H01L23/29 ,  H01L25/065 ,  H01L23/538

Abstract: The present disclosure provides a semiconductor package device and a method for manufacturing the same. In embodiments of the present disclosure, a semiconductor package device includes a carrier, a first antenna, a second antenna, a package body and a first shield. The carrier includes an antenna area and a component area. The first antenna is formed on the antenna area. The second antenna extends from the antenna area and over the first antenna. The second antenna is electrically connected to the first antenna. The package body includes a first portion covering the component area and a second portion covering the antenna area. The first shield is conformally formed on the first portion of the package body and exposes the second portion of package body.

公开(公告)号：US11837686B2

公开(公告)日：2023-12-05

申请号：US16706527

申请日：2019-12-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chanyuan Liu ,  Kuo-Hsien Liao ,  Alex Chi-Hong Chan ,  Fuh-Yuh Shih

IPC: H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00 ,  H01L33/60 ,  H01L33/52 ,  H01L33/62 ,  H01L25/075

CPC classification number: H01L33/60 ,  H01L25/0753 ,  H01L33/0095 ,  H01L33/52 ,  H01L33/62 ,  H01L2933/005 ,  H01L2933/0058

Abstract: An optical device package includes a substrate, a light emitting device, a light detecting device, one or more electronic chips, a clear encapsulation layer and a patterned reflective layer. The substrate has a surface. The light emitting device is disposed on the surface of the substrate, the light detecting device is disposed on the surface of the substrate, and the light emitting device and the light detecting device have a gap. The one or more electronic chips are at least partially embedded in the substrate, and electrically connected to the light emitting device and the light detecting device. The clear encapsulation layer is disposed on the surface of the substrate and encapsulates the light emitting device and the light detecting device. The patterned reflective layer is disposed on an upper surface of the clear encapsulation layer and at least overlaps the gap between the light emitting device and the light detecting device in a projection direction perpendicular to the surface of the substrate.

公开(公告)号：US09984983B2

公开(公告)日：2018-05-29

申请号：US15271555

申请日：2016-09-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Sheng Chung ,  Kuo-Hsien Liao ,  Jin-Feng Yang ,  Chen-Yin Tai ,  Yung-I Yeh

IPC: H01L23/60 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/367

CPC classification number: H01L23/60 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3675 ,  H01L24/17 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/81

Abstract: The semiconductor package includes a substrate, a die, a first metal layer, a second metal layer and an optional seed layer. The package body at least partially encapsulates the die on the substrate. The seed layer is disposed on the package body and the first metal layer is disposed on the seed layer. The second metal layer is disposed on the first metal layer and the lateral surface of the substrate. The first metal layer and the second metal layer form an outer metal cap that provides thermal dissipation and electromagnetic interference (EMI) shielding.