公开(公告)号：US20200381345A1

公开(公告)日：2020-12-03

申请号：US16427197

申请日：2019-05-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun CHANG ,  Teck-Chong LEE ,  Wei-Hong LAI ,  Meng-Kai SHIH

IPC: H01L23/498 ,  H01L25/11 ,  H01L23/31 ,  H01L23/00 ,  H01L21/768

Abstract: A semiconductor device package includes a carrier, a conductive pillar and a first package body. The carrier has a first surface and a second surface opposite to the first surface. The conductive pillar is disposed on the second surface of the carrier. The first package is disposed on the second surface of the carrier and covers at least a portion of the conductive pillar. The conductive pillar has an uneven width.

公开(公告)号：US20230411349A1

公开(公告)日：2023-12-21

申请号：US18239722

申请日：2023-08-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Tang-Yuan CHEN ,  Meng-Kai SHIH ,  Teck-Chong LEE ,  Shin-Luh TARNG ,  Chih-Pin HUNG

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/528 ,  H01L21/56

CPC classification number: H01L25/0652 ,  H01L24/33 ,  H01L24/17 ,  H01L24/73 ,  H01L23/5283 ,  H01L21/566 ,  H01L2224/02373 ,  H01L2224/73253 ,  H01L2924/3511 ,  H01L2924/381 ,  H01L2224/0231 ,  H01L2224/02381

Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.

公开(公告)号：US20230011464A1

公开(公告)日：2023-01-12

申请号：US17944114

申请日：2022-09-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung HUANG ,  Meng-Kai SHIH ,  Wei-Hong LAI ,  Wei Chu SUN

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/552 ,  H01L21/48 ,  H01L23/498 ,  H01L21/66

Abstract: A wiring structure includes an upper conductive structure, a lower conductive structure, an intermediate layer and at least one through via. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The through via extends through the upper conductive structure, the intermediate layer and the lower conductive structure.

公开(公告)号：US20190287947A1

公开(公告)日：2019-09-19

申请号：US16434008

申请日：2019-06-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bo-Syun CHEN ,  Tang-Yuan CHEN ,  Yu-Chang CHEN ,  Jin-Feng YANG ,  Chin-Li KAO ,  Meng-Kai SHIH

IPC: H01L25/065 ,  H01L23/552 ,  H01L25/00 ,  H01L23/13 ,  H01L23/498 ,  H01L21/48 ,  H01L23/367 ,  H01L23/538

Abstract: A semiconductor package structure includes: (1) a first substrate; (2) at least one first semiconductor element attached to the first substrate; and (3) a second substrate including a plurality of thermal vias and a plurality of conductive vias, wherein one end of each of the thermal vias directly contacts the first semiconductor element.

公开(公告)号：US20200275030A1

公开(公告)日：2020-08-27

申请号：US16285000

申请日：2019-02-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming-Han WANG ,  Ian HU ,  Meng-Kai SHIH ,  Hsuan Yu CHEN

IPC: H04N5/232 ,  H04N5/247 ,  H04N5/225 ,  G06T7/00

Abstract: An optical measurement equipment includes an adjustment apparatus and at least two image capturing devices. The image capturing devices have a depth-of-field and attached to the adjustment apparatus. The image capturing devices are adjusted by the adjustment apparatus such that a portion to be measured of a workpiece is located within the depth-of-field of the image capturing devices.

公开(公告)号：US20200211863A1

公开(公告)日：2020-07-02

申请号：US16813364

申请日：2020-03-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ying-Xu LU ,  Tang-Yuan CHEN ,  Jin-Yuan LAI ,  Tse-Chuan CHOU ,  Meng-Kai SHIH ,  Shin-Luh TARNG

IPC: H01L21/56 ,  H01L23/498 ,  H01L23/00 ,  H01L23/13

Abstract: The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate. A distance between the second surface of the substrate and an extension of the second surface of the semiconductor device on the first surface of the substrate is less than or equal to twice a distance between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate extends along at least three sides of the semiconductor device.

公开(公告)号：US20200098605A1

公开(公告)日：2020-03-26

申请号：US16138938

申请日：2018-09-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chun Hung TSAI ,  Hsuan Yu CHEN ,  Ian HU ,  Meng-Kai SHIH ,  Shin-Luh TARNG

IPC: H01L21/67 ,  G01N21/95 ,  G01N21/956 ,  G01B11/25 ,  G06T7/00

Abstract: An apparatus includes: a first image capture module, a second image capture module, and a first projector. The first image capture module has a first optical axis forming an angle from approximately 70° to approximately 87° with respect to the surface of a carrier. The second image capture module has a first optical axis forming an angle of approximately 90° with respect to the surface of the carrier. The first projector has a first optical axis forming an angle from approximately 40° to approximately 85° with respect to the surface of the carrier.

公开(公告)号：US20190074264A1

公开(公告)日：2019-03-07

申请号：US15698451

申请日：2017-09-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bo-Syun CHEN ,  Tang-Yuan CHEN ,  Yu-Chang CHEN ,  Jin-Feng YANG ,  Chin-Li KAO ,  Meng-Kai SHIH

IPC: H01L25/065 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/83192 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06537 ,  H01L2225/06558 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2224/81

Abstract: A semiconductor package structure includes a first substrate, at least one first semiconductor element and a second substrate. The first semiconductor element is attached to the first substrate. The second substrate defines a cavity and includes a plurality of thermal vias. One end of each of the thermal vias is exposed in the cavity, and the first semiconductor element is disposed within the cavity and thermally connected to the thermal vias.

公开(公告)号：US20210288024A1

公开(公告)日：2021-09-16

申请号：US17322764

申请日：2021-05-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Tang-Yuan CHEN ,  Meng-Kai SHIH ,  Teck-Chong LEE ,  Shin-Luh TARNG ,  Chih-Pin HUNG

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/528 ,  H01L21/56

Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.

公开(公告)号：US20200381338A1

公开(公告)日：2020-12-03

申请号：US16430260

申请日：2019-06-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Tang-Yuan CHEN ,  Yuan Tzuo LUO ,  Shao-Cheng YEN ,  Meng-Kai SHIH ,  Chih-Pin HUNG

IPC: H01L23/433 ,  H01L23/31 ,  H01L21/56

Abstract: A semiconductor device package includes a carrier, an electronic component, a package body and a ring structure. The electronic component is disposed on the carrier. The electronic component has a side surface. The package body is disposed on the carrier. The package body exposes at least a portion of the side surface of the electronic component. The ring structure is disposed on the package body and surrounds the portion of the side surface of the electronic component exposed from the package body.