Automatic choke apparatus for engine
    6.
    发明授权
    Automatic choke apparatus for engine 有权
    发动机自动扼流装置

    公开(公告)号:US08978622B2

    公开(公告)日:2015-03-17

    申请号:US13423438

    申请日:2012-03-19

    申请人: Akira Furuya

    发明人: Akira Furuya

    摘要: There is provided an automatic choke apparatus for an engine. A bimetal that is coupled to a choke valve of an intake system is provided in the vicinity of an outer wall face of a muffler. The muffler is divided into a first expansion chamber and a second expansion chamber across a partition plate. An exhaust hole that allows the expansion chambers to be communicated with each other is formed at the lower part of the partition plate. An exhaust gas is guided from the upstream first expansion chamber toward the downstream second expansion chamber through the exhaust hole. A bypass hole is formed at an upper part of the partition plate in such a manner that that the expansion chambers are communicated with each other as bypassing the exhaust hole. The bypass hole is open to the vicinity of the outer wall face opposite to the bimetal.

    摘要翻译: 提供了一种用于发动机的自动扼流装置。 在消声器的外壁面附近设有与进气系统的阻流阀连接的双金属片。 消声器分隔成隔离隔板的第一膨胀室和第二膨胀室。 在隔板的下部形成有允许膨胀室相互连通的排气孔。 排气通过排气孔从上游第一膨胀室向下游第二膨胀室引导。 在分隔板的上部形成旁通孔,使得膨胀室相互连通,以绕过排气孔。 旁通孔向与双金属片相对的外壁面附近开放。

    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
    8.
    发明申请
    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20120003821A1

    公开(公告)日:2012-01-05

    申请号:US13172403

    申请日:2011-06-29

    IPC分类号: H01L21/20

    摘要: A method for fabricating a semiconductor device includes performing thermal cleaning for a surface of a silicon substrate in an atmosphere including hydrogen under a condition that a thermal cleaning temperature is higher than or equal to 700° C. and is lower than or equal to 1060° C., and a thermal cleaning time is longer than or equal to 5 minutes and is shorter than or equal to 15 minutes; forming a first AlN layer on the substrate with a first V/III source ratio, the forming of the first AlN layer including supplying an Al source to the surface of the substrate without supplying a N source, and supplying both the Al source and the N source; forming a second AlN layer on the first AlN layer with a second V/III source ratio that is greater than the first ratio; and forming a GaN-based semiconductor layer on the second AlN layer.

    摘要翻译: 一种制造半导体器件的方法包括在热清洁温度高于或等于700℃且低于或等于1060°的条件下,在包括氢的气氛中对硅衬底的表面进行热清洗 热清洗时间长于或等于5分钟,并且短于或等于15分钟; 在所述衬底上以第一V / III源比形成第一AlN层,所述第一AlN层的形成包括在不提供N源的情况下向所述衬底的表面提供Al源,并且将Al源和N 资源; 在第一AlN层上以大于第一比例的第二V / III源比形成第二AlN层; 以及在所述第二AlN层上形成GaN基半导体层。

    Semiconductor device and method for manufacturing same
    9.
    发明授权
    Semiconductor device and method for manufacturing same 有权
    半导体装置及其制造方法

    公开(公告)号:US07800229B2

    公开(公告)日:2010-09-21

    申请号:US11704950

    申请日:2007-02-12

    IPC分类号: H01L23/48 H01L23/52

    摘要: An improved SIV resistance and an improved EM resistance are achieved in the coupling structure containing copper films. A semiconductor device includes: a semiconductor substrate; a second insulating layer formed on or over the semiconductor substrate; a second barrier metal film, formed on the second insulating film, and being capable of preventing copper from diffusing into the second insulating film; and an electrically conducting film formed on the second barrier metal film so as to be in contact with the second barrier metal film, and containing copper and carbon, wherein a distribution of carbon concentration along a depositing direction in the second electrically conducting film includes a first peak and a second peak.

    摘要翻译: 在包含铜膜的耦合结构中实现了改进的SIV电阻和改进的EM电阻。 半导体器件包括:半导体衬底; 形成在所述半导体衬底上或之上的第二绝缘层; 第二阻挡金属膜,形成在所述第二绝缘膜上,并且能够防止铜扩散到所述第二绝缘膜中; 以及形成在所述第二阻挡金属膜上以与所述第二阻挡金属膜接触并且含有铜和碳的导电膜,其中所述第二导电膜中沿着沉积方向的碳浓度的分布包括第一 峰值和第二高峰。

    Semiconductor device and method of manufacturing the same
    10.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号:US07728434B2

    公开(公告)日:2010-06-01

    申请号:US11962154

    申请日:2007-12-21

    申请人: Akira Furuya

    发明人: Akira Furuya

    IPC分类号: H01L23/48 H01L23/52 H01L29/40

    摘要: Aimed at improving adhesiveness between upper and lower interconnects in semiconductor devices, a semiconductor device of the present invention includes a second dielectric multi-layered film formed on a substrate, and containing a lower interconnect; a first dielectric multi-layered film formed on the second dielectric multi-layered film, and having a recess; an MOx film formed on the inner wall of the recess, and containing a metal M and oxygen as major components; an M film formed on the MOx film, and containing the M as a major component; and an electric conductor formed on the M film so as to fill the recess, and containing Cu as a major component, wherein the surficial portion of the interconnect fallen straight under the bottom of the recess has an oxygen concentration of 1% or smaller.

    摘要翻译: 为了提高半导体器件中的上下互连之间的粘合性,本发明的半导体器件包括形成在基板上并包含下互连的第二介质多层膜; 形成在所述第二电介质多层膜上并具有凹部的第一电介质多层膜; 形成在凹部的内壁上并含有金属M和氧作为主要成分的MOx膜; 形成在MOx膜上并含有M作为主要成分的M膜; 以及形成在M膜上的电导体,以填充凹部,并且包含Cu作为主要成分,其中互连的表面部分在凹部的底部下方直线的氧浓度为1%以下。