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公开(公告)号:US07199044B2
公开(公告)日:2007-04-03
申请号:US10867735
申请日:2004-06-16
IPC分类号: H01L21/4763 , H01L21/44
CPC分类号: H01L21/31695 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02271 , H01L21/02337 , H01L21/0234 , H01L21/02362 , H01L21/76807 , H01L21/7682 , H01L21/76826
摘要: In a method for manufacturing a semiconductor device, an insulating film having pores is formed on a substrate, and an opening is formed in the insulating film. Thereafter, a material gas supplying Si or C is supplied to the insulating film. Thereby, deficient elements, such as Si or C, are supplied to the insulating film. Thereafter, the opening, including a barrier metal, is filled with a conductive member to form a wiring structure.
摘要翻译: 在半导体装置的制造方法中,在基板上形成具有孔的绝缘膜,在绝缘膜上形成开口部。 然后,向绝缘膜供给供给Si或C的原料气体。 由此,向绝缘膜供给诸如Si或C的缺陷元素。 此后,包括阻挡金属的开口填充有导电构件以形成布线结构。
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公开(公告)号:US20050121786A1
公开(公告)日:2005-06-09
申请号:US10979326
申请日:2004-11-03
IPC分类号: H01L21/00 , H01L21/316 , H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/522 , H01L23/532 , H01L29/40
CPC分类号: H01L21/76843 , H01L21/76864 , H01L21/76877 , H01L23/53238 , H01L23/5329 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor device comprises a semiconductor substrate and an interlayer interconnection structure provided on the semiconductor substrate. The interlayer interconnection structure includes a porous insulation film and a conductive part of a conductive material containing a metal as a major component. A volume occupation ratio of pores of a diameter greater than 0.6 nanometers is less than 30% in the porous insulation film.
摘要翻译: 半导体器件包括设置在半导体衬底上的半导体衬底和层间互连结构。 层间互连结构包括多孔绝缘膜和以金属为主要成分的导电材料的导电部分。 在多孔绝缘膜中,直径大于0.6纳米的孔的体积占有率小于30%。
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公开(公告)号:US07737037B2
公开(公告)日:2010-06-15
申请号:US12178151
申请日:2008-07-23
申请人: Akira Furuya , Nobuyuki Otsuka , Hiroshi Okamura , Shinichi Ogawa
发明人: Akira Furuya , Nobuyuki Otsuka , Hiroshi Okamura , Shinichi Ogawa
IPC分类号: H01L21/44
CPC分类号: H01L21/022 , H01L21/02123 , H01L21/02175 , H01L21/02337 , H01L21/0234 , H01L21/318 , H01L21/3185 , H01L21/76846 , H01L21/76855 , H01L21/76862 , H01L2924/0002 , H01L2924/00
摘要: An object of the invention is to provide a semiconductor device which includes a barrier metal having high adhesiveness and diffusion barrier properties and a method of manufacturing the semiconductor device. The invention provides a semiconductor device manufacturing method including forming a first layer made of a material containing silicon on a base substance; forming a second layer containing metal and nitrogen on the first layer; and exposing the second layer to active species obtained from plasma in an atmosphere including reducing gas.
摘要翻译: 本发明的目的是提供一种包括具有高粘合性和扩散阻挡性的阻挡金属的半导体器件和制造半导体器件的方法。 本发明提供一种半导体器件制造方法,包括在基体上形成由含硅的材料制成的第一层; 在所述第一层上形成含有金属和氮的第二层; 并将第二层暴露于包括还原气体的气氛中从等离子体获得的活性物质。
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公开(公告)号:US20060115963A1
公开(公告)日:2006-06-01
申请号:US11283769
申请日:2005-11-22
申请人: Akira Furuya , Nobuyuki Otsuka , Hiroshi Okamura , Shinichi Ogawa
发明人: Akira Furuya , Nobuyuki Otsuka , Hiroshi Okamura , Shinichi Ogawa
CPC分类号: H01L21/022 , H01L21/02123 , H01L21/02175 , H01L21/02337 , H01L21/0234 , H01L21/318 , H01L21/3185 , H01L21/76846 , H01L21/76855 , H01L21/76862 , H01L2924/0002 , H01L2924/00
摘要: An object of the invention is to provide a semiconductor device which includes a barrier metal having high adhesiveness and diffusion barrier properties and a method of manufacturing the semiconductor device. The invention provides a semiconductor device manufacturing method including forming a first layer made of a material containing silicon on a base substance; forming a second layer containing metal and nitrogen on the first layer; and exposing the second layer to active species obtained from plasma in an atmosphere including reducing gas.
摘要翻译: 本发明的目的是提供一种包括具有高粘合性和扩散阻挡性的阻挡金属的半导体器件和制造半导体器件的方法。 本发明提供一种半导体器件制造方法,包括在基体上形成由含硅的材料制成的第一层; 在所述第一层上形成含有金属和氮的第二层; 并将第二层暴露于包括还原气体的气氛中从等离子体获得的活性物质。
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公开(公告)号:US20080293247A1
公开(公告)日:2008-11-27
申请号:US12178151
申请日:2008-07-23
申请人: Akira Furuya , Nobuyuki Otsuka , Hiroshi Okamura , Shinichi Ogawa
发明人: Akira Furuya , Nobuyuki Otsuka , Hiroshi Okamura , Shinichi Ogawa
IPC分类号: H01L21/768
CPC分类号: H01L21/022 , H01L21/02123 , H01L21/02175 , H01L21/02337 , H01L21/0234 , H01L21/318 , H01L21/3185 , H01L21/76846 , H01L21/76855 , H01L21/76862 , H01L2924/0002 , H01L2924/00
摘要: An object of the invention is to provide a semiconductor device which includes a barrier metal having high adhesiveness and diffusion barrier properties and a method of manufacturing the semiconductor device. The invention provides a semiconductor device manufacturing method including forming a first layer made of a material containing silicon on a base substance; forming a second layer containing metal and nitrogen on the first layer; and exposing the second layer to active species obtained from plasma in an atmosphere including reducing gas.
摘要翻译: 本发明的目的是提供一种包括具有高粘合性和扩散阻挡性的阻挡金属的半导体器件和制造半导体器件的方法。 本发明提供一种半导体器件制造方法,包括在基体上形成由含硅的材料制成的第一层; 在所述第一层上形成含有金属和氮的第二层; 并将第二层暴露于包括还原气体的气氛中从等离子体获得的活性物质。
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公开(公告)号:US08978622B2
公开(公告)日:2015-03-17
申请号:US13423438
申请日:2012-03-19
申请人: Akira Furuya
发明人: Akira Furuya
摘要: There is provided an automatic choke apparatus for an engine. A bimetal that is coupled to a choke valve of an intake system is provided in the vicinity of an outer wall face of a muffler. The muffler is divided into a first expansion chamber and a second expansion chamber across a partition plate. An exhaust hole that allows the expansion chambers to be communicated with each other is formed at the lower part of the partition plate. An exhaust gas is guided from the upstream first expansion chamber toward the downstream second expansion chamber through the exhaust hole. A bypass hole is formed at an upper part of the partition plate in such a manner that that the expansion chambers are communicated with each other as bypassing the exhaust hole. The bypass hole is open to the vicinity of the outer wall face opposite to the bimetal.
摘要翻译: 提供了一种用于发动机的自动扼流装置。 在消声器的外壁面附近设有与进气系统的阻流阀连接的双金属片。 消声器分隔成隔离隔板的第一膨胀室和第二膨胀室。 在隔板的下部形成有允许膨胀室相互连通的排气孔。 排气通过排气孔从上游第一膨胀室向下游第二膨胀室引导。 在分隔板的上部形成旁通孔,使得膨胀室相互连通,以绕过排气孔。 旁通孔向与双金属片相对的外壁面附近开放。
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公开(公告)号:US08283240B2
公开(公告)日:2012-10-09
申请号:US13171642
申请日:2011-06-29
申请人: Keiichi Yui , Isao Makabe , Ken Nakata , Takamitsu Kitamura , Akira Furuya
发明人: Keiichi Yui , Isao Makabe , Ken Nakata , Takamitsu Kitamura , Akira Furuya
IPC分类号: H01L21/20
CPC分类号: H01L21/0254 , H01L21/02381 , H01L21/02458 , H01L21/0262
摘要: A method for fabricating a semiconductor device includes forming an AlN layer on a substrate made of silicon by supplying an Al source without supplying a N source and then supplying both the Al source and the N source, and forming a GaN-based semiconductor layer on the AlN layer after the forming of the AlN layer. The forming of the AlN layer grows the AlN layer so as to satisfy the following: 76500/x0.81
摘要翻译: 一种半导体器件的制造方法包括:在不提供N源的情况下,通过供给Al源,然后供给Al源极和N源,在硅基板上形成AlN层,并在其上形成GaN基半导体层 AlN层形成后形成AlN层。 AlN层的形成使AlN层生长以满足以下要求:76500 / x0.81
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公开(公告)号:US20120003821A1
公开(公告)日:2012-01-05
申请号:US13172403
申请日:2011-06-29
申请人: Keiichi Yui , Akira Furuya , Ken Nakata , Takamitsu Kitamura , Isao Makabe
发明人: Keiichi Yui , Akira Furuya , Ken Nakata , Takamitsu Kitamura , Isao Makabe
IPC分类号: H01L21/20
CPC分类号: H01L21/0262 , C30B25/14 , C30B25/186 , C30B29/403 , H01L21/02381 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L21/02661
摘要: A method for fabricating a semiconductor device includes performing thermal cleaning for a surface of a silicon substrate in an atmosphere including hydrogen under a condition that a thermal cleaning temperature is higher than or equal to 700° C. and is lower than or equal to 1060° C., and a thermal cleaning time is longer than or equal to 5 minutes and is shorter than or equal to 15 minutes; forming a first AlN layer on the substrate with a first V/III source ratio, the forming of the first AlN layer including supplying an Al source to the surface of the substrate without supplying a N source, and supplying both the Al source and the N source; forming a second AlN layer on the first AlN layer with a second V/III source ratio that is greater than the first ratio; and forming a GaN-based semiconductor layer on the second AlN layer.
摘要翻译: 一种制造半导体器件的方法包括在热清洁温度高于或等于700℃且低于或等于1060°的条件下,在包括氢的气氛中对硅衬底的表面进行热清洗 热清洗时间长于或等于5分钟,并且短于或等于15分钟; 在所述衬底上以第一V / III源比形成第一AlN层,所述第一AlN层的形成包括在不提供N源的情况下向所述衬底的表面提供Al源,并且将Al源和N 资源; 在第一AlN层上以大于第一比例的第二V / III源比形成第二AlN层; 以及在所述第二AlN层上形成GaN基半导体层。
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公开(公告)号:US07800229B2
公开(公告)日:2010-09-21
申请号:US11704950
申请日:2007-02-12
申请人: Akira Furuya , Koji Arita , Tetsuya Kurokawa , Kaori Noda
发明人: Akira Furuya , Koji Arita , Tetsuya Kurokawa , Kaori Noda
CPC分类号: C25D3/38 , C25D5/50 , C25D7/123 , C25D15/00 , H01L21/2885 , H01L21/76801 , H01L21/76829 , H01L21/76873 , H01L21/76877 , H01L21/76883
摘要: An improved SIV resistance and an improved EM resistance are achieved in the coupling structure containing copper films. A semiconductor device includes: a semiconductor substrate; a second insulating layer formed on or over the semiconductor substrate; a second barrier metal film, formed on the second insulating film, and being capable of preventing copper from diffusing into the second insulating film; and an electrically conducting film formed on the second barrier metal film so as to be in contact with the second barrier metal film, and containing copper and carbon, wherein a distribution of carbon concentration along a depositing direction in the second electrically conducting film includes a first peak and a second peak.
摘要翻译: 在包含铜膜的耦合结构中实现了改进的SIV电阻和改进的EM电阻。 半导体器件包括:半导体衬底; 形成在所述半导体衬底上或之上的第二绝缘层; 第二阻挡金属膜,形成在所述第二绝缘膜上,并且能够防止铜扩散到所述第二绝缘膜中; 以及形成在所述第二阻挡金属膜上以与所述第二阻挡金属膜接触并且含有铜和碳的导电膜,其中所述第二导电膜中沿着沉积方向的碳浓度的分布包括第一 峰值和第二高峰。
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公开(公告)号:US07728434B2
公开(公告)日:2010-06-01
申请号:US11962154
申请日:2007-12-21
申请人: Akira Furuya
发明人: Akira Furuya
CPC分类号: H01L21/76831 , H01L21/76843 , H01L21/76844 , H01L21/76846 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要: Aimed at improving adhesiveness between upper and lower interconnects in semiconductor devices, a semiconductor device of the present invention includes a second dielectric multi-layered film formed on a substrate, and containing a lower interconnect; a first dielectric multi-layered film formed on the second dielectric multi-layered film, and having a recess; an MOx film formed on the inner wall of the recess, and containing a metal M and oxygen as major components; an M film formed on the MOx film, and containing the M as a major component; and an electric conductor formed on the M film so as to fill the recess, and containing Cu as a major component, wherein the surficial portion of the interconnect fallen straight under the bottom of the recess has an oxygen concentration of 1% or smaller.
摘要翻译: 为了提高半导体器件中的上下互连之间的粘合性,本发明的半导体器件包括形成在基板上并包含下互连的第二介质多层膜; 形成在所述第二电介质多层膜上并具有凹部的第一电介质多层膜; 形成在凹部的内壁上并含有金属M和氧作为主要成分的MOx膜; 形成在MOx膜上并含有M作为主要成分的M膜; 以及形成在M膜上的电导体,以填充凹部,并且包含Cu作为主要成分,其中互连的表面部分在凹部的底部下方直线的氧浓度为1%以下。
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