公开(公告)号：US09377769B2

公开(公告)日：2016-06-28

申请号：US13399295

申请日：2012-02-17

申请人： Akiro Kobayashi ,  Yoshihisa Kato ,  Koji Yaoita

发明人： Akiro Kobayashi ,  Yoshihisa Kato ,  Koji Yaoita

IPC分类号： G06F9/46 ,  G05B19/05 ,  G06F9/48

CPC分类号： G05B19/056 ,  G05B2219/13004 ,  G05B2219/13153 ,  G06F9/4887

摘要： A control apparatus capable of updating a user program while processing is being performed in a multitasking manner is provided. A processor includes a memory that stores a user program containing a program organization unit as well as a central processing unit executing a task containing the user program and also updating the program organization unit stored in the memory. The central processing unit is configured to execute a plurality of tasks concurrently and to execute each task with a period corresponding to the task. Moreover, the central processing unit is configured to update the program organization unit stored in the memory during the period of time from when a plurality of tasks to be executed have been finished until when the plurality of tasks are executed again.

摘要翻译： 提供能够以多任务方式执行处理时能够更新用户程序的控制装置。 处理器包括存储包含程序组织单元的用户程序的存储器以及执行包含用户程序的任务的中央处理单元，并且还更新存储在存储器中的程序组织单元。 中央处理单元被配置为同时执行多个任务，并以对应于该任务的周期来执行每个任务。 此外，中央处理单元被配置为在从要执行的多个任务完成直到再次执行多个任务的时间段期间，更新存储在存储器中的程序组织单元。

公开(公告)号：US20130002882A1

公开(公告)日：2013-01-03

申请号：US13611586

申请日：2012-09-12

申请人： Kazutoshi ONOZAWA ,  Yoshihisa Kato ,  Shinzou Kouyama

发明人： Kazutoshi ONOZAWA ,  Yoshihisa Kato ,  Shinzou Kouyama

IPC分类号： H04N5/335 ,  H04N5/33

CPC分类号： H04N5/2354 ,  G01S7/4863 ,  G01S17/87 ,  G01S17/89 ,  H04N5/2353 ,  H04N5/332 ,  H04N9/045 ,  H04N2209/045

摘要： The image-capturing device according to the present invention includes a solid-state imaging element, an infrared LED which emits infrared light, a light-emission controlling unit which causes the infrared LED to emit infrared pulsed light on a per frame time basis, and a signal processing unit which extracts, from the solid-state imaging element, a color visible-light image signal in synchronization with a non-emitting period and an infrared image signal in synchronization with an emitting period of the infrared LED. The solid-state imaging element includes an image-capturing region in which unit-arrays are two-dimensionally arranged, and each of the unit-arrays has a pixel for receiving green visible light and infrared light, a pixel for receiving red visible light and infrared light, a pixel for receiving blue visible light and infrared light, and a pixel for receiving infrared light.

摘要翻译： 根据本发明的图像捕获装置包括：固态成像元件，发射红外光的红外LED;发射控制单元，其使得红外线LED在每帧时间基础上发射红外脉冲光;以及 信号处理单元，其与红外LED的发光周期同步地从固态成像元件提取与非发光周期同步的彩色可见光图像信号和红外图像信号。 固态成像元件包括其中单元阵列被二维布置的图像捕获区域，并且每个单位阵列具有用于接收绿色可见光和红外光的像素，用于接收红色可见光的像素和 红外光，用于接收蓝色可见光和红外光的像素，以及用于接收红外光的像素。

公开(公告)号：US08226350B2

公开(公告)日：2012-07-24

申请号：US12103918

申请日：2008-04-16

申请人： Tomo Hayashigaito ,  Kenji Iwamoto ,  Yoshihisa Kato ,  Hironobu Nishida ,  Suguru Yamada ,  Manabu Miyakoda

发明人： Tomo Hayashigaito ,  Kenji Iwamoto ,  Yoshihisa Kato ,  Hironobu Nishida ,  Suguru Yamada ,  Manabu Miyakoda

IPC分类号： F04D29/54

CPC分类号： F04D19/007 ,  F04D25/0613 ,  F04D29/526

摘要： A fan apparatus includes a casing and a fan unit. The casing is a hollow member having an inlet and an outlet. The fan unit has an inlet and an outlet, and includes a plurality of axial fans. The fan unit is disposed on the inside of the casing, and the inlet of the fan unit is disposed in the vicinity of the inlet of the casing. The position of the fan unit within the casing can be varied in order to alter the air flow and static pressure of the air discharged by the fan apparatus.

摘要翻译： 风扇装置包括壳体和风扇单元。 壳体是具有入口和出口的中空构件。 风扇单元具有入口和出口，并且包括多个轴流风扇。 风扇单元设置在壳体的内部，风扇单元的入口设置在壳体的入口附近。 风扇单元在壳体内的位置可以变化，以便改变由风扇装置排放的空气的空气流量和静压力。

公开(公告)号：US08004871B2

公开(公告)日：2011-08-23

申请号：US12405799

申请日：2009-03-17

申请人： Yukihiro Kaneko ,  Yoshihisa Kato

发明人： Yukihiro Kaneko ,  Yoshihisa Kato

IPC分类号： G11C11/22

CPC分类号： G11C11/22 ,  G11C11/5657 ,  H01L27/1159 ,  H01L27/11597 ,  H01L27/12 ,  H01L29/6684 ,  H01L29/78391

摘要： A memory cell includes a memory element including a MFSFET having a gate insulating film made of a ferroelectric film, and a selection switching element including a MISFET having a gate insulating film made of a paraelectric film. A load element for a read operation is connected in series to the memory cell. The ferroelectric film and the paraelectric film are stacked with a semiconductor film being interposed therebetween. The semiconductor film forms a common channel shared by the MFSFET and the MISFET. The load element includes a MISFET having a channel made of the semiconductor film or a resistance element having a resistor made of the semiconductor film.

摘要翻译： 存储单元包括存储元件，其包括具有由铁电体膜构成的栅极绝缘膜的MFSFET，以及选择开关元件，其包括具有由绝缘膜形成的栅极绝缘膜的MISFET。 用于读取操作的负载元件与存储器单元串联连接。 铁电体膜和对称电介质膜层叠有半导体膜。 半导体膜形成由MFSFET和MISFET共享的公共通道。 负载元件包括具有由半导体膜形成的沟道的MISFET或具有由半导体膜制成的电阻器的电阻元件。

公开(公告)号：US07956916B2

公开(公告)日：2011-06-07

申请号：US12195584

申请日：2008-08-21

申请人： Takahiko Murata ,  Yoshihisa Kato ,  Shigetaka Kasuga ,  Takayoshi Yamada

发明人： Takahiko Murata ,  Yoshihisa Kato ,  Shigetaka Kasuga ,  Takayoshi Yamada

IPC分类号： H04N5/335

CPC分类号： H04N5/37452 ,  H04N5/35581 ,  H04N5/3559

摘要： Provided is a solid-state imaging device having pixel units that are two-dimensionally arranged, and including: a photodiode that generates an optical signal charge corresponding to an intensity and an exposure time of light; a MOS transistor that transfers the optical signal charge; an accumulating unit that generates a voltage corresponding to the signal charge through the MOS transistor; a storing unit that stores a voltage corresponding to an optical signal charge in the accumulating unit; and a voltage setting unit that sets a value of a voltage in the accumulating unit to a value corresponding to the voltage in the storing unit.

摘要翻译： 提供一种具有二维排列的像素单元的固态成像装置，包括：产生对应于光的强度和曝光时间的光信号电荷的光电二极管; 传输光信号电荷的MOS晶体管; 累积单元，其产生对应于通过MOS晶体管的信号电荷的电压; 存储单元，其将与所述积累单元中的光信号电荷相对应的电压存储; 以及电压设定单元，其将所述累积单元中的电压值设定为与所述存储单元中的电压对应的值。

公开(公告)号：US07629635B2

公开(公告)日：2009-12-08

申请号：US11520011

申请日：2006-09-13

申请人： Kazuhiro Kaibara ,  Shinzo Koyama ,  Yoshihisa Kato

发明人： Kazuhiro Kaibara ,  Shinzo Koyama ,  Yoshihisa Kato

IPC分类号： H01L29/51

CPC分类号： H01L27/11502 ,  H01L21/28291 ,  H01L29/78391

摘要： A semiconductor memory includes a conducting film formed on a substrate; a ferroelectric film formed above or below the conducting film; a source electrode and a drain electrode disposed in positions opposing the conducting film with the ferroelectric film sandwiched therebetween and spaced from each other; and an insulating film formed between the source electrode and the drain electrode.

摘要翻译： 半导体存储器包括形成在基板上的导电膜; 形成在导电膜上方或下方的铁电膜; 源电极和漏电极，设置在与导电膜相对的位置，铁电体膜夹在它们之间并彼此间隔开; 以及形成在源电极和漏电极之间的绝缘膜。

公开(公告)号：US20090290404A1

公开(公告)日：2009-11-26

申请号：US12405799

申请日：2009-03-17

申请人： Yukihiro KANEKO ,  Yoshihisa Kato

发明人： Yukihiro KANEKO ,  Yoshihisa Kato

IPC分类号： G11C11/22 ,  G11C11/00 ,  H01L27/115

CPC分类号： G11C11/22 ,  G11C11/5657 ,  H01L27/1159 ,  H01L27/11597 ,  H01L27/12 ,  H01L29/6684 ,  H01L29/78391

摘要： A memory cell includes a memory element including a MFSFET having a gate insulating film made of a ferroelectric film, and a selection switching element including a MISFET having a gate insulating film made of a paraelectric film. A load element for a read operation is connected in series to the memory cell. The ferroelectric film and the paraelectric film are stacked with a semiconductor film being interposed therebetween. The semiconductor film forms a common channel shared by the MFSFET and the MISFET. The load element includes a MISFET having a channel made of the semiconductor film or a resistance element having a resistor made of the semiconductor film.

摘要翻译： 存储单元包括存储元件，其包括具有由铁电体膜构成的栅极绝缘膜的MFSFET，以及选择开关元件，其包括具有由绝缘膜形成的栅极绝缘膜的MISFET。 用于读取操作的负载元件与存储器单元串联连接。 铁电体膜和对称电介质膜层叠有半导体膜。 半导体膜形成由MFSFET和MISFET共享的公共通道。 负载元件包括具有由半导体膜形成的沟道的MISFET或具有由半导体膜制成的电阻器的电阻元件。

公开(公告)号：US20050201139A1

公开(公告)日：2005-09-15

申请号：US11121011

申请日：2005-05-04

申请人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Keisuke Tanaka ,  Daisuke Ueda

发明人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Keisuke Tanaka ,  Daisuke Ueda

IPC分类号： H01L27/105 ,  G11C11/22 ,  H01L21/02 ,  H01L21/316 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/108 ,  H01L27/115

CPC分类号： H01L27/11507 ,  H01L21/31691 ,  H01L27/11502 ,  H01L28/55

摘要： A memory device includes memory cells each having a capacitor including a lower electrode, a ferroelectric film and an upper electrode which are formed in this order over a substrate made of silicon. The ferroelectric film is selectively grown on the lower electrode. Such selective formation of the ferroelectric film on the lower electrode having a desired shape prevents a damaged portion from occurring in the ferroelectric film, thus making it possible to downsize the memory cells.

摘要翻译： 存储器件包括存储单元，每个存储单元具有在由硅制成的衬底上依次形成的下电极，铁电体膜和上电极的电容器。 在下电极上选择性地生长强电介质膜。 在具有所需形状的下电极上选择性地形成铁电体膜，可防止在铁电体膜中发生损坏部分，从而可以使存储单元小型化。

公开(公告)号：US20050118910A1

公开(公告)日：2005-06-02

申请号：US11030985

申请日：2005-01-10

申请人： Hiroyoshi Ueno ,  Yoshihisa Kato ,  Isao Ichioka ,  Takekazu Adachi ,  Mamoru Murata ,  Hirokazu Hiraoka ,  Manabu Ochida ,  Masayuki Noda

发明人： Hiroyoshi Ueno ,  Yoshihisa Kato ,  Isao Ichioka ,  Takekazu Adachi ,  Mamoru Murata ,  Hirokazu Hiraoka ,  Manabu Ochida ,  Masayuki Noda

IPC分类号： B32B5/02 ,  B32B5/26 ,  B32B37/10 ,  C08J5/24 ,  D21H13/26 ,  D21H17/52 ,  D21H21/18 ,  D21H25/06 ,  D21H27/00 ,  D21H27/30 ,  H05K1/03 ,  D04H3/08 ,  B32B31/26

CPC分类号： B32B5/26 ,  B32B5/022 ,  B32B15/14 ,  B32B15/20 ,  B32B37/00 ,  B32B37/10 ,  B32B38/0036 ,  B32B38/16 ,  B32B38/164 ,  B32B2260/021 ,  B32B2260/046 ,  B32B2262/0269 ,  B32B2305/28 ,  B32B2309/02 ,  B32B2311/12 ,  B32B2398/10 ,  B32B2457/08 ,  D21H13/26 ,  D21H17/52 ,  D21H21/18 ,  D21H25/06 ,  D21H27/30 ,  H05K1/0366 ,  H05K2201/0278 ,  H05K2201/0293 ,  H05K2203/1105 ,  Y10T428/249925 ,  Y10T428/249998 ,  Y10T428/31725 ,  Y10T428/31728 ,  Y10T442/20 ,  Y10T442/2951 ,  Y10T442/60 ,  Y10T442/696 ,  Y10T442/697 ,  Y10T442/699

摘要： The present invention is to provide a base material for a laminate having a high strength, reduced thickness, and light weight. In the present invention, a base material is prepared by incorporating a thermosetting resin binder into a non-woven fabric of para-aramid fibers prepared by a wet type paper making, and then heating a plurality of the resultant non-woven fabric sheets under pressure. The non-woven fabric sheet comprises 95 to 70 mass % of the para-aramid fibers and 5 to 30 mass % of the thermosetting resin binder.

摘要翻译： 本发明提供一种具有高强度，低厚度和轻质量的层压体的基材。 在本发明中，通过将热固性树脂粘合剂结合到通过湿式造纸制备的对位芳族聚酰胺纤维的无纺织物中，然后在压力下加热多个所得的无纺布片材来制备基材 。 无纺布片包含95〜70质量％的对位芳族聚酰胺纤维和5〜30质量％的热固性树脂粘合剂。

公开(公告)号：US06787830B2

公开(公告)日：2004-09-07

申请号：US09804311

申请日：2001-03-13

申请人： Yasuhiro Shimada ,  Yoshihisa Kato

发明人： Yasuhiro Shimada ,  Yoshihisa Kato

IPC分类号： H01L2972

CPC分类号： G11C11/22 ,  H01L27/105 ,  H01L27/11585 ,  H01L27/1159 ,  H01L27/11592 ,  H01L29/6684 ,  H01L29/78391

摘要： A gate electrode and a gate insulating film are formed for each of PMOSFET, NMOSFET and ferroelectric FET. Source/drain regions are defined for the NMOSFET and ferroelectric FET and for the PMOSFET by performing ion implantation processes twice separately. An intermediate electrode connected to the gate electrode of the ferroelectric FET, a ferroelectric film and a control gate electrode are formed over a first interlevel dielectric film. An interconnect layer, which includes first and second interconnects and is connected to the gate electrodes of the CMOS device, is formed on a second interlevel dielectric film. The first and second interconnects are connected to the control gate and intermediate electrodes of the ferroelectric FET, respectively.

摘要翻译： 为PMOSFET，NMOSFET和铁电FET中的每一个形成栅极电极和栅极绝缘膜。 通过两次分别进行离子注入工艺，为NMOSFET和铁电FET以及PMOSFET定义源/漏区。 在第一层间绝缘膜上形成连接到铁电FET的栅极的中间电极，铁电体膜和控制栅电极。 包括第一和第二互连并连接到CMOS器件的栅电极的互连层形成在第二层间绝缘膜上。 第一和第二互连分别连接到铁电FET的控制栅极和中间电极。