公开(公告)号：US20190252187A1

公开(公告)日：2019-08-15

申请号：US16259585

申请日：2019-01-28

Applicant: Applied Materials, Inc.

Inventor： Yung-chen LIN ,  Qingjun ZHOU ,  Xinyu BAO ,  Ying ZHANG

IPC: H01L21/033 ,  H01L21/8234

Abstract: Embodiments described herein relate to substrate processing methods. The methods include forming a patterned hardmask material on a substrate, forming first mandrel structures on exposed regions of the substrate, and depositing a gap fill material on the substrate over the hardmask material and the first mandrel structures. The first mandrel structures are removed to expose second regions of the substrate and form second mandrel structures comprising the hardmask material and the gap fill material. Fin structures are deposited on the substrate using the second mandrel structures as a mask.

公开(公告)号：US20170229315A1

公开(公告)日：2017-08-10

申请号：US15415348

申请日：2017-01-25

Applicant: Applied Materials, Inc.

Inventor： Ying ZHANG ,  Qingjun ZHOU ,  Jonathan Sungehul KIM

IPC: H01L21/3105 ,  H01L21/311 ,  H01L21/67

CPC classification number: H01L21/3105 ,  H01L21/31116 ,  H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67207

Abstract: Embodiments described herein generally relate to a substrate processing system, such as an etch processing system. In one embodiment, a substrate processing system is disclosed herein. The substrate processing system includes a transfer chamber and a plurality of process chambers coupled to the transfer chamber. The plurality of process chambers includes a first process chamber, a second process chamber, and a third process chamber. The first process chamber is configured to directionally modify a surface of a film stack formed on the substrate. The second process chamber is configured to deposit an etchant on the surface of the film stack. The third process chamber is configured to expose the film stack to a high-temperature sublimation process.

公开(公告)号：US20190181246A1

公开(公告)日：2019-06-13

申请号：US16277634

申请日：2019-02-15

Applicant: Applied Materials, Inc.

Inventor： Xinyu BAO ,  Ying ZHANG ,  Qingjun ZHOU ,  Yung-chen LIN

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/06 ,  H01L21/762

Abstract: Methods for forming semiconductor devices, such as FinFETs, are provided. In an embodiment, a fin structure processing method includes removing a portion of a first fin of a plurality of fins formed on a substrate to expose a surface of a remaining portion of the first fin, wherein the fins are adjacent to dielectric material structures formed on the substrate; performing a deposition operation to form features on the surface of the remaining portion of the first fin by depositing a Group III-V semiconductor material in a substrate processing environment; and performing an etching operation to etch the features with an etching gas to form a plurality of openings between adjacent dielectric material structures, wherein the etching operation is performed in the same chamber as the deposition operation.

公开(公告)号：US20150262834A1

公开(公告)日：2015-09-17

申请号：US14642340

申请日：2015-03-09

Applicant: APPLIED MATERIALS, INC.

Inventor： Sergey G. BELOSTOTSKIY ,  Chinh DINH ,  Qingjun ZHOU ,  Srinivas D. NEMANI ,  Andrew NGUYEN

IPC: H01L21/311 ,  H01L21/02 ,  H01L21/263

CPC classification number: H01L21/31116 ,  H01J37/32091 ,  H01J37/32357 ,  H01J37/32422 ,  H01J37/3244 ,  H01L21/263

Abstract: A method for etching a dielectric layer disposed on a substrate is provided. The method includes de-chucking the substrate from an electrostatic chuck in an etching processing chamber, and cyclically etching the dielectric layer while the substrate is de-chucked from the electrostatic chuck. The cyclical etching includes remotely generating a plasma in an etching gas mixture supplied into the etching processing chamber to etch the dielectric layer disposed on the substrate at a first temperature. Etching the dielectric layer generates etch byproducts. The cyclical etching also includes vertically moving the substrate towards a gas distribution plate in the etching processing chamber, and flowing a sublimation gas from the gas distribution plate towards the substrate to sublimate the etch byproducts. The sublimation is performed at a second temperature, wherein the second temperature is greater than the first temperature.

Abstract translation: 提供了一种用于蚀刻设置在基板上的电介质层的方法。 该方法包括在蚀刻处理室中从静电卡盘取下基板，并在基板从静电卡盘脱卡的同时循环蚀刻电介质层。 循环蚀刻包括在提供到蚀刻处理室中的蚀刻气体混合物中远程产生等离子体，以在第一温度下蚀刻设置在基板上的电介质层。 蚀刻介电层产生蚀刻副产物。 循环蚀刻还包括将衬底垂直移动到蚀刻处理室中的气体分配板，并且使升华气体从气体分配板朝向衬底流动以升华蚀刻副产物。 升华在第二温度下进行，其中第二温度大于第一温度。

公开(公告)号：US20160293437A1

公开(公告)日：2016-10-06

申请号：US14968500

申请日：2015-12-14

Applicant: Applied Materials, Inc.

Inventor： Qingjun ZHOU ,  Jungmin KO ,  Tom CHOI ,  Sean KANG ,  Jeremiah PENDER ,  Srinivas D. NEMANI ,  Ying ZHANG

IPC: H01L21/311 ,  H01L21/3213

CPC classification number: H01L21/31116 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31105 ,  H01L21/32136 ,  H01L21/32137

Abstract: Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.

Abstract translation: 本文描述的实施例涉及用于图案化衬底的方法。 诸如双重图案化和四重图案化工艺的图案化工艺可以受益于本文所述的实施例，其包括对间隔材料执行惰性等离子体处理，对间隔材料的处理区域进行蚀刻工艺，并重复惰性等离子体处理 和蚀刻工艺以形成期望的间隔物轮廓。 惰性等离子体处理工艺可以是偏压工艺，并且蚀刻工艺可以是无偏的工艺。 可以控制各种加工参数，例如工艺气体比和压力，以影响所需的间隔物轮廓。

公开(公告)号：US20150118832A1

公开(公告)日：2015-04-30

申请号：US14062638

申请日：2013-10-24

Applicant: Applied Materials, Inc.

Inventor： Bingxi Sun WOOD ,  Li Yan MIAO ,  Huixiong DAI ,  Adam BRAND ,  Yongmei CHEN ,  Mandar B. PANDIT ,  Qingjun ZHOU

IPC: H01L21/266 ,  H01L21/3105

CPC classification number: H01L21/266 ,  H01L21/26586 ,  H01L21/31053 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/823431 ,  H01L21/845 ,  H01L29/66803

Abstract: Embodiments of the present invention provide a methods for patterning a hardmask layer with good process control for an ion implantation process, particularly suitable for manufacturing the fin field effect transistor (FinFET) for semiconductor chips. In one embodiment, a method of patterning a hardmask layer disposed on a substrate includes forming a planarization layer over a hardmask layer disposed on a substrate, disposing a patterned photoresist layer over the planarization layer, patterning the planarization layer and the hardmask layer uncovered by the patterned photoresist layer in a processing chamber, exposing a first portion of the underlying substrate, and removing the planarization layer from the substrate.

Abstract translation: 本发明的实施例提供了一种用于对具有用于离子注入工艺的良好工艺控制的硬掩模层图案化的方法，特别适用于制造用于半导体芯片的鳍式场效应晶体管（FinFET）。 在一个实施例中，图案化设置在衬底上的硬掩模层的方法包括在设置在衬底上的硬掩模层上形成平坦化层，在平坦化层上设置图案化的光致抗蚀剂层，将平坦化层和硬掩模层图案化， 在处理室中的图案化光致抗蚀剂层，暴露下面的衬底的第一部分，以及从衬底去除平坦化层。

公开(公告)号：US20170243754A1

公开(公告)日：2017-08-24

申请号：US15398011

申请日：2017-01-04

Applicant: Applied Materials, Inc.

Inventor： Aurelien TAVERNIER ,  Qingjun ZHOU ,  Tom CHOI ,  Yungchen LIN ,  Ying ZHANG ,  Olivier JOUBERT

IPC: H01L21/311 ,  H01L21/3105 ,  H01L21/8234 ,  H01L21/3115

CPC classification number: H01L21/31116 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/31155 ,  H01L21/823431

Abstract: Embodiments described herein relate to methods for etching a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment to implant ions into a spacer material, performing an etching process on an implanted region of the spacer material, and repeating the inert plasma treatment and the etching process to form a predominantly flat top spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as pressure, may be controlled to influence a desired spacer profile.

公开(公告)号：US20160293438A1

公开(公告)日：2016-10-06

申请号：US15080117

申请日：2016-03-24

Applicant: Applied Materials, Inc.

Inventor： Qingjun ZHOU ,  Jungmin KO ,  Tom CHOI ,  Sean KANG ,  Jeremiah PENDER ,  Srinivas D. NEMANI ,  Ying ZHANG

IPC: H01L21/311 ,  H01L21/3213

CPC classification number: H01L21/31116 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31105 ,  H01L21/32136 ,  H01L21/32137

Abstract: Embodiments described herein relate to methods for patterning a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment on a spacer material, performing an etching process on a treated region of the spacer material, and repeating the inert plasma treatment and the etching process to form a desired spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as process gas ratios and pressures, may be controlled to influence a desired spacer profile.

公开(公告)号：US20190252523A1

公开(公告)日：2019-08-15

申请号：US15896827

申请日：2018-02-14

Applicant: Applied Materials, Inc.

Inventor： Yung-Chen LIN ,  Qingjun ZHOU ,  Ying ZHANG

IPC: H01L29/66 ,  H01L21/8234 ,  H01L21/306 ,  H01L21/308

CPC classification number: H01L29/66795 ,  H01L21/02538 ,  H01L21/02636 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/3086 ,  H01L21/823431 ,  H01L29/7831

Abstract: Embodiments described herein relate to substrate processing methods. The methods include forming a patterned hardmask material on a substrate, forming first mandrel structures on exposed regions of the substrate, and depositing a gap fill material on the substrate over the hardmask material and the first mandrel structures. The first mandrel structures are removed to form second mandrel structures comprising the hardmask material and the gap fill material and the substrate is etched using the second mandrel structures as a mask to form fin structures.

公开(公告)号：US20160307772A1

公开(公告)日：2016-10-20

申请号：US14968509

申请日：2015-12-14

Applicant: Applied Materials, Inc.

Inventor： Tom CHOI ,  Qingjun ZHOU ,  Ying ZHANG

IPC: H01L21/311 ,  H01L21/3105

CPC classification number: H01L21/31116 ,  H01L21/0337 ,  H01L21/31155 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/3215 ,  H01L21/32155

Abstract: Embodiments described herein relate to methods for etching a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment to implant ions into a spacer material, performing an etching process on an implanted region of the spacer material, and repeating the inert plasma treatment and the etching process to form a predominantly flat top spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as pressure, may be controlled to influence a desired spacer profile.

Abstract translation: 本文所述的实施例涉及用于蚀刻衬底的方法。 图案化处理，例如双重图案化和四重图案化处理，可以受益于本文所述的实施例，其包括进行惰性等离子体处理以将离子注入到间隔物材料中，对间隔物材料的注入区域进行蚀刻处理，并重复 惰性等离子体处理和蚀刻工艺以形成主要平坦的顶部间隔物轮廓。 惰性等离子体处理工艺可以是偏压工艺，并且蚀刻工艺可以是无偏的工艺。 可以控制诸如压力的各种处理参数以影响期望的间隔物轮廓。