COVER WAFER FOR SEMICONDUCTOR PROCESSING CHAMBER

    公开(公告)号:US20220122822A1

    公开(公告)日:2022-04-21

    申请号:US17076639

    申请日:2020-10-21

    Abstract: Semiconductor processing systems according to embodiments of the present technology may include a chamber body having sidewalls and a base. The chamber body may define an internal volume. The systems may include a substrate support assembly having a shaft and a platen coupled with the shaft along a first surface of the platen. The semiconductor processing systems may include a cover plate positioned on the platen of the substrate support assembly along a second surface of the platen opposite the first surface. The cover plate may include a flange extending about an exterior region of the cover plate. The flange may be in direct contact with the platen. The cover plate may include an upper wall vertically offset from the flange. An interior volume may be defined between the upper wall and the platen of the substrate support assembly.

    DUAL CHANNEL SHOWERHEAD ASSEMBLY
    7.
    发明公开

    公开(公告)号:US20230294116A1

    公开(公告)日:2023-09-21

    申请号:US17699971

    申请日:2022-03-21

    CPC classification number: B05B7/00 B05B1/185

    Abstract: Dual channel showerhead assemblies are described. In some embodiments, the dual channel showerhead assemblies, which include a showerhead upper plate and a showerhead lower plate, enable delivery of mutually incompatible precursors along separate channels that mix in the process zone above a wafer. The dual channel showerhead assemblies provide at least two separate gas paths. In some embodiments, the hole design and hole distribution are configured for minimal jetting effect and plenum volumes for fast purging. The dual channel showerhead assemblies described herein may have a reduced purge out time compared to single channel showerheads, spiral dual channel showerheads, and bonded dual channel showerheads.

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