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公开(公告)号:US20200373270A1
公开(公告)日:2020-11-26
申请号:US16421824
申请日:2019-05-24
Applicant: Cree, Inc.
Inventor: Sung Chul Joo , Alexander Komposch , Brian William Condie , Benjamin Law , Jae Hyung Jeremiah Park
IPC: H01L23/00
Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.
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公开(公告)号:US10720379B2
公开(公告)日:2020-07-21
申请号:US16226517
申请日:2018-12-19
Applicant: Cree, Inc.
Inventor: Sung Chul Joo , Bradley Millon , Erwin Cohen
IPC: H01L23/22 , H01L23/495 , H01L23/34 , H01L23/31 , H01L23/60
Abstract: The base of an integrated circuit package comprises a first side, and a second side opposing the first side. The base further comprises, a base mounting section, a die mounting section, and a recessed section. The recessed section comprises a recess between the die mounting section and the base mounting section. The base further comprises an opening extending through the base from the first side to the second side. At least a portion of the recess intersects with the opening.
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公开(公告)号:US09735198B2
公开(公告)日:2017-08-15
申请号:US13834195
申请日:2013-03-15
Applicant: Cree, Inc.
Inventor: Sung Chul Joo , Peter Scott Andrews , Erin Welch
CPC classification number: H01L27/15 , H01L24/97 , H01L33/486 , H01L33/505 , H01L33/507 , H01L33/60 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/01322 , H01L2924/12035 , H01L2924/12041 , H01L2924/12042 , H01L2924/15787 , H01L2924/181 , H01L2924/1815 , H01L2924/00014 , H01L2924/00 , H01L2224/85
Abstract: Substrate based light emitter devices, components, and related methods are disclosed. In some aspects, light emitter components can include a substrate and a plurality of light emitter devices provided over the substrate. Each device can include a surface mount device (SMD) adapted to mount over an external substrate or heat sink. In some aspects, each device of the plurality of devices can include at least one LED chip electrically connected to one or more traces and at least one pair of bottom contacts adapted to mount over a surface of external substrate. The component can further include a continuous layer of encapsulant disposed over each device of the plurality of devices. Multiple devices can be singulated from the component.
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公开(公告)号:USD704358S1
公开(公告)日:2014-05-06
申请号:US29451761
申请日:2013-04-08
Applicant: Cree, Inc.
Designer: Sung Chul Joo , Christopher P. Hussell
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公开(公告)号:US12159817B2
公开(公告)日:2024-12-03
申请号:US17371410
申请日:2021-07-09
Applicant: Cree, Inc.
Inventor: Sung Chul Joo , Ulf Hakan Andre
IPC: H01L23/495 , H01L23/31 , H01L23/66 , H05K1/18 , H05K3/34
Abstract: A semiconductor device comprises a lead, a board, and an electrically conductive layer on the board. The lead comprises a longitudinal axis and is soldered to the electrically conductive layer. The semiconductor device further comprises a first solder dam edge and a second solder dam edge, each positioned on the lead not more than 10 mils apart from each other along the longitudinal axis.
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公开(公告)号:US20230010770A1
公开(公告)日:2023-01-12
申请号:US17371410
申请日:2021-07-09
Applicant: Cree, Inc.
Inventor: Sung Chul Joo , Ulf Hakan Andre
IPC: H01L23/495 , H01L23/66 , H01L23/31
Abstract: A semiconductor device comprises a lead, a board, and an electrically conductive layer on the board. The lead comprises a longitudinal axis and is soldered to the electrically conductive layer. The semiconductor device further comprises a first solder dam edge and a second solder dam edge, each positioned on the lead not more than 10 mils apart from each other along the longitudinal axis.
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公开(公告)号:US11289441B2
公开(公告)日:2022-03-29
申请号:US16597224
申请日:2019-10-09
Applicant: Cree, Inc.
Inventor: Sung Chul Joo , Jack Powell , Donald Farrell , Bradley Millon
Abstract: A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.
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公开(公告)号:US10886198B2
公开(公告)日:2021-01-05
申请号:US16909334
申请日:2020-06-23
Applicant: Cree, Inc.
Inventor: Sung Chul Joo , Bradley Millon , Erwin Cohen
IPC: H01L23/495 , H01L23/60 , H01L23/34 , H01L23/31
Abstract: A device comprises a base, a die, leads, and an electrically-insulating die housing covering the die. The base comprises a die mounting section in which the die is mounted. The leads extend away from the die mounting section and are electrically connected to the die. The base further comprises a base mounting section and a recessed section. The recessed section comprises a recess between the die mounting section and the base mounting section. The base further comprises a first side, a second side opposing the first side, and a thickness measured between the first and second sides. The thickness of the base throughout the recessed section is less than the thickness of the base throughout the base mounting section. The base further comprises an opening extending at least through the base mounting section from the first side to the second side.
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公开(公告)号:US10797204B2
公开(公告)日:2020-10-06
申请号:US14292244
申请日:2014-05-30
Applicant: Cree, Inc.
Inventor: Jesse Colin Reiherzer , Erin R. F. Welch , Sung Chul Joo
Abstract: Submount based light emitter components and related methods are disclosed. In some aspects, light emitter components include a reflective ceramic submount, at least one light emitter chip disposed over a first surface of the submount, a layer of optical conversion material disposed over portions of each of the at least one light emitter chip and the first surface of the submount, and a lens disposed over the layer of optical conversion material. The layer of optical conversion material and the lens define separate and discrete layers over the at least one light emitter chip and submount.
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公开(公告)号:USD777122S1
公开(公告)日:2017-01-24
申请号:US29518882
申请日:2015-02-27
Applicant: Cree, Inc.
Designer: Michael John Bergmann , Jesse Reiherzer , Joseph Gates Clark , Benjamin Jacobson , Sung Chul Joo
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