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1.发明授权Rapid tuning, low distortion digital direct modulation phase locked loop and method therefor 有权快速调谐，低失真数字直接调制锁相环及其方法
公开(公告)号：US6157271A
公开(公告)日：2000-12-05
申请号：US197986
申请日：1998-11-23
IPC分类号： H03L7/00 , H03C3/09 , H03L7/093 , H03L7/197 , H04B1/04 , H04L27/12 , H03C3/00 , H03L7/10 , H03L7/16
CPC分类号： H03C3/0991 , H03C3/0925 , H03C3/0941 , H03C3/0966 , H03L7/093 , H03L7/197 , H03L7/1976
摘要： A direct modulation phase lock loop (PLL) a voltage controlled oscillator (VCO) (114). A divider (118) has a first divider input coupled to the VCO and a second divider input to receive a modulation inducing divisor sequence. A phase detector (102) has a first detector input coupled to the divider to receive the output thereof, and a second detector input to receive a reference input. A tuning circuit (306, 406) is coupled to the phase detector and the VCO, the tuning circuit responsive to a variable DC reference potential such that the tuning circuit has a frequency response that is constant over the modulation bandwidth whereby the PLL is a type 1 PLL with low modulation distortion.
摘要翻译： 直接调制锁相环（PLL）压控振荡器（VCO）（114）。 分频器（118）具有耦合到VCO的第一分频器输入端和用于接收调制诱导除数序列的第二分频器输入端。 相位检测器（102）具有耦合到分频器以接收其输出的第一检测器输入和用于接收参考输入的第二检测器输入。 调谐电路（306,406）耦合到相位检测器和VCO，该调谐电路响应于可变的直流参考电位，使得调谐电路具有在调制带宽上恒定的频率响应，由此PLL是类型 1 PLL具有低调制失真。
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公开(公告)号：US5862493A
公开(公告)日：1999-01-19
申请号：US614604
申请日：1996-03-13
CPC分类号： H03K17/302 , H04B1/44 , Y10T307/625
摘要： A switching circuit (30) in a portable telephone connects a gate of a field-effect transistor (Q1) to a voltage below the transistor's gate threshold voltage when the voltage at a first power source terminal (B) falls below a threshold voltage, thus disconnecting the first power source terminal (B) from a portable telephone power input terminal (B+) and connecting a second power source terminal (A) to the power input terminal (B+). The threshold voltage is set at a voltage above the minimum supply voltage of the portable telephone. The first power source terminal may be connected to a main battery and the second power source terminal may be connected to an adapter such as a battery eliminator adapter, hands-free adapter, or mobile transceiver adapter. This switching circuit prevents a call in progress from being disconnected when power sources are exchanged during a GSM burst.
摘要翻译： 当第一电源端子（B）的电压低于阈值电压时，便携式电话中的开关电路（30）将场效晶体管（Q1）的栅极连接到低于晶体管栅极阈值电压的电压，因此 将第一电源端子（B）与便携式电话电源输入端子（B +）断开并将第二电源端子（A）连接到电力输入端子（B +）。 阈值电压被设定为高于便携式电话的最小电源电压的电压。 第一电源端子可以连接到主电池，并且第二电源端子可以连接到适配器，例如电池消除器适配器，免提适配器或移动收发器适配器。 当在GSM突发期间交换电源时，该切换电路防止正在进行的呼叫被断开。
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公开(公告)号：US08532623B2
公开(公告)日：2013-09-10
申请号：US11457949
申请日：2006-07-17
IPC分类号： H04L12/58
CPC分类号： H04M17/02 , H04M15/28 , H04M15/49 , H04M15/51 , H04M15/67 , H04M15/83 , H04M15/84 , H04M15/844 , H04M15/85 , H04M15/851 , H04M15/854 , H04M2215/0168 , H04M2215/2026 , H04M2215/32 , H04M2215/46 , H04M2215/48 , H04M2215/54 , H04M2215/8129 , H04M2215/8137 , H04M2215/815 , H04M2215/8166 , H04M2215/82 , H04W4/20 , H04W4/24
摘要： Described are methods of a mobile communication device for processing a balance information message from a service provider in response to a balance information query. A method includes obtaining a service provider identity from a SIM, determining a format of a balance information message and identifying a balance information message from the service provider according to the format of the balance information message. Also described is a mobile communication device that includes a transceiver, a controller, and a memory configured to store format information including a format of a balance information message. The controller is configured to generate a communication to the service provider for transmission via the wireless transceiver, the communication being based on format information including the format of a balance information query, and to determine whether an incoming message received by the wireless transceiver from the service provider conforms to the balance information message.
摘要翻译： 描述了用于响应于平衡信息查询来处理来自服务提供商的余额信息消息的移动通信设备的方法。 一种方法包括从SIM卡获取服务提供商身份，根据平衡信息消息的格式确定平衡信息消息的格式并从服务提供商识别余额信息消息。 还描述了一种移动通信设备，其包括收发器，控制器和配置为存储包括平衡信息消息格式的格式信息的存储器。 所述控制器被配置为产生到所述服务提供商的通信，用于经由所述无线收发器进行传输，所述通信基于包括所述平衡信息查询的格式的格式信息，并且确定所述无线收发器从所述服务接收到的输入消息 提供者符合余额信息消息。
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公开(公告)号：US06195536B1
公开(公告)日：2001-02-27
申请号：US09562733
申请日：2000-05-01
IPC分类号： H01Q1112
摘要： An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.
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公开(公告)号：US5896261A
公开(公告)日：1999-04-20
申请号：US977731
申请日：1997-11-25
CPC分类号： H03G3/3042 , H03G1/0088 , H03G3/3047
摘要： An electronic device (102) includes a power supply (114), an amplifier circuit (132), and a power down protection circuit (160). The power supply (114) supplies power to the electronic device (102). The amplifier circuit (132) is powered by the power supply (114) to amplify a signal into an amplified output signal and controllable to vary a power level of the amplified output signal. The power down protection circuit (160) is coupled directly to the power supply (114) to lower the power level of the amplified output signal of the amplifier circuit (132) when the power supply (114) falls below a threshold.
摘要翻译： 电子设备（102）包括电源（114），放大器电路（132）和断电保护电路（160）。 电源（114）向电子设备（102）供电。 放大器电路（132）由电源（114）供电，以将信号放大为放大的输出信号并且可控制以改变放大的输出信号的功率电平。 当电源（114）低于阈值时，掉电保护电路（160）直接耦合到电源（114）以降低放大器电路（132）的放大输出信号的功率电平。
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公开(公告)号：US06760208B1
公开(公告)日：2004-07-06
申请号：US10331901
申请日：2002-12-30
IPC分类号： H02H700
CPC分类号： H01P5/02 , H01L27/0805 , H05K1/0237 , H05K1/162 , H05K2201/0187 , H05K2201/09509 , H05K2201/09727
摘要： A distributive capacitor 205 and impedance matching network 201 and transmitter 101 that use the capacitor and are suitable for high density integration applications include a printed circuit substrate 303 comprising one of a printed circuit board and a silicon based substrate, a first conductive layer 305 disposed on the printed circuit substrate, a layer of dielectric material 307 disposed on the first conductive layer and having a thickness, the dielectric material having a dielectric constant more than five times greater than the dielectric constant of the printed circuit substrate; and a second conductive layer 309 disposed on the layer of dielectric material and having a second length 311 and a second width 603 that are selected so that the distributive capacitor operates as a transmission line.
摘要翻译： 使用该电容器并适用于高密度集成应用的分配电容器205和阻抗匹配网络201以及发射机101包括印刷电路基板303，其包括印刷电路板和硅基基板之一，第一导电层305设置在 印刷电路基板，设置在第一导电层上并具有厚度的电介质材料层307，介电材料的介电常数大于印刷电路基板的介电常数的五倍以上; 以及设置在介电材料层上并具有第二长度311和第二宽度603的第二导电层309，第二长度311和第二宽度603被选择成使得分配电容器作为传输线工作。
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公开(公告)号：US5812590A
公开(公告)日：1998-09-22
申请号：US608451
申请日：1996-02-28
CPC分类号： H04B1/69 , H04B15/04 , H04B2215/064 , H04B2215/067
摘要： A communication device (104) comprises a receiver circuit (108) receiving a modulated receive signal. A reference oscillator (132) generates a first clock signal at a first frequency, the first clock signal having harmonics. Circuitry (130) coupled to the reference oscillator and to the receiver responds to the first clock signal to produce a signal used by the receiver to reduce the frequency of the modulating signal. A frequency spreading circuit (134) is also coupled to the reference oscillator to modulate the first clock signal with a frequency spreading signal to produce a modulated clock signal including modulated harmonic frequency components. The frequency spreading circuit selectively combines the frequency spreading signal and the first clock signal. A control circuit (114) controls the frequency spreading circuit to modulate first clock signal with the frequency spreading signal when the selected received signal includes a harmonic of the first clock signal.
摘要翻译： 通信设备（104）包括接收调制的接收信号的接收机电路（108）。 参考振荡器（132）以第一频率产生第一时钟信号，第一时钟信号具有谐波。 耦合到参考振荡器和接收器的电路（130）响应于第一时钟信号以产生接收机使用的信号来降低调制信号的频率。 频率扩展电路（134）还耦合到参考振荡器，以用频率扩展信号来调制第一时钟信号，以产生包括调制谐波频率分量的调制时钟信号。 频率扩展电路选择性地组合频率扩展信号和第一时钟信号。 当所选择的接收信号包括第一时钟信号的谐波时，控制电路（114）控制频率扩展电路用频率扩展信号调制第一时钟信号。
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公开(公告)号：US06243566B1
公开(公告)日：2001-06-05
申请号：US09562734
申请日：2000-05-01
IPC分类号： H01Q1112
摘要： An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.
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公开(公告)号：US06215359B1
公开(公告)日：2001-04-10
申请号：US09563721
申请日：2000-05-01
IPC分类号： H03F3191
摘要： An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.
摘要翻译： 激励器匹配电路（125），级间匹配电路（134）和谐波滤波器匹配电路（140）将在两级功率放大器（130）的输入端的阻抗匹配在第一级（132）和第二级 （130）的功率放大器（130）的输出端以及用于多于一个感兴趣频带的功率放大器（130）的输出端。 在GSM / DCS双频带无线电话（101）中，当双频带发射机（110）以GSM模式工作时，匹配电路（124,134,140）在900MHz时提供低回波损耗。 谐波滤波器匹配电路（140）还滤除1800MHz，2700MHz和高次谐波的信号。 然而，当双频带发射机（110）处于DCS模式时，匹配电路（124,134,140）在1800MHz提供低回波损耗并且滤除2700MHz的信号和1800MHz的谐波。
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公开(公告)号：US6078794A
公开(公告)日：2000-06-20
申请号：US802831
申请日：1997-02-19
摘要： An exciter matching circuit (125), interstage matching circuit (134), and harmonic filter matching circuit (140) match impedances at the input to a two-stage power amplifier (130), between the first stage (132) and the second stage (136) of the power amplifier (130), and at the output of the power amplifier (130) for more than one frequency band of interest. In a GSM/DCS dual band radiotelephone (101), the matching circuits (124, 134, 140) provide low return loss at 900 MHz when the dual band transmitter (110) is operating in the GSM mode. The harmonic filter matching circuit (140) also filters out signals at 1800 MHz, 2700 MHz, and high order harmonics. When the dual band transmitter (110) is in DCS mode, however, the matching circuits (124, 134, 140) provide a low return loss at 1800 MHz and filter out signals at 2700 MHz and harmonics of 1800 MHz.
摘要翻译： 激励器匹配电路（125），级间匹配电路（134）和谐波滤波器匹配电路（140）将在两级功率放大器（130）的输入端的阻抗匹配在第一级（132）和第二级 （130）的功率放大器（130）的输出端以及用于多于一个感兴趣频带的功率放大器（130）的输出端。 在GSM / DCS双频带无线电话（101）中，当双频带发射机（110）以GSM模式工作时，匹配电路（124,134,140）在900MHz时提供低回波损耗。 谐波滤波器匹配电路（140）还滤除1800MHz，2700MHz和高次谐波的信号。 然而，当双频带发射机（110）处于DCS模式时，匹配电路（124,134,140）在1800MHz提供低回波损耗并且滤除2700MHz的信号和1800MHz的谐波。
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