公开(公告)号：US06492739B2

公开(公告)日：2002-12-10

申请号：US10103988

申请日：2002-03-25

申请人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

发明人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

IPC分类号： H01L23495

CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/49541 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat-radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

摘要翻译： 适用于降低耐热性和增加引脚数量的QFP及其制造方法。 QFP包括散热金属板，其散热金属板在其四个角处形成为整体结构的缓冲器，安装在散热金属板上的半导体芯片，设置在散热金属板上并围绕半导体周边的引线 芯片，用于将引线连接到半导体芯片的接合线，以及用于密封半导体芯片的一部分的密封树脂构件，引线的内引线，接合线和散热金属板的一部分。 与散热金属板一体形成的保险杠的前端位于从密封树脂构件突出的外引线的顶部的外侧。 在QFP制造方法中，具有保险杠的散热金属板和具有引线的引线框固定在密封树脂部件的外部。

公开(公告)号：US06392308B2

公开(公告)日：2002-05-21

申请号：US09794040

申请日：2001-02-28

申请人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

发明人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

IPC分类号： H01L23495

CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/49541 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat-radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

公开(公告)号：US06320270B1

公开(公告)日：2001-11-20

申请号：US09500536

申请日：2000-02-09

申请人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

发明人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

IPC分类号： H01L23495

CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/49541 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat- radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

公开(公告)号：US6104085A

公开(公告)日：2000-08-15

申请号：US299663

申请日：1999-04-27

申请人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

发明人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

IPC分类号： H01L23/28 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L21/60 ,  H01L23/02 ,  H01L23/29 ,  H01L23/433 ,  H01L23/495

CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/49541 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181

摘要： A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat-radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

摘要翻译： 适用于降低耐热性和增加引脚数量的QFP及其制造方法。 QFP包括散热金属板，其散热金属板在其四个角处形成为整体结构的缓冲器，安装在散热金属板上的半导体芯片，设置在散热金属板上并围绕半导体周边的引线 芯片，用于将引线连接到半导体芯片的接合线，以及用于密封半导体芯片的一部分的密封树脂构件，引线的内引线，接合线和散热金属板的一部分。 与散热金属板一体形成的保险杠的前端位于从密封树脂构件突出的外引线的顶部的外侧。 在QFP制造方法中，具有保险杠的散热金属板和具有引线的引线框固定在密封树脂部件的外部。

公开(公告)号：US5808359A

公开(公告)日：1998-09-15

申请号：US547774

申请日：1995-10-25

申请人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

发明人： Kuniharu Muto ,  Atsushi Nishikizawa ,  Jyunichi Tsuchiya ,  Toshiyuki Hata ,  Nobuya Koike ,  Ichio Shimizu

IPC分类号： H01L23/28 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L21/60 ,  H01L23/02 ,  H01L23/29 ,  H01L23/433 ,  H01L23/495 ,  H01L23/36 ,  H01L23/34 ,  H01L23/50

CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/49541 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/181

摘要： A QFP adapted to lowering the heat resistance and increasing the number of pins includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat-radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

摘要翻译： 适于降低耐热性和增加引脚数量的QFP包括：散热金属板，其散热金属板在其四个角部处形成作为整体结构的缓冲器，安装在散热金属板上的半导体芯片， 散热金属板并且围绕半导体芯片的周边，用于将引线连接到半导体芯片的接合线，以及用于密封半导体芯片的一部分的密封树脂构件，引线的内部引线，接合线和部分 散热金属板。 与散热金属板一体形成的保险杠的前端位于从密封树脂构件突出的外引线的顶部的外侧。 在QFP制造方法中，具有保险杠的散热金属板和具有引线的引线框固定在密封树脂部件的外部。

公开(公告)号：US20100105174A1

公开(公告)日：2010-04-29

申请号：US12652311

申请日：2010-01-05

申请人： Kuniharu Muto ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

发明人： Kuniharu Muto ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

IPC分类号： H01L21/60

CPC分类号： H01L23/49582 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/544 ,  H01L24/05 ,  H01L24/29 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/77 ,  H01L24/78 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L29/0615 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/4103 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/78 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85214 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01054 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/83205 ,  H01L2924/206

摘要： To actualize a reduction in the on-resistance of a small surface mounted package having a power MOSFET sealed therein. A silicon chip is mounted on a die pad portion integrated with leads configuring a drain lead. The silicon chip has, on the main surface thereof, a source pad and a gate pad. The backside of the silicon chip configures a drain of a power MOSFET and bonded to the upper surface of a die pad portion via an Ag paste. A lead configuring a source lead is electrically coupled to the source pad via an Al ribbon, while a lead configuring a gate lead is electrically coupled to the gate pad via an Au wire.

摘要翻译： 实现密封在其中的功率MOSFET的小型表面安装封装的导通电阻的降低。 硅芯片安装在与构成漏极引线的引线集成的管芯焊盘部分上。 硅芯片在其主表面上具有源极焊盘和栅极焊盘。 硅芯片的背面配置功率MOSFET的漏极，并通过Ag浆料粘合到芯片焊盘部分的上表面。 构成源极引线的引线通过Al带电耦合到源极焊盘，而构成栅极引线的引线通过Au线电耦合到栅极焊盘。

公开(公告)号：US20080265386A1

公开(公告)日：2008-10-30

申请号：US12057328

申请日：2008-03-27

申请人： Kuniharu MUTO ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

发明人： Kuniharu MUTO ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

IPC分类号： H01L23/495

CPC分类号： H01L23/49582 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/544 ,  H01L24/05 ,  H01L24/29 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/77 ,  H01L24/78 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L29/0615 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/4103 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/78 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01054 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/83205

摘要： To actualize a reduction in the on-resistance of a small surface mounted package having a power MOSFET sealed therein. A silicon chip is mounted on a die pad portion integrated with leads configuring a drain lead. The silicon chip has, on the main surface thereof, a source pad and a gate pad. The backside of the silicon chip configures a drain of a power MOSFET and bonded to the upper surface of a die pad portion via an Ag paste. A lead configuring a source lead is electrically coupled to the source pad via an Al ribbon, while a lead configuring a gate lead is electrically coupled to the gate pad via an Au wire.

摘要翻译： 实现密封在其中的功率MOSFET的小型表面安装封装的导通电阻的降低。 硅芯片安装在与构成漏极引线的引线集成的管芯焊盘部分上。 硅芯片在其主表面上具有源极焊盘和栅极焊盘。 硅芯片的背面配置功率MOSFET的漏极，并通过Ag浆料粘合到芯片焊盘部分的上表面。 构成源极引线的引线通过Al带电耦合到源极焊盘，而构成栅极引线的引线通过Au线电耦合到栅极焊盘。

公开(公告)号：US20120034742A1

公开(公告)日：2012-02-09

申请号：US13276995

申请日：2011-10-19

申请人： Kuniharu Muto ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

发明人： Kuniharu Muto ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

IPC分类号： H01L21/50

CPC分类号： H01L23/49582 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/544 ,  H01L24/05 ,  H01L24/29 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/77 ,  H01L24/78 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L29/0615 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/4103 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/78 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85214 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01054 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/83205 ,  H01L2924/206

摘要： To actualize a reduction in the on-resistance of a small surface mounted package having a power MOSFET sealed therein. A silicon chip is mounted on a die pad portion integrated with leads configuring a drain lead. The silicon chip has, on the main surface thereof, a source pad and a gate pad. The backside of the silicon chip configures a drain of a power MOSFET and bonded to the upper surface of a die pad portion via an Ag paste. A lead configuring a source lead is electrically coupled to the source pad via an Al ribbon, while a lead configuring a gate lead is electrically coupled to the gate pad via an Au wire.

摘要翻译： 实现密封在其中的功率MOSFET的小型表面安装封装的导通电阻的降低。 硅芯片安装在与构成漏极引线的引线集成的管芯焊盘部分上。 硅芯片在其主表面上具有源极焊盘和栅极焊盘。 硅芯片的背面配置功率MOSFET的漏极，并通过Ag浆料粘合到芯片焊盘部分的上表面。 构成源极引线的引线通过Al带电耦合到源极焊盘，而构成栅极引线的引线通过Au线电耦合到栅极焊盘。

公开(公告)号：US07667307B2

公开(公告)日：2010-02-23

申请号：US12057328

申请日：2008-03-27

申请人： Kuniharu Muto ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

发明人： Kuniharu Muto ,  Toshiyuki Hata ,  Hiroshi Sato ,  Hiroi Oka ,  Osamu Ikeda

IPC分类号： H01L23/495

CPC分类号： H01L23/49582 ,  H01L23/49503 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/544 ,  H01L24/05 ,  H01L24/29 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/77 ,  H01L24/78 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L29/0615 ,  H01L29/41766 ,  H01L29/456 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/40091 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/4103 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4846 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/78 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01054 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/83205

摘要： To actualize a reduction in the on-resistance of a small surface mounted package having a power MOSFET sealed therein. A silicon chip is mounted on a die pad portion integrated with leads configuring a drain lead. The silicon chip has, on the main surface thereof, a source pad and a gate pad. The backside of the silicon chip configures a drain of a power MOSFET and bonded to the upper surface of a die pad portion via an Ag paste. A lead configuring a source lead is electrically coupled to the source pad via an Al ribbon, while a lead configuring a gate lead is electrically coupled to the gate pad via an Au wire.

摘要翻译： 实现密封在其中的功率MOSFET的小型表面安装封装的导通电阻的降低。 硅芯片安装在与构成漏极引线的引线集成的管芯焊盘部分上。 硅芯片在其主表面上具有源极焊盘和栅极焊盘。 硅芯片的背面配置功率MOSFET的漏极，并通过Ag浆料粘合到芯片焊盘部分的上表面。 构成源极引线的引线通过Al带电耦合到源极焊盘，而构成栅极引线的引线通过Au线电耦合到栅极焊盘。

公开(公告)号：US20100261316A1

公开(公告)日：2010-10-14

申请号：US12823424

申请日：2010-06-25

申请人： Toshiyuki Hata ,  Takeshi Otani ,  Ichio Shimizu

发明人： Toshiyuki Hata ,  Takeshi Otani ,  Ichio Shimizu

IPC分类号： H01L21/60

CPC分类号： H01L24/33 ,  H01L23/49562 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device has a sealing body formed of an insulating resin and a semiconductor chip positioned within the sealing body. A gate electrode and a source electrode are on a first main surface of the semiconductor chip and a back electrode (drain electrode) is on a second main surface thereof. An upper surface of a portion of a drain electrode plate that projects in a gull wing shape is exposed from the sealing body and a lower surface thereof is connected to the back electrode through an adhesive. A gate electrode plate projects in a gull wing shape on an opposite end side of the sealing body and is connected to the gate electrode within the sealing body. A source electrode plate projects in a gull wing shape on the opposite end side of the sealing body and is connected to the source electrode within the sealing body.

摘要翻译： 半导体器件具有由绝缘树脂和位于密封体内的半导体芯片形成的密封体。 栅电极和源电极位于半导体芯片的第一主表面上，背电极（漏电极）在其第二主表面上。 漏极电极板的以鸥翼形突出的部分的上表面从密封体露出，并且其下表面通过粘合剂连接到背电极。 栅电极板在密封体的相对端侧突出为鸥翼形，并且与密封体内的栅电极连接。 源电极板在密封体的相对端侧突出为鸥翼形，并且在密封体内与源电极连接。