公开(公告)号：US20170352633A1

公开(公告)日：2017-12-07

申请号：US15684054

申请日：2017-08-23

Applicant: Micron Technology, Inc.

Inventor： Giorgio Mariottini ,  Sameer Vadhavkar ,  Wayne Huang ,  Anilkumar Chandolu ,  Mark Bossler

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L21/481 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02135 ,  H01L2224/02166 ,  H01L2224/0219 ,  H01L2224/03013 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03472 ,  H01L2224/0348 ,  H01L2224/0361 ,  H01L2224/03906 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05007 ,  H01L2224/05009 ,  H01L2224/0508 ,  H01L2224/05082 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05565 ,  H01L2224/05566 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05686 ,  H01L2224/05687 ,  H01L2224/0569 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/1146 ,  H01L2224/11472 ,  H01L2224/11906 ,  H01L2224/13018 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/94 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2924/3651 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/01047 ,  H01L2924/053 ,  H01L2924/049 ,  H01L2924/06 ,  H01L2924/04953

Abstract: The present technology is directed to manufacturing collars for under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects and associated systems. A semiconductor die includes a semiconductor material having solid-state components and an interconnect extending at least partially through the semiconductor material. An under-bump metal (UBM) structure is formed over the semiconductor material and is electrically coupled to corresponding interconnects. A collar surrounds at least a portion of the side surface of the UBM structure, and a solder material is disposed over the top surface of the UBM structure.

公开(公告)号：US20150128992A1

公开(公告)日：2015-05-14

申请号：US14605218

申请日：2015-01-26

Applicant: Micron Technology, Inc.

Inventor： Joseph Neil Greeley ,  Dan Millward ,  Wayne Huang

IPC: B08B3/10 ,  H01L21/02 ,  B08B3/12

CPC classification number: B08B3/10 ,  B08B3/12 ,  H01L21/02041 ,  H01L21/02057 ,  H01L21/67057

Abstract: Some embodiments include methods of removing particles from over surfaces of semiconductor substrates. Liquid may be flowed across the surfaces and the particles. While the liquid is flowing, electrophoresis and/or electroosmosis may be utilized to enhance transport of the particles from the surfaces and into the liquid. In some embodiments, temperature, pH and/or ionic strength within the liquid may be altered to assist in the removal of the particles from over the surfaces of the substrates.

Abstract translation: 一些实施例包括从半导体衬底的过表面去除颗粒的方法。 液体可以流过表面和颗粒。 当液体流动时，可以使用电泳和/或电渗来增强颗粒从表面和液体中的转运。 在一些实施方案中，可以改变液体内的温度，pH和/或离子强度，以有助于从基底表面上除去颗粒。

公开(公告)号：US20140106534A1

公开(公告)日：2014-04-17

申请号：US14105623

申请日：2013-12-13

Applicant: Micron Technology, Inc.

Inventor： D.V. Nirmal Ramaswamy ,  Beth R. Cook ,  Lei Bi ,  Wayne Huang ,  Ian C. Laboriante

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1675

Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.

Abstract translation: 形成存储单元的方法包括在第一导电结构上形成多价金属氧化物材料或含氧电介质材料之一。 用有机碱处理多价金属氧化物材料或含氧电介质材料的外表面。 另外的多价金属氧化物材料或含氧电介质材料形成在经处理的外表面上。 在多价金属氧化物材料或含氧介电材料的另一个上形成第二导电结构。

公开(公告)号：US11139159B2

公开(公告)日：2021-10-05

申请号：US16165296

申请日：2018-10-19

Applicant: Micron Technology, Inc.

Inventor： Joseph Neil Greeley ,  Dan Millward ,  Wayne Huang

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/67 ,  B08B3/10 ,  B08B3/12

Abstract: Some embodiments include methods of removing particles from over surfaces of semiconductor substrates. Liquid may be flowed across the surfaces and the particles. While the liquid is flowing, electrophoresis and/or electroosmosis may be utilized to enhance transport of the particles from the surfaces and into the liquid. In some embodiments, temperature, pH and/or ionic strength within the liquid may be altered to assist in the removal of the particles from over the surfaces of the substrates.

公开(公告)号：US10886244B2

公开(公告)日：2021-01-05

申请号：US15684054

申请日：2017-08-23

Applicant: Micron Technology, Inc.

Inventor： Giorgio Mariottini ,  Sameer Vadhavkar ,  Wayne Huang ,  Anilkumar Chandolu ,  Mark Bossier

IPC: H01L23/00 ,  H01L21/48

Abstract: The present technology is directed to manufacturing collars for under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects and associated systems. A semiconductor die includes a semiconductor material having solid-state components and an interconnect extending at least partially through the semiconductor material. An under-bump metal (UBM) structure is formed over the semiconductor material and is electrically coupled to corresponding interconnects. A collar surrounds at least a portion of the side surface of the UBM structure, and a solder material is disposed over the top surface of the UBM structure.

公开(公告)号：US09780052B2

公开(公告)日：2017-10-03

申请号：US14853807

申请日：2015-09-14

Applicant: Micron Technology, Inc.

Inventor： Giorgio Mariottini ,  Sameer Vadhavkar ,  Wayne Huang ,  Anilkumar Chandolu ,  Mark Bossler

IPC: H01L23/48 ,  H01L23/52 ,  H01L21/00 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02126 ,  H01L2224/02135 ,  H01L2224/0219 ,  H01L2224/03013 ,  H01L2224/0346 ,  H01L2224/03472 ,  H01L2224/0361 ,  H01L2224/03906 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05082 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/05687 ,  H01L2224/10145 ,  H01L2224/114 ,  H01L2224/11472 ,  H01L2224/13018 ,  H01L2224/13023 ,  H01L2224/13026 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/94 ,  H01L2924/014 ,  H01L2924/07025 ,  H01L2924/3651 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/053

Abstract: The present technology is directed to manufacturing collars for under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects and associated systems. A semiconductor die includes a semiconductor material having solid-state components and an interconnect extending at least partially through the semiconductor material. An under-bump metal (UBM) structure is formed over the semiconductor material and is electrically coupled to corresponding interconnects. A collar surrounds at least a portion of the side surface of the UBM structure, and a solder material is disposed over the top surface of the UBM structure.

公开(公告)号：US08809157B2

公开(公告)日：2014-08-19

申请号：US14105623

申请日：2013-12-13

Applicant: Micron Technology, Inc.

Inventor： D. V. Nirmal Ramaswamy ,  Beth R. Cook ,  Lei Bi ,  Wayne Huang ,  Ian C. Laboriante

IPC: H01L21/20

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1675

Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.

Abstract translation: 形成存储单元的方法包括在第一导电结构上形成多价金属氧化物材料或含氧电介质材料之一。 用有机碱处理多价金属氧化物材料或含氧电介质材料的外表面。 另外的多价金属氧化物材料或含氧电介质材料形成在经处理的外表面上。 在多价金属氧化物材料或含氧介电材料的另一个上形成第二导电结构。

公开(公告)号：US08633084B1

公开(公告)日：2014-01-21

申请号：US13654258

申请日：2012-10-17

Applicant: Micron Technology, Inc.

Inventor： D. V. Nirmal Ramaswamy ,  Beth R. Cook ,  Lei Bi ,  Wayne Huang ,  Ian C. Laboriante

IPC: H01L21/20

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1675

Abstract: A method of forming a memory cell includes forming one of multivalent metal oxide material or oxygen-containing dielectric material over a first conductive structure. An outer surface of the multivalent metal oxide material or the oxygen-containing dielectric material is treated with an organic base. The other of the multivalent metal oxide material or oxygen-containing dielectric material is formed over the treated outer surface. A second conductive structure is formed over the other of the multivalent metal oxide material or oxygen-containing dielectric material.

Abstract translation: 形成存储单元的方法包括在第一导电结构上形成多价金属氧化物材料或含氧电介质材料之一。 用有机碱处理多价金属氧化物材料或含氧电介质材料的外表面。 另外的多价金属氧化物材料或含氧电介质材料形成在经处理的外表面上。 在多价金属氧化物材料或含氧介电材料的另一个上形成第二导电结构。

公开(公告)号：US20210151400A1

公开(公告)日：2021-05-20

申请号：US17141134

申请日：2021-01-04

Applicant: Micron Technology, Inc.

Inventor： Giorgio Mariottini ,  Sameer Vadhavkar ,  Wayne Huang ,  Anilkumar Chandolu ,  Mark Bossler

IPC: H01L23/00 ,  H01L21/48

Abstract: The present technology is directed to manufacturing collars for under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects and associated systems. A semiconductor die includes a semiconductor material having solid-state components and an interconnect extending at least partially through the semiconductor material. An under-bump metal (UBM) structure is formed over the semiconductor material and is electrically coupled to corresponding interconnects. A collar surrounds at least a portion of the side surface of the UBM structure, and a solder material is disposed over the top surface of the UBM structure.

公开(公告)号：US10137481B2

公开(公告)日：2018-11-27

申请号：US14605218

申请日：2015-01-26

Applicant: Micron Technology, Inc.

Inventor： Joseph Neil Greeley ,  Dan Millward ,  Wayne Huang

IPC: B08B3/00 ,  B08B3/10 ,  H01L21/02 ,  H01L21/67 ,  B08B3/12

Abstract: Some embodiments include methods of removing particles from over surfaces of semiconductor substrates. Liquid may be flowed across the surfaces and the particles. While the liquid is flowing, electrophoresis and/or electroosmosis may be utilized to enhance transport of the particles from the surfaces and into the liquid. In some embodiments, temperature, pH and/or ionic strength within the liquid may be altered to assist in the removal of the particles from over the surfaces of the substrates.