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    Logic gate circuit and parallel bit test circuit for semiconductor memory devices, capable of operation at low power source levels
    10.
    发明授权
    Logic gate circuit and parallel bit test circuit for semiconductor memory devices, capable of operation at low power source levels 失效
    用于半导体存储器件的逻辑门电路和并行位测试电路，能够在低电源电平下工作

    公开(公告)号：US5646897A

    公开(公告)日：1997-07-08

    申请号：US426384

    申请日：1995-04-21

    申请人： Seigou Yukutake ,  Masahiro Iwamura ,  Kinya Mitsumoto ,  Takashi Akioka ,  Noboru Akiyama

    发明人： Seigou Yukutake ,  Masahiro Iwamura ,  Kinya Mitsumoto ,  Takashi Akioka ,  Noboru Akiyama

    IPC分类号： G11C7/10 ,  G11C29/34 ,  G11C29/50 ,  G11C7/00

    CPC分类号： G11C29/028 ,  G11C29/50 ,  G11C7/1051 ,  G11C11/41 ,  G11C2029/5004 ,  G11C29/34

    摘要： A logic circuit is provided for a memory device which can be operated at a high speed with a lower voltage power source level than conventional devices. This logic circuit can be used in a multi-bit test circuit executing the wired-OR-logic operation of complementary logic signals from a plurality of pre-sense amplifiers, receiving the output of the wired-OR-logic operation by an emitter follower using a bipolar transistor, and outputting an AND signal of the complementary logic signals by a level comparing circuit. A sense amplifier is also provided for executing the wired-OR-logic operation of complementary logic signals from a plurality of pre-sense amplifiers, raising the level of the output of the wired-OR-logic operation by a level shift circuit having a semiconductor element for applying an inverse bias potential to an input signal, executing the wired-OR-operation of the shifted up output and outputs from other blocks, and receiving and amplifying the output of the wired-OR-logic operation.

    摘要翻译： 提供了一种用于存储器件的逻辑电路，其可以以比传统器件更低的电压电源电平在高速下操作。 该逻辑电路可以用于执行来自多个预读取放大器的互补逻辑信号的有线或逻辑运算的多位测试电路，通过射极跟随器接收有线或逻辑运算的输出，使用 双极晶体管，并通过电平比较电路输出互补逻辑信号的“与”信号。 还提供读出放大器，用于执行来自多个预读放大器的互补逻辑信号的有线或逻辑运算，通过具有半导体的电平移位电路提高布线或逻辑运算的输出电平 元件，用于对输入信号施加反向偏置电位，执行移位上升输出的线或运算和其他块的输出，以及接收和放大有线逻辑运算的输出。