公开(公告)号：US20220069795A1

公开(公告)日：2022-03-03

申请号：US17002357

申请日：2020-08-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya PODDAR ,  Hau NGUYEN ,  Masamitsu MATSUURA

IPC: H03H9/02 ,  H03H9/05 ,  H03H9/10 ,  H03H9/17 ,  H03H9/24 ,  H03H3/007 ,  H03H3/04

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

公开(公告)号：US20250140624A1

公开(公告)日：2025-05-01

申请号：US18496667

申请日：2023-10-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hau NGUYEN ,  Vivek ARORA ,  Patrick Francis THOMPSON ,  Masamitsu MATSUURA ,  Daiki KOMATSU

IPC: H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/29 ,  H01L25/065

Abstract: A wafer chip scale package (WCSP) comprises first and second dies in differing voltage domains and an isolation material between the first and second dies and contacting multiple surfaces of each of the first and second dies. The package also comprises a first resin material contacting multiple surfaces of the isolation material, with the isolation material between the resin material and the first and second dies. The package also comprises a fiberglass material contacting a surface of the resin material and a second resin material contacting a surface of the fiberglass material. The package also comprises first and second conductive structures coupled to the first and second dies, respectively. The package also includes a passivation material contacting the first and second dies and the first and second conductive structures.

公开(公告)号：US20230396230A1

公开(公告)日：2023-12-07

申请号：US18454034

申请日：2023-08-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya PODDAR ,  Hau NGUYEN ,  Masamitsu MATSUURA

IPC: H03H9/02 ,  H03H9/05 ,  H03H9/10 ,  H03H9/17 ,  H03H9/24 ,  H03H3/007 ,  H03H3/04

CPC classification number: H03H9/02133 ,  H03H9/02102 ,  H03H9/02448 ,  H03H9/0523 ,  H03H9/0533 ,  H03H9/0547 ,  H03H9/1057 ,  H03H9/17 ,  H03H9/2426 ,  H03H9/2457 ,  H03H3/0073 ,  H03H3/04 ,  H03H9/1021 ,  H03H2003/0407

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

公开(公告)号：US20250096768A1

公开(公告)日：2025-03-20

申请号：US18966299

申请日：2024-12-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya PODDAR ,  Hau NGUYEN ,  Masamitsu MATSUURA

IPC: H03H9/02 ,  H03H3/007 ,  H03H3/04 ,  H03H9/05 ,  H03H9/10 ,  H03H9/17 ,  H03H9/24

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

公开(公告)号：US20230274993A1

公开(公告)日：2023-08-31

申请号：US17683253

申请日：2022-02-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya PODDAR ,  Amin SIJELMASSI ,  Hau NGUYEN ,  Kashyap MOHAN

IPC: H01L23/31 ,  H01L23/04

CPC classification number: H01L23/3121 ,  H01L23/04

Abstract: One example includes a method for fabricating an integrated circuit (IC) device. The method includes fabricating a semiconductor die comprising an IC. The method also includes patterning a film over a portion of the first surface of the semiconductor die. The method also includes attaching a second surface of the semiconductor die opposite the first surface to a substrate. The method further includes depositing molding material over the semiconductor die to cover at least the first surface of the semiconductor die.

公开(公告)号：US20210035932A1

公开(公告)日：2021-02-04

申请号：US17009664

申请日：2020-09-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hiroyuki SADA ,  Shoichi IRIGUCHI ,  Genki YANO ,  Luu Thanh NGUYEN ,  Ashok PRABHU ,  Anindya PODDAR ,  Yi YAN ,  Hau NGUYEN

IPC: H01L23/00 ,  H01L21/78

Abstract: A method for backside metallization includes inkjet printing a pattern of nanosilver conductive ink on a first surface of a silicon wafer. The silicon wafer includes a plurality of dies. The pattern includes a clearance area along a scribe line between the dies. A laser is focused, through a second surface of the wafer, at a point between the first surface of the silicon wafer and the second surface of the silicon wafer. The second surface is opposite the first surface. The dies are separated along the scribe line.