GROUP III NITRIDE-BASED MONOLITHIC MICROWAVE INTEGRATED CIRCUITS HAVING MULTI-LAYER METAL-INSULATOR-METAL CAPACITORS

    公开(公告)号:US20230291367A1

    公开(公告)日:2023-09-14

    申请号:US17688952

    申请日:2022-03-08

    Abstract: Semiconductor devices are provided that include a Group III nitride-based semiconductor layer structure. A first metal layer is formed on an upper surface of the semiconductor layer structure, a first dielectric layer is formed on an upper surface of the first metal layer, and a second metal layer is formed on an upper surface of the first dielectric layer. The first metal layer, the first dielectric layer and the second metal layer form a first capacitor. A second dielectric layer is formed on an upper surface of the second metal layer, a third dielectric layer is formed on an upper surface of the second dielectric layer, and a third metal layer is formed on upper surfaces of the second and third dielectric layers. The second metal layer, the second dielectric layer and the third metal layer form a second capacitor that is stacked on the first capacitor.

    FIELD EFFECT TRANSISTOR WITH STACKED UNIT SUBCELL STRUCTURE

    公开(公告)号:US20220328634A1

    公开(公告)日:2022-10-13

    申请号:US17848984

    申请日:2022-06-24

    Abstract: A transistor device includes a first unit subcell including having a first active region width extending in a first direction, and a second unit subcell having a second active region width extending in the first direction and arranged adjacent the first unit subcell in the first direction. The first unit subcell and the second unit subcell share a common drain contact and have separate gate contacts that are aligned in the first direction. Each unit subcell includes a field plate that is connected to a source contact outside the active region and that does not cross over the gate contact.

    Configurable metal—insulator—metal capacitor and devices

    公开(公告)号:US12183669B2

    公开(公告)日:2024-12-31

    申请号:US17554971

    申请日:2021-12-17

    Inventor: Jeremy Fisher

    Abstract: A metal-insulator-metal (MIM) capacitor component that includes a substrate, where the metal-insulator-metal (MIM) capacitor component is configured to form a first capacitor with a top metal and a first bottom metal having a dielectric layer therebetween; and where the metal-insulator-metal (MIM) capacitor component is configured to form a second capacitor with the top metal and a second bottom metal having the dielectric layer therebetween. Additionally, the top metal, the dielectric layer, the first bottom metal, and the second bottom metal are arranged on the substrate.

Patent Agency Ranking