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57 条记录 (耗时 0.043 秒)

    Comparator and voltage controlled oscillator circuit
    1.
    发明授权
    Comparator and voltage controlled oscillator circuit 有权
    比较器和压控振荡器电路

    公开(公告)号：US06456170B1

    公开(公告)日：2002-09-24

    申请号：US09538720

    申请日：2000-03-30

    申请人： Yuji Segawa ,  Masaru Otsuka ,  Osamu Kikuchi ,  Akira Haga ,  Yoshinori Yoshikawa

    发明人： Yuji Segawa ,  Masaru Otsuka ,  Osamu Kikuchi ,  Akira Haga ,  Yoshinori Yoshikawa

    IPC分类号： H03L700

    CPC分类号： H03K5/082 ,  H03K3/0231 ,  H03K3/03 ,  H03K3/0322 ,  H03K5/2481 ,  H03K5/249 ,  H03K19/0027 ,  H03K2217/0018

    摘要： The inverter functioning as a comparator, dummy inverter having the same electric characteristics as the inverter, and control circuit are provided. Vth detecting input voltage output from the control circuit is input into the dummy inverter, Vth detecting output voltage output from the dummy inverter is input into the control circuit, and the threshold voltage of the dummy inverter is detected. The threshold voltage of the inverter is controlled by controlling the back gate voltages of the MOS transistors of the dummy inverter and the inverter in such a manner that the threshold voltage of the dummy inverter coincide with an external reference voltage.

    摘要翻译： 用作比较器的逆变器，具有与逆变器相同电特性的虚拟逆变器和控制电路。 将从控制电路输出的Vth检测输入电压输入到虚拟反相器中，从虚拟反相器输出的Vth检测输出电压输入到控制电路中，并且检测虚拟反相器的阈值电压。 通过以虚拟反相器的阈值电压与外部参考电压一致的方式控制虚拟逆变器和逆变器的MOS晶体管的背栅极电压来控制逆变器的阈值电压。

    Real-time PCR system
    4.
    发明授权
    Real-time PCR system 有权
    实时PCR系统

    公开(公告)号：US08017380B2

    公开(公告)日：2011-09-13

    申请号：US12105722

    申请日：2008-04-18

    申请人： Toshiki Moriwaki ,  Tasuku Yotoriyama ,  Yuji Segawa

    发明人： Toshiki Moriwaki ,  Tasuku Yotoriyama ,  Yuji Segawa

    IPC分类号： C12Q1/68 ,  C12M1/36 ,  C12M1/38 ,  C12M3/00 ,  C12M1/34

    CPC分类号： G01K7/015 ,  B01J2219/00783 ,  B01J2219/00853 ,  B01J2219/00873 ,  B01L7/52 ,  B01L2300/0627 ,  B01L2300/0654 ,  B01L2300/0829 ,  B01L2300/0893 ,  B01L2300/1827 ,  G01N21/6428

    摘要： A real-time PCR system for detecting gene expression levels includes plural reaction regions, a like plural number of heating portions arranged corresponding to the reaction regions and having heat sources, respectively, an optical unit capable of irradiating exciting light of a specific wavelength to all of the plural reaction regions, and a like plural number of fluorescence detecting portions arranged corresponding to the reaction regions, respectively. The heating portions are each provided with a temperature detector for detecting a temperature in a vicinity of the corresponding heat source and converting the temperature into an electrical signal and also with a controller for controlling a thermal dose from the corresponding heat source based on a correlation between electrical signals and calorific values of the heat source stored beforehand.

    摘要翻译： 用于检测基因表达水平的实时PCR系统包括多个反应区域，分别对应于反应区域排列并具有热源的多个加热部分，能够将特定波长的激发光全部照射到所有的光学单元 的多个反应区域，以及分别对应于反应区域排列的多个荧光检测部分。 加热部分每个设有温度检测器，用于检测相应热源附近的温度并将温度转换成电信号，并且还具有控制器，用于根据相应的热源之间的相关性控制热剂量 预先存储的热源的电信号和发热量。

    Hybridization detecting unit relying on dielectrophoresis and sensor chip provided with the detecting unit
    6.
    发明授权
    Hybridization detecting unit relying on dielectrophoresis and sensor chip provided with the detecting unit 失效
    杂交检测单元依赖于介电电泳和设有检测单元的传感器芯片

    公开(公告)号：US07709195B2

    公开(公告)日：2010-05-04

    申请号：US11221940

    申请日：2005-09-09

    申请人： Yuji Segawa ,  Noriyuki Kishii

    发明人： Yuji Segawa ,  Noriyuki Kishii

    IPC分类号： C12Q1/68 ,  C12N11/16 ,  G01N15/06 ,  C07H21/04

    CPC分类号： B03C5/026 ,  B03C5/005 ,  B03C2201/24 ,  B03C2201/26

    摘要： A hybridization detecting unit which includes a reaction region in which hybridization takes place, a plurality of sites (e.g., the surface of electrodes) arranged in the reaction region to which is fixed a nucleic acid for detection, and means for sequentially moving by dielectrophoresis the target nucleic acid introduced into the reaction region according to the order of arrangement of the sites to which is fixed a nucleic acid for detection. A sensor chip provided with the hybridization detecting unit. The detecting unit compulsorily moves the target nucleic acid into the region where a probe nucleic acid for detection exists, thereby increasing the probability of hybridization taking place.

    摘要翻译： 杂交检测单元，其包括发生杂交的反应区域，配置在固定有用于检测的核酸的反应区域中的多个位点（例如，电极表面），以及通过介电电泳依次移动的装置 根据固定用于检测的核酸的位点的排列顺序将目标核酸引入反应区域。 设置有杂交检测单元的传感器芯片。 检测单元强制地将目标核酸移动到存在检测用探针核酸的区域，从而增加发生杂交的可能性。

    Method of producing metallic film
    7.
    发明授权
    Method of producing metallic film 失效
    金属膜的制造方法

    公开(公告)号：US06911396B2

    公开(公告)日：2005-06-28

    申请号：US10469580

    申请日：2002-12-27

    申请人： Shuzo Sato ,  Takeshi Nogami ,  Yuji Segawa

    发明人： Shuzo Sato ,  Takeshi Nogami ,  Yuji Segawa

    IPC分类号： C25D5/48 ,  C25D7/12 ,  C25F3/22 ,  H01L21/28 ,  H01L21/288 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L21/311 ,  H01L21/20 ,  H01L21/461

    CPC分类号： H01L21/76877 ,  C25D5/48 ,  C25D7/12 ,  C25F3/22 ,  H01L21/2885 ,  H01L21/7684

    摘要： Concentration of electric current due to an additive (particularly, a brightener) remaining or precipitated in a high concentration at grain boundary triple points and wiring groove portions in the surface layer of a copper plating film is obviated, whereby precedent dissolution and/or abnormal dissolution due to concentration of electric current is restrained, and an electropolished surface of the copper plating film with excellent surface smoothness is obtained.A method of producing a metallic film includes the steps of: forming a metallic plating film (copper plating film (15)) by use of a plating solution prepared by adding a plating additive for restraining void generation, bottom-up fill and overfill; and electropolishing the metallic plating film by use of an electropolishing solution prepared by adding a polishing additive capable of reacting or coupling with the plating additive component contained or precipitated in the surface layer of the metallic plating film.

    摘要翻译： 避免了由于在镀铜膜的表面层中的晶界三点和布线槽部分处高浓度地残留或沉淀的添加剂（特别是增白剂）导致的电流浓度，从而导致先前的溶解和/或异常溶解 由于电流的集中受到抑制，并且获得了具有优异表面平滑度的镀铜膜的电抛光表面。 制造金属膜的方法包括以下步骤：通过使用通过添加用于抑制空洞产生的电镀添加剂，自底向上填充和填充填充而制备的电镀液，形成金属镀膜（镀铜膜（15））。 并使用通过添加能够与包含或沉淀在金属镀膜的表面层中的镀覆添加剂成分反应或偶合的抛光添加剂而制备的电解抛光溶液电抛光金属镀膜。

    Methods of producing and polishing semiconductor device and polishing apparatus
    8.
    发明授权
    Methods of producing and polishing semiconductor device and polishing apparatus 失效
    半导体器件和抛光装置的制造和抛光方法

    公开(公告)号：US06797623B2

    公开(公告)日：2004-09-28

    申请号：US09800580

    申请日：2001-03-08

    申请人： Shuzo Sato ,  Yuji Segawa ,  Akira Yoshio ,  Hiizu Ootorii ,  Zenya Yasuda ,  Masao Ishihara ,  Takeshi Nogami ,  Naoki Komai

    发明人： Shuzo Sato ,  Yuji Segawa ,  Akira Yoshio ,  Hiizu Ootorii ,  Zenya Yasuda ,  Masao Ishihara ,  Takeshi Nogami ,  Naoki Komai

    IPC分类号： H01L21302

    CPC分类号： B24B37/042 ,  B23H5/08 ,  B24B37/046 ,  B24B37/16 ,  B24B37/26 ,  C25F3/30 ,  C25F7/00 ,  H01L21/3212 ,  H01L21/32125 ,  H01L21/7684 ,  H01L21/76843

    摘要： A method of production and a method of polishing a semiconductor device and a polishing apparatus, capable of easily flattening an initial unevenness of a metal film, excellent in efficiency of removal of an excess metal film, and capable of suppressing damage to an interlayer insulation film below the metal film when flattening the metal film by polishing, the polishing method including the steps of interposing an electrolytic solution including a chelating agent between a cathode member and the copper film, applying a voltage between the cathode member used as a cathode and the copper film used as an anode to oxidize the surface of the copper film and forming a chelate film of the oxidized copper, selectively removing a projecting portion of the chelate film corresponding to the shape of the copper film to expose the projecting portion of the copper film at its surface, and repeating the above chelate film forming step and the above chelate film removing step until the projecting portion of the copper film is flattened.

    摘要翻译： 一种生产方法和抛光半导体器件和抛光装置的方法，其能够容易地平坦化金属膜的初始不均匀性，除去过量金属膜的效率优异，并且能够抑制对层间绝缘膜的损伤 在通过抛光使金属膜平坦化时，金属膜下方的抛光方法包括以下步骤：在阴极构件和铜膜之间插入包含螯合剂的电解液，在用作阴极的阴极构件和铜 膜用作氧化铜膜的表面并形成氧化铜的螯合膜，选择性地除去与铜膜形状相对应的螯合膜的突出部分，以暴露铜膜的突出部分 并重复上述螯合膜形成步骤和上述螯合膜去除步骤，直到突出 使铜膜变平。

    Digital AGC circuit
    9.
    发明授权
    Digital AGC circuit 失效
    数字AGC电路

    公开(公告)号：US5955925A

    公开(公告)日：1999-09-21

    申请号：US972033

    申请日：1997-11-17

    申请人： Yuji Segawa ,  Kunihiko Gotoh

    发明人： Yuji Segawa ,  Kunihiko Gotoh

    IPC分类号： H03G3/20 ,  G05F1/00 ,  H03G3/00 ,  H03G3/30 ,  H03K5/156 ,  H03K9/06 ,  H03K19/20 ,  H03L5/00 ,  H04B7/26 ,  H04Q7/20

    CPC分类号： H03K5/1565 ,  H03G3/001

    摘要： An AGC circuit according to the present invention comprises: a gain controller, having a variable gain, for amplifying an input signal at a predetermined gain and generating an output signal, and for varying the gain; a comparison circuit for comparing an amplitude of the input signal or of the output signal with a predetermined reference level, and for generating a control signal that goes to a first level when the amplitude is smaller than the reference level, and that goes to a second level when the amplitude is greater than the reference level; and a duty ratio detector for supplying the control signal generated by the comparison circuit, and for generating control code in accordance with a duty ratio of the control signal, wherein the gain of the gain controller is varied by using the control code, and so adjusted that the duty ratio of the control signal is maintained to be a predetermined value. When the amplitude of the input signal or the output signal is increased, a period during which the amplitude exceeds the reference level is also extended. By utilizing this phenomenon, a gain is varied so as to maintain a control signal duty ratio of 50%, for example, so that the amplitude of the output signal is amplified to a desired value, which is maintained.

    摘要翻译： 根据本发明的AGC电路包括：具有可变增益的增益控制器，用于以预定增益放大输入信号并产生输出信号并改变增益; 比较电路，用于将输入信号或输出信号的幅度与预定参考电平进行比较，并且用于当振幅小于参考电平时产生进入第一电平的控制信号，并且进入第二电平 当幅度大于参考电平时; 以及占空比检测器，用于提供由比较电路产生的控制信号，并且用于根据控制信号的占空比产生控制码，其中增益控制器的增益通过使用控制码而改变，并且被调整 控制信号的占空比保持为预定值。 当输入信号或输出信号的振幅增加时，振幅超过基准电平的时间段也延长。 通过利用这种现象，改变增益，以保持例如50％的控制信号占空比，使得输出信号的幅度被放大到保持的期望值。

    Compander circuit
    10.
    发明授权
    Compander circuit 失效
    压缩电路

    公开(公告)号：US5633939A

    公开(公告)日：1997-05-27

    申请号：US319721

    申请日：1994-10-07

    申请人： Kazuhiro Kitani ,  Yuji Segawa ,  Kunihiko Gotoh

    发明人： Kazuhiro Kitani ,  Yuji Segawa ,  Kunihiko Gotoh

    IPC分类号： H03G1/00 ,  H03G7/06 ,  H03G7/00

    CPC分类号： H03G1/0088 ,  H03G7/06

    摘要： A compander circuit includes first and second volume controllers, a comparator, a counter and a control part. The comparator compares a compared voltage with a rectified and smoothed signal of an input signal of the compander circuit or an output signal of the first volume controller receiving the input signal, the compared voltage being an output signal of the second volume controller. The counter executes a count operation on an output signal of the comparator in synchronism with a clock signal and controls gains of the first and second volume controllers on the basis of a counter value of the counter. The control part controls a frequency of the clock signal applied to the counter by a predetermined control signal.

    摘要翻译： 压缩扩展器电路包括第一和第二音量控制器，比较器，计数器和控制部分。 比较器将比较的电压与压缩电路的输入信号的整流和平滑信号或接收输入信号的第一体积控制器的输出信号进行比较，所比较的电压是第二音量控制器的输出信号。 计数器与时钟信号同步地对比较器的输出信号执行计数操作，并且基于计数器的计数器值来控制第一和第二音量控制器的增益。 控制部分通过预定的控制信号控制施加到计数器的时钟信号的频率。