公开(公告)号：US20080088231A1

公开(公告)日：2008-04-17

申请号：US11701419

申请日：2007-02-02

Applicant: Sang Dae Kim ,  Jung Hwan Lee ,  Ho Won Choi

Inventor： Sang Dae Kim ,  Jung Hwan Lee ,  Ho Won Choi

IPC: H01J1/62 ,  H01J9/00

CPC classification number: H01L51/5231

Abstract: An electroluminescent device may be provided that includes a substrate, a first electrode provided on the substrate, a light emitting layer provided on the first electrode, and a first metal layer provided on the light emitting layer. An oxide layer may also be provided at an interface of the first metal layer and a conductive particle. Other embodiments as described herein may also be provided.

Abstract translation: 可以提供一种电致发光器件，其包括衬底，设置在衬底上的第一电极，设置在第一电极上的发光层和设置在发光层上的第一金属层。 也可以在第一金属层和导电粒子的界面处设置氧化物层。 还可以提供如本文所述的其它实施例。

公开(公告)号：US07183708B2

公开(公告)日：2007-02-27

申请号：US11224135

申请日：2005-09-13

Applicant: Kwang Heum Baik ,  Do Young Rum ,  Ki Hong Kim ,  Jung Hwan Lee

Inventor： Kwang Heum Baik ,  Do Young Rum ,  Ki Hong Kim ,  Jung Hwan Lee

IPC: H01J9/04 ,  H01J1/62 ,  H01J1/88

CPC classification number: H01L51/5246 ,  H01L27/3223 ,  H01L27/3283

Abstract: There is disclosed an organic electro luminescence display device that is adaptive for preventing the deterioration of its light emitting efficiency and picture quality, and a fabricating method thereof.An organic electro luminescence display device that is adaptive for preventing the deterioration of its light emitting efficiency and picture quality, and a fabricating method thereof are provided. The organic electro luminescence display device as embodied includes an organic electro luminescence array having first and second electrodes formed on a substrate with an organic light emitting layer therebetween, and a barrier rib in parallel to any one of the first and second electrodes; a protective barrier rib formed to enclose the organic electro luminescence array; and at least one dummy barrier rib located inside a corner area of the protective barrier rib and formed to be bent along the protective barrier rib.

Abstract translation: 公开了一种适于防止其发光效率和图像质量劣化的有机电致发光显示装置及其制造方法。 提供一种适于防止其发光效率和图像质量劣化的有机电致发光显示装置及其制造方法。 具体实施方式的有机电致发光显示装置具有有机电致发光阵列，其具有在基板上形成有有机发光层的第一和第二电极以及与第一和第二电极中的任一个平行的阻挡肋; 形成为包围有机电致发光阵列的保护性障壁; 以及位于保护性障壁的角部区域内的至少一个伪障壁，形成为沿着保护性障壁弯曲。

公开(公告)号：US10026746B2

公开(公告)日：2018-07-17

申请号：US15604028

申请日：2017-05-24

Applicant: Jeong Gil Lee ,  Jee Yong Kim ,  Jung Hwan Lee ,  Dae Seok Byeon ,  Hyun Seok Lim

Inventor： Jeong Gil Lee ,  Jee Yong Kim ,  Jung Hwan Lee ,  Dae Seok Byeon ,  Hyun Seok Lim

IPC: H01L27/115 ,  H01L27/1157 ,  H01L27/11524 ,  H01L23/535 ,  H01L29/06 ,  H01L29/788 ,  H01L29/792 ,  H01L29/423 ,  G11C16/10 ,  G11C16/26 ,  G11C16/08

Abstract: A memory device may include a gate structure including a plurality of gate electrode layers and a plurality of insulating layers alternately stacked on a substrate, a plurality of etching stop layers, extending from the insulating layers respectively, being on respective lower portions of the gate electrode layers; and a plurality of contacts connected to the gate electrode layers above upper portions of the etching stop layers, respectively, wherein respective ones of the etching stop layers include an air gap therein.

公开(公告)号：US20160268302A1

公开(公告)日：2016-09-15

申请号：US14995845

申请日：2016-01-14

Applicant: Jung-Hwan Lee ,  Jee-Yong Kim ,  Dae-Seok Byeon

Inventor： Jung-Hwan Lee ,  Jee-Yong Kim ,  Dae-Seok Byeon

IPC: H01L27/115

CPC classification number: H01L27/11582 ,  H01L21/28282 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/42352 ,  H01L29/66833

Abstract: Semiconductor devices are provided. A semiconductor device includes a stack of alternating insulation layers and gate electrodes. The semiconductor device includes a channel material in a channel recess in the stack. The semiconductor device includes a charge storage structure on the channel material, in the channel recess. Moreover, the semiconductor device includes a gate insulation layer on the channel material. The gate insulation layer undercuts a portion of the channel material. Related methods of forming semiconductor devices are also provided.

Abstract translation: 提供半导体器件。 半导体器件包括交替绝缘层和栅电极的叠层。 半导体器件包括在堆叠中的通道凹槽中的沟道材料。 半导体器件在通道凹槽中包括在沟道材料上的电荷存储结构。 此外，半导体器件在沟道材料上包括栅极绝缘层。 栅极绝缘层将沟道材料的一部分切下。 还提供了形成半导体器件的相关方法。

公开(公告)号：US09281202B2

公开(公告)日：2016-03-08

申请号：US12604757

申请日：2009-10-23

Applicant: Tae-Ho Choi ,  Jung-Hwan Lee ,  Heung-Gee Hong ,  Jeong-Ho Cho ,  Min-Wan Choo ,  Il-Seok Han

Inventor： Tae-Ho Choi ,  Jung-Hwan Lee ,  Heung-Gee Hong ,  Jeong-Ho Cho ,  Min-Wan Choo ,  Il-Seok Han

IPC: H01L29/423 ,  H01L21/28 ,  H01L29/51 ,  H01L29/66 ,  H01L29/788

CPC classification number: H01L21/28273 ,  H01L29/42324 ,  H01L29/512 ,  H01L29/66825 ,  H01L29/7881

Abstract: A nonvolatile memory cell and a method for fabricating the same can secure stable operational reliability as well as reducing a cell size. The nonvolatile memory cell includes a drain region formed in a substrate, a source region formed in the substrate to be separated from the drain region, a floating gate formed over the substrate between the drain region and the source region, a halo region formed in the substrate in a direction that the drain region is formed, a dielectric layer formed on sidewalls of the floating gate, and a control gate formed over the dielectric layer to overlap with at least one sidewall of the floating gate.

Abstract translation: 非易失性存储单元及其制造方法可以确保稳定的操作可靠性以及减小单元尺寸。 非易失性存储单元包括形成在衬底中的漏极区，形成在衬底中的与漏极区分离的源极区，在漏极区和源极区之间形成在衬底上的浮置栅， 在形成漏极区域的方向上形成衬底，形成在浮置栅极的侧壁上的电介质层以及形成在电介质层上以与浮动栅极的至少一个侧壁重叠的控制栅极。

公开(公告)号：US08743623B2

公开(公告)日：2014-06-03

申请号：US13195548

申请日：2011-08-01

Applicant: Myung Cho ,  Seong Je Park ,  Jung Hwan Lee

Inventor： Myung Cho ,  Seong Je Park ,  Jung Hwan Lee

IPC: G11C16/10 ,  G11C16/06

CPC classification number: G11C16/06 ,  G11C11/5628 ,  G11C16/26

Abstract: Methods and apparatus are disclosed, including an apparatus that has a memory cell array with a memory cell selectively coupled to a bit line. A control circuit is configured to provide a control signal. A voltage generator is configured to provide a sense signal and a precharge signal in response to the control signal. The apparatus further includes a page buffer configured to provide a bit line voltage to the bit line based on the sense signal and the precharge signal, to thereby control a programming of the memory cell.

Abstract translation: 公开了方法和装置，包括具有存储单元阵列的装置，存储单元阵列选择性地耦合到位线。 控制电路被配置为提供控制信号。 电压发生器被配置为响应于控制信号提供感测信号和预充电信号。 该装置还包括一个页面缓冲器，其配置为基于感测信号和预充电信号向位线提供位线电压，从而控制存储单元的编程。

公开(公告)号：USD704909S1

公开(公告)日：2014-05-13

申请号：US29412389

申请日：2012-02-02

Applicant: Ho Il Jeon ,  Jung Hwan Lee ,  On Kim ,  Ne Rry Son ,  Ye Ji Um

Designer： Ho Il Jeon ,  Jung Hwan Lee ,  On Kim ,  Ne Rry Son ,  Ye Ji Um

公开(公告)号：US08476692B2

公开(公告)日：2013-07-02

申请号：US13037502

申请日：2011-03-01

Applicant: Jeeyong Kim ,  WoonKyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

Inventor： Jeeyong Kim ,  WoonKyung Lee ,  Sunggil Kim ,  Jin-Kyu Kang ,  Jung-Hwan Lee ,  Bonyoung Koo ,  Kihyun Hwang ,  Byoungsun Ju ,  Jintae Noh

IPC: H01L29/778

CPC classification number: H01L27/11526 ,  H01L21/28 ,  H01L21/76841 ,  H01L23/48 ,  H01L23/535 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/4958 ,  H01L29/78 ,  H01L29/788 ,  H01L29/7883 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration.

Abstract translation: 提供半导体器件和制造半导体器件的方法。 半导体器件包括形成在衬底上的电荷存储图案; 形成在电荷存储图案上的电介质图案; 第一导电图案，包括掺杂有第一浓度的第一杂质的硅，所述第一导电图案设置在所述电介质图案上; 以及第二导电图案，其包括掺杂有第二浓度的第二杂质的金属硅化物，所述第二导电图案设置在所述第一导电图案上。 第一浓度可能高于第二浓度。

公开(公告)号：US08277685B2

公开(公告)日：2012-10-02

申请号：US13172348

申请日：2011-06-29

Applicant: Seon Mi Yoon ,  Hyeon Jin Shin ,  Jae Young Choi ,  Seong Jae Choi ,  Bum Jae Lee ,  Ungyu Paik ,  Sangkyu Lee ,  Jung Hwan Lee

Inventor： Seon Mi Yoon ,  Hyeon Jin Shin ,  Jae Young Choi ,  Seong Jae Choi ,  Bum Jae Lee ,  Ungyu Paik ,  Sangkyu Lee ,  Jung Hwan Lee

IPC: C09K11/02

CPC classification number: C08F265/00 ,  C08F20/10 ,  C08F265/04 ,  C08K5/0041 ,  C08L33/14 ,  C08L51/003 ,  C08L53/00 ,  C09K11/02 ,  C09K11/08 ,  C08L2666/02

Abstract: Disclosed is a dispersant having a multifunctional head, and a phosphor paste composition comprising the dispersant. The dispersant has a multifunctional head that comprises an acidic group, a basic group and an aromatic group, thereby enhancing an affinity for the surface of phosphor particles and improving dispersibility.

Abstract translation: 公开了具有多功能头的分散剂和包含该分散剂的荧光体浆料组合物。 分散剂具有包含酸性基团，碱性基团和芳族基团的多功能头，从而增强对荧光体颗粒的表面的亲和力并提高分散性。

公开(公告)号：US20120022779A1

公开(公告)日：2012-01-26

申请号：US13189101

申请日：2011-07-22

Applicant: Jung-Hwan LEE

Inventor： Jung-Hwan LEE

IPC: G01C21/00

CPC classification number: G01S19/21 ,  G01S19/34

Abstract: An apparatus and method for determining position using signals received by a navigation receiver. The device for determining position within a navigation network, the device including a receiver circuit for receiving positioning signals from a plurality of transmitters within the navigation network, a memory for storing the received positioning signals, and an auxiliary circuit for, when operating, generating interference which may affect reception of the positioning signals.

Abstract translation: 一种用于使用由导航接收机接收的信号来确定位置的装置和方法。 用于确定导航网络内的位置的装置，该装置包括用于从导航网络内的多个发射机接收定位信号的接收机电路，用于存储所接收的定位信号的存储器和用于在运行时产生干扰的辅助电路 这可能会影响定位信号的接收。