公开(公告)号：US20070145543A1

公开(公告)日：2007-06-28

申请号：US11320274

申请日：2005-12-28

申请人： Xiang Zeng ,  Jiangqi He ,  Dong-Ho Han

发明人： Xiang Zeng ,  Jiangqi He ,  Dong-Ho Han

IPC分类号： H01L29/40

CPC分类号： H05K3/242 ,  H01L23/66 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K2201/093 ,  H05K2201/09318 ,  H05K2201/0969 ,  H05K2201/09727 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method including modifying a characteristic impedance along a length of a plating bar of a substrate package. An apparatus including a package substrate including a plurality of transmission lines therethrough, a portion of the plurality of transmission lines each including a plating bar coupled thereto, wherein the plating bar comprises portions having different characteristic impedance along its length. A system including a computing device including a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate including a plurality of transmission lines therethrough, a portion of the plurality of transmission lines each including a plating bar coupled thereto, wherein the plating bar comprises portions having different characteristic impedance along its length.

摘要翻译： 一种方法，包括沿衬底封装的电镀条的长度改变特性阻抗。 一种包括包括穿过其中的多个传输线的封装基板的装置，所述多个传输线的一部分各自包括连接到其上的电镀板，其中所述电镀棒包括沿其长度具有不同特征阻抗的部分。 一种包括计算设备的系统，包括微处理器，所述微处理器通过衬底耦合到印刷电路板，所述衬底包括穿过其中的多个传输线，所述多个传输线中的一部分包括与其耦合的电镀板，其中， 电镀棒包括沿其长度具有不同特性阻抗的部分。

公开(公告)号：US07209025B2

公开(公告)日：2007-04-24

申请号：US10736336

申请日：2003-12-15

申请人： Hyunjun Kim ,  Jiangqi He

发明人： Hyunjun Kim ,  Jiangqi He

IPC分类号： H01F5/00 ,  H01F7/06

CPC分类号： H01L23/645 ,  H01F17/0006 ,  H01F17/0013 ,  H01F27/362 ,  H01F41/041 ,  H01F2017/008 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/552 ,  H01L2224/16 ,  H01L2924/15311 ,  H01L2924/3025 ,  Y10T29/4902

摘要： Some embodiments provide a first portion of an inductor disposed in a first layer of a multilayer substrate, a second portion of the inductor disposed in a second layer of the multilayer substrate, the second portion coupled to the first portion, and a shielding plane disposed between the first portion and the second portion.

摘要翻译： 一些实施例提供了设置在多层基板的第一层中的电感器的第一部分，电感器的第二部分设置在多层基板的第二层中，第二部分耦合到第一部分，以及屏蔽平面， 第一部分和第二部分。

公开(公告)号：US20070085198A1

公开(公告)日：2007-04-19

申请号：US11250644

申请日：2005-10-13

申请人： Wei Shi ,  Daoqiang Lu ,  Yiqun Bai ,  Qing Zhou ,  Jiangqi He

发明人： Wei Shi ,  Daoqiang Lu ,  Yiqun Bai ,  Qing Zhou ,  Jiangqi He

IPC分类号： H01L23/34

CPC分类号： H01L23/473 ,  H01L25/0657 ,  H01L25/18 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/00

摘要： Some embodiments of the present invention include apparatuses and methods relating to integrated micro-channels for removing heat from 3D through silicon architectures.

摘要翻译： 本发明的一些实施例包括与通过硅架构从3D去除热量的集成微通道相关的装置和方法。

公开(公告)号：US20050285695A1

公开(公告)日：2005-12-29

申请号：US10880637

申请日：2004-06-29

申请人： Hyunjun Kim ,  Joong-Ho Kim ,  Dong-Ho Han ,  Jiangqi He

发明人： Hyunjun Kim ,  Joong-Ho Kim ,  Dong-Ho Han ,  Jiangqi He

IPC分类号： H01P3/08 ,  H01P5/02

CPC分类号： H01P3/081 ,  H01P3/08 ,  H01P5/02

摘要： Transmission line impedance matching is described for matching an impedance discontinuity on a transmission signal trace. The apparatus includes a transmission signal trace and a non-transmission trace. The transmission signal trace has an impedance discontinuity, a first length, and a predetermined first width. The non-transmission trace is disposed near the transmission signal trace at a region corresponding to the impedance discontinuity. The non-transmission trace has a second length that is substantially less than the first length of the transmission signal trace. Additionally, the non-transmission trace is configured to be electromagnetically coupled to the transmission signal trace in the presence of a current on the transmission signal trace to provide a matched impedance on the transmission signal trace.

摘要翻译： 描述传输线阻抗匹配以匹配传输信号迹线上的阻抗不连续性。 该装置包括发送信号跟踪和非传输迹线。 发送信号迹线具有阻抗不连续性，第一长度和预定的第一宽度。 在与阻抗不连续性对应的区域处，将非传输迹线布置在发射信号迹线附近。 非透射迹线具有基本上小于发射信号迹线的第一长度的第二长度。 此外，非传输轨迹被配置为在存在传输信号迹线上的电流的情况下电磁耦合到传输信号迹线，以在传输信号迹线上提供匹配的阻抗。

公开(公告)号：US20050213281A1

公开(公告)日：2005-09-29

申请号：US10808489

申请日：2004-03-25

申请人： Jiangqi He ,  Ping Sun ,  Hyunjun Kim ,  Xiang Zeng

发明人： Jiangqi He ,  Ping Sun ,  Hyunjun Kim ,  Xiang Zeng

IPC分类号： H01G4/228 ,  H01L23/498 ,  H01L23/50 ,  H05K1/00 ,  H05K1/03 ,  H05K1/16

CPC分类号： H01G4/228 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/01019 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19103 ,  H05K1/0306 ,  H05K1/162 ,  H05K2201/0187 ,  H05K2201/0394 ,  H05K2201/09581 ,  H05K2201/10378 ,  H05K2201/10674

摘要： Extending high k material of a second dielectric layer to surround at least one thru-via designed to provide a signal other than a power signal to a die may eliminate discrete AC coupling capacitors to reduce cost and improve performance of the package.

摘要翻译： 扩展第二电介质层的高k材料以围绕设计成向芯片提供除了功率信号之外的信号的至少一个通孔可以消除离散AC耦合电容器以降低成本并提高封装的性能。

公开(公告)号：US20050201072A1

公开(公告)日：2005-09-15

申请号：US10797753

申请日：2004-03-09

申请人： Jiangqi He ,  Joong-ho Kim ,  Hyunjun Kim ,  Dong-ho Han ,  Ping Sun

发明人： Jiangqi He ,  Joong-ho Kim ,  Hyunjun Kim ,  Dong-ho Han ,  Ping Sun

IPC分类号： H01P3/08 ,  H05K1/02 ,  H05K1/11 ,  H05K1/14 ,  H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC分类号： H01P3/085 ,  H01P3/081 ,  H05K1/0253 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09318 ,  H05K2201/09663 ,  H05K2201/09727

摘要： An apparatus comprises a signal layer including a first and second signal trace. The apparatus also comprises a first reference plane including a first slot substantially parallel to the first and second signal traces. Further, the apparatus includes a dielectric layer having at least a portion disposed between the signal layer and the first reference plane.

摘要翻译： 一种装置包括包括第一和第二信号迹线的信号层。 该装置还包括第一参考平面，该第一参考平面包括基本上平行于第一和第二信号迹线的第一槽。 此外，该装置包括具有设置在信号层和第一参考平面之间的至少一部分的电介质层。

公开(公告)号：US20050139391A1

公开(公告)日：2005-06-30

申请号：US10977192

申请日：2004-10-29

申请人： Yuan-Liang Li ,  Jiangqi He ,  Dong Zhong ,  David Figueroa

发明人： Yuan-Liang Li ,  Jiangqi He ,  Dong Zhong ,  David Figueroa

IPC分类号： H01L23/498 ,  H01L23/66 ,  H01P3/08 ,  H05K1/02 ,  H05K7/06

CPC分类号： H01P3/081 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H05K1/0242 ,  H05K1/0245 ,  H05K1/0265 ,  H05K3/4644 ,  H05K2201/0715 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/0979 ,  H05K2201/098 ,  H05K2203/0733 ,  H01L2924/00

摘要： Trace configurations for carrying high-speed digital differential signals provide for reduced conduction loss and improved signal integrity. In one embodiment, a circuit board has a first set of conductive traces disposed on non-conductive material, and a second set of conductive traces parallel to the first set and disposed within the conductive material. The second set is separated from the first set by non-conductive material. Corresponding traces of the first and second sets may be in a stacked configuration. In other embodiments, conductive material may be provided between corresponding traces of the first and second sets resulting in an “I-shaped” or “U-shaped” cross-section. In yet other embodiments, the trace configurations have “T-shaped” and “L-shaped” cross-sections.