Abstract:
An apparatus for effecting transfer of electromagnetic signals intermediate a host device and a medium adjacent to the antenna includes: (a) a plurality of antenna elements arranged in an array in facing relation with a target sector; (b) a phase adjusting unit coupled with selected antenna elements and with the host unit for transferring internal signals intermediate the host device and the antenna elements; and (c) a control unit coupled with the phase adjusting unit. The phase adjusting unit cooperates with the control unit to adjust at least one parameter relating to the electromagnetic signals intermediate the host device and the antenna elements. The adjusting is carried out to cause the antenna elements to address the sector in a timed space-sharing pattern. At least two of the plurality of antenna array, the phase adjusting unit and the control unit are implemented in a unitary structure borne upon a single silicon substrate.
Abstract:
Apparatus and techniques for implementing wireless communication between integrated transmitters and integrated receivers are provided. By providing a semiconductor structure including silicon and a compound semiconductor, a single circuit can be integrated part in silicon and part in compound semiconductor. In a semiconductor structure according to the invention, a wireless transmitter and a wireless receiver can be integrated in a compound semiconductor portion of the structure and digital CMOS circuitry can be integrated in the silicon portion of the structure. This obtains substantially increased wireless transmission efficiency. The circuits according to the invention can be implemented with circuits that wirelessly transmit from one portion of the chip to another portion of the chip, or with circuits that wirelessly transmit from one integrated circuit to a second integrated circuit.
Abstract:
A semiconductor structure for providing cross-point switch functionality includes a monocrystalline silicone substrate, and an amorphous oxide material overlying the monocrystalline silicone substrate. A monocrystalline perovskite oxide material overlies the amorphous oxide material, and a monocrystalline compound semiconductor material overlies the monocrystalline perovskite oxide material. The monocrystalline compound semiconductor material includes an optical source component operable to generate a radiant energy transmission. A diffraction grating is optically coupled with the optical source component and has a configuration for passing the radiant energy transmission in a predetermined radiant energy intensity pattern, forming a plurality of replications of the radiant energy transmission. The semiconductor structure further includes at least one optical switch component optically coupled to the diffraction grating, where each optical switch component corresponds to at least one of the replicated radiant energy transmissions, and has a first state for passing the at least one replicated radiant energy transmission, and a second state prohibiting passage of the at least one replicated radiant energy transmission.
Abstract:
An integrated light source for frequency adjustment, injection locking or modulation of an oscillator is disclosed. High quality epitaxial layers of monocrystalline materials grown over monocrystalline substrates enables the formation of an active device and a light source on a monocrystalline compound semiconductor material and control circuitry for the light source on a monocrystalline substrate. The use of light to provide the frequency adjustment, injection locking or modulation of the oscillator has multiple advantages including maintenance of good phase-noise.
Abstract:
High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. Further, various shaped piezoelectric structures having optical surfaces may be disposed on the overlying monocrystalline layer for optical switching and controlled manipulation of light signals.
Abstract:
A component includes a housing (110, 1110) at least partially defining a cavity (125, 1125), a sensor element (105) located in the cavity, and a support member (340, 1140) located over the cavity, located over at least a portion of the housing, and having a hole (341, 1141) over the cavity. The component also includes a filter (345, 700, 800, 1045) located over the support member and located over the hole in the support member.
Abstract:
Frame collisions on communication channels connecting half-duplex units and a full-duplex unit are avoided using MAC and LLC layer protocols adapted to arbitrate channel usage. One or more flags can be included in MAC and LLC packet headers and/or acknowledgements to indicate whether subsequent packet transmissions will be attempted by sending units. Units receiving set flags can hold off transmission until receiving cleared flags from the sending units. In this manner, packet collisions can be avoided.
Abstract:
Call control methods are disclosed for a multi-zone, packet-based communication system using certain host devices, termed reservation proxy elements, or RPEs to establish reservations of bandwidth for calls on behalf of other participating hosts. RPEs (132-138) receive and join a multicast group address to be used for a call, and exchange RSVP signaling messages across one or more inter-zone, packet network links (148, 150, 152, 154) to reserve communication resources for the call on behalf of participating devices in various zones. The RPEs receive the multicast group address from zone controller(s) (124-130) having received a call request for a talkgroup call. The zone controllers identify the multicast group address for the call and determine locations of participating devices and RPEs for the call. Upon the RPEs reserving communication resources for the call and communicating the reservation to the zone controller(s), the zone controller(s) grant the call and participating devices join the multicast group to participate in the call. The multicast group address used for the RSVP reservation is the same address used for the actual call.
Abstract:
An apparatus for forming a semiconductor structure is provided. The apparatus includes a chamber and a plurality of first material sources positioned at least partially within the chamber. The plurality of first material sources are configured to provide materials for the formation of a monocrystalline accommodating buffer layer on a substrate. The plurality of first material sources includes an oxygen source. At least one second material source is also positioned at least partially within the chamber and is configured to provide material for the formation of a monocrystalline oxygen-doped material layer overlying the monocrystalline accommodating buffer layer. The apparatus also includes an oxygen-adjustment mechanism configured to adjust the partial pressure of oxygen in the chamber.
Abstract:
High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.