Active feedback circuit for gain linearization
    3.
    发明申请
    Active feedback circuit for gain linearization 审中-公开
    用于增益线性化的主动反馈电路

    公开(公告)号:US20030011040A1

    公开(公告)日:2003-01-16

    申请号:US09903742

    申请日:2001-07-13

    申请人: MOTOROLA, INC.

    IPC分类号: H01L031/0328

    摘要: An active feedback network for gain linearization is disclosed. High quality epitaxial layers of monocrystalline materials grown over monocrystalline substrates enables the formation of an active device on a monocrystalline compound semiconductor material and an active feedback device on a monocrystalline substrate. Alternatively, the active device may be formed on the monocrystalline substrate and the active feedback device may be formed on the monocrystalline compound semiconductor material. In either case, the differing characteristics of each semiconductor material is used to advantageously provide wideband operation with additional benefits in stability.

    摘要翻译: 公开了一种用于增益线性化的主动反馈网络。 在单晶衬底上生长的单晶材料的高质量外延层使得能够在单晶化合物半导体材料上形成有源器件,并在单晶衬底上形成有源反馈器件。 或者,有源器件可以形成在单晶衬底上,并且有源反馈器件可以形成在单晶化合物半导体材料上。 在任一种情况下,每种半导体材料的不同特性用于有利地提供宽带操作和稳定性的额外益处。

    Structure and method for fabricating heterojunction bipolar transistors and high electron mobility transistors utilizing the formation of a complaint substrates for materials used to form the same
    4.
    发明申请
    Structure and method for fabricating heterojunction bipolar transistors and high electron mobility transistors utilizing the formation of a complaint substrates for materials used to form the same 失效
    用于制造异质结双极晶体管和高电子迁移率晶体管的结构和方法,其利用形成用于形成异质结双极晶体管的材料的投诉基板

    公开(公告)号:US20030017683A1

    公开(公告)日:2003-01-23

    申请号:US09906783

    申请日:2001-07-18

    申请人: MOTOROLA, INC.

    IPC分类号: H01L021/20

    摘要: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Once such a structure is built, a high electron mobility transistor (HEMT) or a heterojunction bipolar transistor (HBT) can be constructed on the structure. A HEMT or HBT of the above structure can then be used in a switch or in an amplifier.

    摘要翻译: 通过形成用于生长单晶层的柔性衬底,可以将单晶材料的高质量外延层生长在覆盖单晶衬底(例如大硅晶片)上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 一旦构建了这种结构,就可以在该结构上构建高电子迁移率晶体管(HEMT)或异质结双极晶体管(HBT)。 因此,上述结构的HEMT或HBT可用于开关或放大器中。

    Semiconductor structure for isolating high frequency circuitry and method for fabricating
    6.
    发明申请
    Semiconductor structure for isolating high frequency circuitry and method for fabricating 审中-公开
    用于隔离高频电路的半导体结构和制造方法

    公开(公告)号:US20030020070A1

    公开(公告)日:2003-01-30

    申请号:US09911478

    申请日:2001-07-25

    申请人: MOTOROLA, INC.

    IPC分类号: H01L031/0256

    摘要: A semiconductor structure for isolating high frequency circuitry includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, a plurality of high frequency circuits formed in and over the monocrystalline compound semiconductor material, and at least one embedded isolation wall lying within the compound semiconductor material to isolate the high frequency circuits.

    摘要翻译: 用于隔离高频电路的半导体结构包括单晶硅衬底,覆盖单晶硅衬底的无定形氧化物材料,覆盖非晶氧化物材料的单晶钙钛矿氧化物材料,覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料, 形成在单晶化合物半导体材料中和之上的高频电路,以及位于化合物半导体材料内的隔离高频电路的至少一个嵌入式隔离壁。

    Structure and method for fabricating vertical fet semiconductor structures and devices
    7.
    发明申请
    Structure and method for fabricating vertical fet semiconductor structures and devices 审中-公开
    用于制造垂直胎儿半导体结构和器件的结构和方法

    公开(公告)号:US20030013241A1

    公开(公告)日:2003-01-16

    申请号:US09905116

    申请日:2001-07-16

    申请人: MOTOROLA, INC.

    IPC分类号: H01L021/336

    摘要: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. Also disclosed is a semiconductor structure incorporating a plurality of field effect transistors in a monolithic substrate wherein an amorphous oxide material overlies the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlies the amorphous oxide material, a monocrystalline compound semiconductor material overlies the monocrystalline perovskite oxide material and forms a vertical conductive channel having a vertical conductive pathway comprising a doped n type III-V semiconductor material, and contacts arrayed vertically along the conductive channel forming a source, gate and drain for a vertical field effect transistor.

    摘要翻译: 通过形成用于生长单晶层的柔性衬底,可以将单晶材料的高质量外延层生长在覆盖单晶衬底(例如大硅晶片)上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 此外,顺应性衬底的形成可以包括利用表面活性剂增强的外延,将单晶硅外延生长到单晶氧化物上,以及Zintl相材料的外延生长。 还公开了在单片基板中结合有多个场效应晶体管的半导体结构,其中非晶氧化物材料覆盖在单晶硅衬底上,单晶钙钛矿氧化物材料覆盖在非晶氧化物材料上,单晶化合物半导体材料覆盖单晶钙钛矿氧化物材料 并且形成具有垂直导电通路的垂直导电通道,该导电通路包括掺杂的n型III-V族半导体材料,以及沿着形成用于垂直场效应晶体管的源极,栅极和漏极的导电沟道排列的触点。

    Semiconductor structure for monolithic switch matrix and method of manufacturing
    8.
    发明申请
    Semiconductor structure for monolithic switch matrix and method of manufacturing 审中-公开
    单片开关矩阵的半导体结构及其制造方法

    公开(公告)号:US20030020121A1

    公开(公告)日:2003-01-30

    申请号:US09911464

    申请日:2001-07-25

    申请人: MOTOROLA, INC.

    摘要: A semiconductor structure for a high frequency monolithic switch matrix includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material, and a high frequency semiconductor integrated formed in and over the monocrystalline compound semiconductor material having one or more input ports and one or more output ports. The high frequency semiconductor integrated circuit also includes a high frequency switch circuit that is electrically coupled to a switch driver control circuit that is fabricated on the monocrystalline compound semiconductor material and which provides the DC signals required to control the high frequency circuit.

    摘要翻译: 用于高频单片开关矩阵的半导体结构包括单晶硅衬底,覆盖单晶硅衬底的无定形氧化物材料,覆盖在非晶氧化物材料上的单晶钙钛矿氧化物材料,覆盖单晶钙钛矿氧化物材料的单晶化合物半导体材料,以及 集成形成在具有一个或多个输入端口和一个或多个输出端口的单晶化合物半导体材料中和之上的高频半导体。 高频半导体集成电路还包括高频开关电路,其电耦合到制造在单晶化合物半导体材料上的开关驱动器控制电路,并提供控制高频电路所需的DC信号。