Abstract:
A micro-electrical-mechanical systems (MEMS) device includes a substrate, one or more anchors formed on a first surface of the substrate, and a piezoelectric layer suspended over the first surface of the substrate by the one or more anchors. A first electrode may be provided on a first surface of the piezoelectric layer facing the first surface of the substrate, such that the first electrode is in contact with a first bimorph layer of the piezoelectric layer. A second electrode may be provided on a second surface of the piezoelectric layer opposite the first surface, such that the second electrode is in contact with a second bimorph layer of the piezoelectric layer.
Abstract:
A first plate-able layer is selectively plated to form one or more redistribution paths. The connection points of an IC package are connected to the redistribution paths, and the IC package is over molded for stability. The first plate-able layer is then removed, leaving the one or more redistribution paths exposed. The redistribution paths allow one or more contact points of the IC package to be moved to a new location in order to facilitate integration of the IC package into a system. By plating the redistribution paths up from the first plate-able layer, fine geometries for repositioning the contact points of the IC package with minimal conductor thickness are achieved without the need for specialized manufacturing equipment. Accordingly, a redistribution layer is formed at a low cost while minimizing the impact of the layer on the operation of the IC device.
Abstract:
A switch mode power supply converter and a feedback delay compensation circuit are disclosed. The switch mode power supply converter has a switching voltage output and provides a switching voltage at the switching voltage output, such that a target voltage for a power amplifier supply voltage at a power amplifier supply output is based on the switching voltage. Further, the switching voltage is based on an early indication of a change of the target voltage. The feedback delay compensation circuit provides the early indication of the change of the target voltage.
Abstract:
A semiconductor device having improved heat dissipation is disclosed. The semiconductor device includes a semi-insulating substrate and epitaxial layers disposed on the semi-insulating substrate wherein the epitaxial layers include a plurality of heat conductive vias that are disposed through the epitaxial layers with the plurality of heat conductive vias being spaced along a plurality of finger axes that are aligned generally parallel across a surface of the epitaxial layers. The semiconductor device further includes an electrode having a plurality of electrically conductive fingers that are disposed along the plurality of finger axes such that the electrically conductive fingers are in contact with the first plurality of heat conductive vias.
Abstract:
A lateral semiconductor device having a vertical region for providing a protective avalanche breakdown (PAB) is disclosed. The lateral semiconductor device has a lateral structure that includes a conductive substrate, semi-insulating layer(s) disposed on the conductive substrate, device layer(s) disposed on the semi-insulating layer(s), along with a source electrode and a drain electrode disposed on the device layer(s). The vertical region is separated from the source electrode by a lateral region wherein the vertical region has a relatively lower breakdown voltage level than a relatively higher breakdown voltage level of the lateral region for providing the PAB within the vertical region to prevent a potentially damaging breakdown of the lateral region. The vertical region is structured to be more rugged than the lateral region and thus will not be damaged by a PAB event.
Abstract:
A front end radio architecture (FERA) with power management is disclosed. The FERA includes a first power amplifier (PA) block having a first-first PA for amplifying first-first signals and a first-second PA for amplifying first-second signals. Also included is a second PA block having a second-first PA for amplifying second-first signals and a second-second PA for amplifying second-second signals. At least one power supply is adapted to selectively supply power to the first-first PA and the second-second PA through a first path. The power supply is also adapted to selectively supply power to the first-second PA and the second-first PA through a second path. A control system is adapted to selectively enable and disable the first-first PA, the first-second PA, the second-first PA, and the second-second PA.
Abstract:
Programmable delay circuitry, which includes an input buffer circuit and variable delay circuitry, is disclosed. The variable delay circuitry includes an input stage, a correction start voltage circuit, and a variable delay capacitor. The input buffer circuit is coupled to the input stage, the correction start voltage circuit is coupled to the input stage, and the variable delay capacitor is coupled to the input stage. The programmable delay circuitry is configured to provide a fixed time delay and a variable time delay.
Abstract:
The present disclosure relates to envelope power supply calibration of a multi-mode RF power amplifier (PA) to ensure adequate headroom when operating using one of multiple communications modes. The communications modes may include multiple modulation modes, a half-duplex mode, a full-duplex mode, or any combination thereof. As such, each communications mode may have specific peak-to-average power and linearity requirements for the multi-mode RF PA. As a result, each communications mode may have corresponding envelope power supply headroom requirements. The calibration may include determining a saturation operating constraint based on calibration data obtained during saturated operation of the multi-mode RF PA. During operation of the multi-mode RF PA, the envelope power supply may be restricted to provide a minimum allowable magnitude based on an RF signal level of the multi-mode RF PA, the communications mode, and the saturation operating constraint to provide adequate headroom.
Abstract:
RF front-end circuitry arranged to provide for RF Multiple-Input and Multiple-Output (MIMO) signals is disclosed. In one embodiment, the RF front-end circuitry may include an antenna port, a first multiple throw (MT) switch, and a second MT switch. The first MT switch is configured to selectively couple a first pole port to any one of a first set of throw ports, and the second MT switch is configured to selectively couple a second pole port to any one of a second set of throw ports. The first pole port of the first MT switch is coupled to the antenna port. More than one of the second set of throw ports of the second MT switch are coupled to transmit one or more receive MIMO signals to RF transceiver circuitry. Accordingly, the RF front-end circuitry routes receive MIMO signals from the antenna port to the RF transceiver circuitry.
Abstract:
A power amplification device is disclosed that includes a power amplification circuit operable to amplify a radio frequency (RF) signal in accordance with an amplification gain, and a voltage regulation circuit operable to generate a regulated voltage. A regulated voltage level of the regulated voltage sets the amplification gain. To help prevent the voltage regulation circuit from saturating, the voltage regulation circuit is configured to reduce a voltage adjustment gain when the regulated voltage level reaches a threshold voltage level. In one embodiment, the threshold voltage level is set to be higher when a band-select signal indicates that the RF signal is being transmitted within a first frequency band, and is set to be lower when the band-select signal indicates that the RF signal is being transmitted within a second frequency band. The spectral performance of the power amplification device thus improves with regard to the second frequency band.