公开(公告)号：US08637907B2

公开(公告)日：2014-01-28

申请号：US13584623

申请日：2012-08-13

Applicant: Francois Hebert

Inventor： Francois Hebert

IPC: H01L27/148 ,  H01L21/00

CPC classification number: H01L31/02327 ,  G02B5/208 ,  G06F3/0304 ,  G06F3/03547 ,  G06F3/042 ,  G06F3/0421 ,  G06F3/04883 ,  H01L31/02162

Abstract: A system according to an embodiment of the present invention includes one or more first optical sensors and one or more second optical sensors. The first optical sensor(s) each include a photodetector region and a plurality of first slats over the photodetector region. The second optical sensor(s) each include a photodetector region and a plurality of second slats over the photodetector region, wherein the second slats have a different configuration than the first slats. For example, the second slats can be orthogonal relative to the first slats. For another example, the first slats can slant in a first direction, and the second slats can slant in a second direction generally opposite the first direction. Currents produced by the first optical sensor(s) and the second optical sensor(s), which are indicative of light incident on the optical sensors, are useful for distinguishing between movement in at least two different directions.

Abstract translation: 根据本发明实施例的系统包括一个或多个第一光学传感器和一个或多个第二光学传感器。 第一光学传感器各自包括光电检测器区域和光电检测器区域上的多个第一板条。 第二光学传感器各自包括光电检测器区域和光电检测器区域上的多个第二板条，其中第二板条具有与第一板条不同的构造。 例如，第二板条可以相对于第一板条正交。 对于另一示例，第一板条可以在第一方向上倾斜，并且第二板条可以在大致与第一方向相反的第二方向上倾斜。 由第一光学传感器和第二光学传感器产生的指示入射在光学传感器上的光的电流可用于区分至少两个不同方向上的运动。

公开(公告)号：US20130252369A1

公开(公告)日：2013-09-26

申请号：US13530675

申请日：2012-06-22

Applicant: Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

Inventor： Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

IPC: H01L31/0232

CPC classification number: H01L31/02327 ,  H01L21/0272 ,  H01L31/02162 ,  H01L31/101 ,  H01L31/103 ,  H01L31/18

Abstract: Light sensors including dielectric optical coatings to shape their spectral responses, and methods for fabricating such light sensors in a manner that accelerates lift-off processes and increases process margins, are described herein. In certain embodiments, a short duration soft bake is performed. Alternatively, or additionally, temperature cycling is performed. Alternatively, or additionally, photolithography is performed using a photomask that includes one or more dummy corners, dummy islands and/or dummy rings. Each of the aforementioned embodiments form and/or increase a number of micro-cracks in the dielectric optical coating not covering the photodetector sensor region, thereby enabling an accelerated lift-off process and an increased process margin. Alternatively, or additionally, a portion of the photomask can include chamfered corners so that the dielectric optical coating includes chamfered corners, which improves the thermal reliability of the dielectric optical coating.

Abstract translation: 本文描述了包括用于塑造其光谱响应的介电光学涂层的光传感器以及以加速剥离过程并增加工艺裕度的方式制造这种光传感器的方法。 在某些实施例中，执行短持续时间的软烘烤。 或者或另外，进行温度循环。 或者或附加地，使用包括一个或多个虚拟角，虚拟岛和/或虚拟环的光掩模来执行光刻。 上述实施例中的每一个形成和/或增加了不覆盖光电检测器传感器区域的电介质光学涂层中的许多微裂纹，从而能够加速剥离过程和增加的工艺余量。 或者或另外，光掩模的一部分可以包括倒角，使得介电光学涂层包括倒角，这改善了介电光学涂层的热可靠性。

公开(公告)号：US20130249032A1

公开(公告)日：2013-09-26

申请号：US13530809

申请日：2012-06-22

Applicant: Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

Inventor： Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

IPC: H01L31/18 ,  H01L31/0232

CPC classification number: H01L31/02327 ,  H01L21/0272 ,  H01L31/02162 ,  H01L31/101 ,  H01L31/103 ,  H01L31/18

Abstract: Light sensors including dielectric optical coatings to shape their spectral responses, and methods for fabricating such light sensors in a manner that accelerates lift-off processes and increases process margins, are described herein. In certain embodiments, a short duration soft bake is performed. Alternatively, or additionally, temperature cycling is performed. Alternatively, or additionally, photolithography is performed using a photomask that includes one or more dummy corners, dummy islands and/or dummy rings. Each of the aforementioned embodiments form and/or increase a number of micro-cracks in the dielectric optical coating not covering the photodetector sensor region, thereby enabling an accelerated lift-off process and an increased process margin. Alternatively, or additionally, a portion of the photomask can include chamfered corners so that the dielectric optical coating includes chamfered corners, which improves the thermal reliability of the dielectric optical coating.

Abstract translation: 本文描述了包括用于塑造其光谱响应的介电光学涂层的光传感器以及以加速剥离过程并增加工艺裕度的方式制造这种光传感器的方法。 在某些实施例中，执行短持续时间的软烘烤。 或者或另外，进行温度循环。 或者或附加地，使用包括一个或多个虚拟角，虚拟岛和/或虚拟环的光掩模来执行光刻。 上述实施例中的每一个形成和/或增加了不覆盖光电检测器传感器区域的电介质光学涂层中的许多微裂纹，从而能够加速剥离过程和增加的工艺余量。 或者或另外，光掩模的一部分可以包括倒角，使得介电光学涂层包括倒角，这改善了介电光学涂层的热可靠性。

公开(公告)号：US08508052B2

公开(公告)日：2013-08-13

申请号：US13048165

申请日：2011-03-15

Applicant: David B. Bell ,  Francois Hebert ,  Nikhil Kelkar

Inventor： David B. Bell ,  Francois Hebert ,  Nikhil Kelkar

IPC: H01L23/538 ,  H01L23/34 ,  H01L23/48 ,  H01L23/488

CPC classification number: H01L27/088 ,  H01L21/26513 ,  H01L21/823437 ,  H01L21/823487 ,  H01L23/535 ,  H01L23/62 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/41775 ,  H01L29/456 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66696 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7835 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/30107 ,  H01L2924/3025 ,  H02M7/003 ,  H01L2924/00

Abstract: A power converter can include an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The power converter can further include a controller integrated circuit (IC) formed on a different die which can be electrically coupled to, and co-packaged with, the PowerDie. The PowerDie can be attached to a die pad of a leadframe, and the controller IC die can be attached to an active surface of the first die such that the first die is interposed between the controller IC die and the die pad.

Abstract translation: 功率转换器可以包括具有可形成在单个管芯（“PowerDie”）上的高侧器件和低侧器件的输出电路。 功率转换器还可以包括形成在不同管芯上的控制器集成电路（IC），其可以与PowerDie电耦合并与其一体化。 PowerDie可以附接到引线框架的管芯焊盘，并且控制器IC管芯可以附接到第一管芯的有源表面，使得第一管芯插在控制器IC管芯和管芯焊盘之间。

公开(公告)号：US08476150B2

公开(公告)日：2013-07-02

申请号：US12887797

申请日：2010-09-22

Applicant: Rick C. Jerome ,  Francois Hebert ,  Craig McLachlan ,  Kevin Hoopingarner

Inventor： Rick C. Jerome ,  Francois Hebert ,  Craig McLachlan ,  Kevin Hoopingarner

IPC: H01L21/20 ,  H01L21/36

CPC classification number: H01L21/02107

Abstract: A method and structure for a semiconductor device, the device including a handle wafer, a diamond layer formed directly on a front side of the handle wafer, and a thick oxide layer formed directly on a back side of the handle wafer, the oxide of a thickness to counteract tensile stresses of the diamond layer. Nitride layers are formed on the outer surfaces of the diamond layer and thick oxide layer and a polysilicon is formed on outer surfaces of the nitride layers. A device wafer is bonded to the handle wafer to form the semiconductor device.

Abstract translation: 一种用于半导体器件的方法和结构，所述器件包括处理晶片，直接形成在所述手柄晶片前侧上的金刚石层以及直接形成在所述手柄晶片的背面上的厚氧化物层，所述氧化物 抵抗金刚石层的拉伸应力的厚度。 在金刚石层和厚氧化物层的外表面上形成氮化物层，并且在氮化物层的外表面上形成多晶硅。 器件晶片被结合到处理晶片以形成半导体器件。

公开(公告)号：US20120313201A1

公开(公告)日：2012-12-13

申请号：US13466867

申请日：2012-05-08

Applicant: Francois Hebert ,  Jonathan Herman ,  I-Shan Sun

Inventor： Francois Hebert ,  Jonathan Herman ,  I-Shan Sun

IPC: H01L31/0232 ,  H01L31/18

CPC classification number: G02B5/285 ,  H01L31/02165 ,  H01L31/103

Abstract: Optical sensor devices, and methods of manufacturing the same, are described herein. In an embodiment, a monolithic optical sensor device includes a semiconductor substrate having a trench, with a photodetector region under said trench. An optical filter is formed in the trench and over at least a portion of the photodetector region. One or more metal structures extend above a top surface of said optical filter. The trench, photodetector region and optical filter are formed as part of a front-end-of-line (FEOL) semiconductor fabrication process. The one or more metal structures are formed as part of a back-end-of-line (BEOL) semiconductor fabrication process.

Abstract translation: 光传感器装置及其制造方法在此描述。 在一个实施例中，单片光学传感器装置包括具有沟槽的半导体衬底，在所述沟槽下方具有光电检测器区域。 滤光器形成在沟槽中并且在光电检测器区域的至少一部分上方。 一个或多个金属结构在所述滤光器的顶表面上方延伸。 沟槽，光电检测器区域和滤光器形成为前端（FEOL）半导体制造工艺的一部分。 一个或多个金属结构形成为后端（BEOL）半导体制造工艺的一部分。

公开(公告)号：US20120288083A1

公开(公告)日：2012-11-15

申请号：US13283139

申请日：2011-10-27

Applicant: I-Shan Sun ,  Rick Carlton Jerome ,  Francois Hebert

Inventor： I-Shan Sun ,  Rick Carlton Jerome ,  Francois Hebert

IPC: H02H9/04 ,  H01L23/48 ,  H04M1/60 ,  H01L21/50

CPC classification number: H01L29/66204 ,  H01L21/743 ,  H01L23/481 ,  H01L23/535 ,  H01L27/0688 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for through active-silicon via integration is provided. The method comprises forming an electrical device in a handle wafer. The method also comprises forming an isolation layer over the handle wafer and the electrical device and joining an active layer to the isolation layer. Further, the method comprises forming at least one trench through the active layer and the isolation layer to expose a portion of the handle wafer and depositing an electrically conductive material in the at least one trench, the electrically conductive material providing an electrical connection to the electrical device through the active layer.

Abstract translation: 提供了一种通过积分硅通过集成的方法。 该方法包括在处理晶片中形成电气装置。 该方法还包括在手柄晶片和电气装置上形成隔离层，并将活性层连接到隔离层。 此外，该方法包括通过有源层和隔离层形成至少一个沟槽，以暴露处理晶片的一部分并在至少一个沟槽中沉积导电材料，导电材料提供与电 设备通过活动层。

公开(公告)号：US20110163434A1

公开(公告)日：2011-07-07

申请号：US13048165

申请日：2011-03-15

Applicant: David B. Bell ,  Francois Hebert ,  Nikhil Kelkar

Inventor： David B. Bell ,  Francois Hebert ,  Nikhil Kelkar

IPC: H01L23/495 ,  H01L23/52

CPC classification number: H01L27/088 ,  H01L21/26513 ,  H01L21/823437 ,  H01L21/823487 ,  H01L23/535 ,  H01L23/62 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/41775 ,  H01L29/456 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66696 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/7835 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/30107 ,  H01L2924/3025 ,  H02M7/003 ,  H01L2924/00

Abstract: A power converter can include an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The power converter can further include a controller integrated circuit (IC) formed on a different die which can be electrically coupled to, and co-packaged with, the PowerDie. The PowerDie can be attached to a die pad of a leadframe, and the controller IC die can be attached to an active surface of the first die such that the first die is interposed between the controller IC die and the die pad.

Abstract translation: 功率转换器可以包括具有可形成在单个管芯（“PowerDie”）上的高侧器件和低侧器件的输出电路。 功率转换器还可以包括形成在不同管芯上的控制器集成电路（IC），其可以与PowerDie电耦合并与其一体化。 PowerDie可以附接到引线框架的管芯焊盘，并且控制器IC管芯可以附接到第一管芯的有源表面，使得第一管芯插在控制器IC管芯和管芯焊盘之间。

公开(公告)号：US20110073943A1

公开(公告)日：2011-03-31

申请号：US12965778

申请日：2010-12-10

Applicant: Francois Hebert

Inventor： Francois Hebert

IPC: H01L27/088 ,  H01L21/8234

CPC classification number: H01L29/7835 ,  H01L24/05 ,  H01L24/45 ,  H01L29/0692 ,  H01L29/402 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/781 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05556 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/48 ,  H01L2924/00

Abstract: A semiconductor package may comprise a semiconductor substrate, a MOSFET device having a plurality cells formed on the substrate, and a source region common to all cells disposed on a bottom of the substrate. Each cell comprises a drain region on a top of the semiconductor device, a gate to control a flow of electrical current between the source and drain regions, a source contact proximate the gate; and an electrical connection between the source contact and source region. At least one drain connection is electrically coupled to the drain region. Source, drain and gate pads are electrically connected to the source region, drain region and gates of the devices. The drain, source and gate pads are formed on one surface of the semiconductor package. The cells are distributed across the substrate, whereby the electrical connections between the source contact of each device and the source region are distributed across the substrate.

Abstract translation: 半导体封装可以包括半导体衬底，具有形成在衬底上的多个单元的MOSFET器件，以及设置在衬底的底部上的所有单元共用的源极区域。 每个单元包括在半导体器件的顶部上的漏极区域，用于控制源极和漏极区域之间的电流的栅极，靠近栅极的源极接触点; 以及源极接触和源极区域之间的电连接。 至少一个漏极连接电连接到漏极区域。 源极，漏极和栅极焊盘电连接到器件的源极区域，漏极区域和栅极。 漏极，源极和栅极焊盘形成在半导体封装的一个表面上。 电池分布在衬底上，由此每个器件的源极接触和源极区之间的电连接分布在衬底上。

公开(公告)号：US20100163979A1

公开(公告)日：2010-07-01

申请号：US12345467

申请日：2008-12-29

Applicant: Francois Hebert

Inventor： Francois Hebert

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/7835 ,  H01L24/05 ,  H01L24/45 ,  H01L29/0692 ,  H01L29/402 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/781 ,  H01L2224/04042 ,  H01L2224/05093 ,  H01L2224/05094 ,  H01L2224/05556 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/48 ,  H01L2924/00

Abstract: A semiconductor package may comprise a semiconductor substrate, a MOSFET device having a plurality cells formed on the substrate, and a source region common to all cells disposed on a bottom of the substrate. Each cell comprises a drain region on a top of the semiconductor device, a gate to control a flow of electrical current between the source and drain regions, a source contact proximate the gate; and an electrical connection between the source contact and source region. At least one drain connection is electrically coupled to the drain region. Source, drain and gate pads are electrically connected to the source region, drain region and gates of the devices. The drain, source and gate pads are formed on one surface of the semiconductor package. The cells are distributed across the substrate, whereby the electrical connections between the source contact of each device and the source region are distributed across the substrate.

Abstract translation: 半导体封装可以包括半导体衬底，具有形成在衬底上的多个单元的MOSFET器件和设置在衬底的底部上的所有单元共用的源极区域。 每个单元包括在半导体器件的顶部上的漏极区域，用于控制源极和漏极区域之间的电流流动的栅极，靠近栅极的源极接触; 以及源极接触和源极区域之间的电连接。 至少一个漏极连接电连接到漏极区域。 源极，漏极和栅极焊盘电连接到器件的源极区域，漏极区域和栅极。 漏极，源极和栅极焊盘形成在半导体封装的一个表面上。 电池分布在衬底上，由此每个器件的源极接触和源极区之间的电连接分布在衬底上。