公开(公告)号：US07253078B1

公开(公告)日：2007-08-07

申请号：US10224291

申请日：2002-08-19

Applicant: Luu T. Nguyen ,  Hau T. Nguyen ,  Viraj A. Patwardhan ,  Nikhil Kelkar ,  Shahram Mostafazadeh

Inventor： Luu T. Nguyen ,  Hau T. Nguyen ,  Viraj A. Patwardhan ,  Nikhil Kelkar ,  Shahram Mostafazadeh

IPC: H01L21/44

CPC classification number: H01L24/29 ,  H01L21/563 ,  H01L24/11 ,  H01L24/27 ,  H01L24/73 ,  H01L24/92 ,  H01L29/0657 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/1131 ,  H01L2224/1141 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2224/2732 ,  H01L2224/274 ,  H01L2224/2747 ,  H01L2224/27515 ,  H01L2224/27849 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29388 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10155 ,  H01L2924/10157 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/01031 ,  H01L2924/3512 ,  H01L2224/05552 ,  H01L2224/27 ,  H01L2224/11

Abstract: An apparatus and method for forming a layer of underfill adhesive on an integrated circuit in wafer form is described. In one embodiment, the layer of underfill adhesive is disposed and partially cured on the active surface of the wafer. Once the underfill adhesive has partially cured, the wafer is singulated. The individual integrated circuits or die are then mounted onto a substrate such as a printed circuit board. When the solder balls of the integrated circuit are reflowed to form joints with corresponding contact pads on the substrate, the underfill adhesive reflows and is completely cured. In an alternative embodiment, the underfill adhesive is fully cured after it is disposed onto the active surface of the wafer.

Abstract translation: 描述了一种在晶片形式的集成电路上形成底层填料层的装置和方法。 在一个实施例中，底层填充粘合剂层被设置并部分地固化在晶片的活性表面上。 一旦底部填充粘合剂已部分固化，则晶片被切割。 然后将各个集成电路或管芯安装到诸如印刷电路板的基板上。 当集成电路的焊球回流以形成与基板上的相应接触焊盘的接头时，底部填充粘合剂回流并完全固化。 在替代实施例中，底部填充粘合剂在其被设置在晶片的有效表面之后被完全固化。

公开(公告)号：US06468892B1

公开(公告)日：2002-10-22

申请号：US09616475

申请日：2000-07-14

Applicant: Mark Harrison Baker ,  Nikhil Kelkar

Inventor： Mark Harrison Baker ,  Nikhil Kelkar

IPC: H01L2144

CPC classification number: H01L24/11 ,  H01L24/02 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Flip chips with improved solder bump strength are provided. A solder mask layer is placed and patterned on a front side of a wafer of semiconductor chips with semiconductor devices and bond pads. The solder mask is patterned to expose the bond pads. Solder bumps are electrically connected to the bond pads. The solder mask is thick enough to extend up to at least a quarter of the solder bumps and is in contact with the solder bumps. The wafer is then cut into individual chips. The chips may be sold to customers, who may mount the chip on a substrate without underfill.

Abstract translation: 提供了具有改善的焊料凸块强度的翻转芯片。 在具有半导体器件和接合焊盘的半导体芯片的晶片的正面上放置并图案化焊接掩模层。 图案化焊接掩模以暴露接合焊盘。 焊接凸块电连接到接合焊盘。 焊接掩模厚度足以延伸至至少四分之一的焊料凸块并与焊料凸块接触。 然后将晶片切成单独的芯片。 这些芯片可能会被销售给客户，他们可以将芯片安装在基板上，而不需要底部填充。

公开(公告)号：US06238949B1

公开(公告)日：2001-05-29

申请号：US09336037

申请日：1999-06-18

Applicant: Luu Nguyen ,  Ashok Prabhu ,  Nikhil Kelkar ,  Hem P. Takiar

Inventor： Luu Nguyen ,  Ashok Prabhu ,  Nikhil Kelkar ,  Hem P. Takiar

IPC: H01L2144

CPC classification number: H01L24/17 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49575 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/92127 ,  H01L2224/92225 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method and an apparatus for forming a plastic chip on chip module is disclosed. The plastic chip on chip module is formed by placing a stacked chip set into a molding chamber suitably arranged to receive encapsulant. The stacked chip set includes a daughter chip that is electrically and mechanically coupled to a mother chip where the daughter chip is directly aligned to and separated from the mother chip by a standoff gap. Encapsulant is then passed into the molding chamber filling the standoff gap substantially simultaneously with surrounding the chip set to form the plastic chip on chip module.

Abstract translation: 公开了一种用于形成芯片上的塑料芯片模块的方法和装置。 通过将堆叠的芯片组放置在适当地布置成接收密封剂的模制室中来形成芯片上的塑料芯片模块。 堆叠的芯片组包括电子和机械耦合到母芯片的子芯片，其中子芯片通过间隙与母芯片直接对准并与母芯片分离。 然后将封装剂填充到填充间隙的模制室中，同时围绕芯片组以形成芯片上的塑料芯片模块。

公开(公告)号：US08324602B2

公开(公告)日：2012-12-04

申请号：US12643831

申请日：2009-12-21

Applicant: Lynn K. Wiese ,  Nikhil Kelkar ,  Viraj Patwardhan

Inventor： Lynn K. Wiese ,  Nikhil Kelkar ,  Viraj Patwardhan

IPC: G02B27/00 ,  H01J40/14

CPC classification number: H01L25/167 ,  H01L31/02325 ,  H01L2224/49171 ,  H01L2924/3011 ,  H01L2924/00

Abstract: An optical sensor device, according to an embodiment of the present invention, includes a light source and a light detector. The light source includes one or more light emitting elements, and the light detector includes one or more light detecting elements. A first opaque light barrier portion, between the light source and the light detector, is configured to block light from being transmitted directly from the light source to the light detector. A second opaque light barrier portion, extending from the first opaque light barrier portion in a direction towards the light source, is configured to reduce an amount of specular reflections that would occur if a light transmissive cover plate were placed over the optical sensor device. A third opaque light barrier portion, extending from the first light barrier portion in a direction towards to the light detector, is configured to reduce an amount of specular reflections that would be detected by the light detector, if a light transmissive cover plate were placed over the optical sensor device.

Abstract translation: 根据本发明的实施例的光学传感器装置包括光源和光检测器。 光源包括一个或多个发光元件，并且光检测器包括一个或多个光检测元件。 在光源和光检测器之间的第一不透明光阻挡部分被配置为阻止光直接从光源传输到光检测器。 第二不透明光阻挡部分从第一不透明光阻挡部分朝向光源的方向延伸，被配置为减少如果透光盖板放置在光学传感器装置上方将会发生的镜面反射量。 第三不透明光阻挡部分从第一光阻挡部分朝向光检测器的方向延伸，被配置为减少光检测器将检测到的镜面反射量，如果透光盖板放置在 光学传感器装置。

公开(公告)号：US20100276701A1

公开(公告)日：2010-11-04

申请号：US12612616

申请日：2009-11-04

Applicant: François Hébert ,  Nikhil Kelkar

Inventor： François Hébert ,  Nikhil Kelkar

IPC: H01L29/26 ,  H01L21/00

CPC classification number: H01L23/3114 ,  H01L23/3732 ,  H01L29/0657 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/10158 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A chip scale package (CSP) semiconductor device can include a semiconductor layer, circuitry on an active surface of the semiconductor layer, and a diamond layer on a back side of the semiconductor layer. The diamond layer can provide an efficient heat sink for the semiconductor layer, with a thermal conductivity which can be more than three times greater than the thermal conductivity of copper. Further, a hardness of the diamond layer (up to about 10 times stronger than silicon) can provide effective protection against damage to the exposed semiconductor layer, for example during manufacturing, handling, and use of the CSP device. Thus a thin protective diamond layer can be used, which can result in a very thin CSP package design.

Abstract translation: 芯片级封装（CSP）半导体器件可以包括半导体层，半导体层的有源表面上的电路和半导体层的背面上的金刚石层。 金刚石层可以为半导体层提供有效的散热器，其热导率可以比铜的热导率大三倍以上。 此外，例如在CSP器件的制造，处理和使用过程中，金刚石层的硬度（比硅高达约10倍）可以提供有效的保护，以免损坏暴露的半导体层。 因此，可以使用薄的保护性金刚石层，这可以导致非常薄的CSP封装设计。

公开(公告)号：US06803648B1

公开(公告)日：2004-10-12

申请号：US10341328

申请日：2003-01-10

Applicant: Nikhil Kelkar ,  Neeraj Anil Pendse

Inventor： Nikhil Kelkar ,  Neeraj Anil Pendse

IPC: H01L23495

CPC classification number: H01L23/3107 ,  H01L23/49551 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73207 ,  H01L2224/8547 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Semiconductor device packages having top and bottom interconnecting surfaces that can be connected to external electrical systems are described. These packages include internal contact leads that are bent such that they extend from a top surface to a bottom surface of the package and thereby form the corresponding interconnecting surfaces. In some embodiments, a solder ball is formed on either the top or bottom portion of the contact leads so that the solder balls form one of the contact surfaces of the package.

Abstract translation: 描述具有可连接到外部电气系统的顶部和底部互连表面的半导体器件封装。 这些包装包括弯曲的内部接触引线，使得它们从包装的顶表面延伸到底表面，从而形成相应的互连表面。 在一些实施例中，焊接球形成在接触引线的顶部或底部上，使得焊球形成封装的接触表面之一。

公开(公告)号：US06566762B1

公开(公告)日：2003-05-20

申请号：US10235058

申请日：2002-09-04

Applicant: Mark Harrison Baker ,  Nikhil Kelkar

Inventor： Mark Harrison Baker ,  Nikhil Kelkar

IPC: H01L2940

CPC classification number: H01L24/11 ,  H01L24/02 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Flip chips with improved solder bump strength are provided. A solder mask layer is placed and patterned on a front side of a wafer of semiconductor chips with semiconductor devices and bond pads. The solder mask is patterned to expose the bond pads. Solder bumps are electrically connected to the bond pads. The solder mask is thick enough to extend up to at least a quarter of the solder bumps and is in contact with the solder bumps. The wafer is then cut into individual chips. The chips may be sold to customers, who may mount the chip on a substrate without underfill.

公开(公告)号：US08206836B2

公开(公告)日：2012-06-26

申请号：US12699811

申请日：2010-02-03

Applicant: Loyde M. Carpenter, Jr. ,  Randolph Cruz ,  Nikhil Kelkar

Inventor： Loyde M. Carpenter, Jr. ,  Randolph Cruz ,  Nikhil Kelkar

IPC: H01L23/495 ,  H05K13/04

CPC classification number: H01L23/49562 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/37 ,  H01L24/38 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/38 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/13091 ,  H01L2924/14 ,  Y10T428/12188 ,  Y10T428/12354 ,  H01L2924/00014

Abstract: A conductive clip having a riser or post formed along a side thereof includes a notch or opening formed in the riser or post to create a first riser or post section and second riser or post section separated by the notch or opening through which a tiebar extends. The conductive clip organization is will suited for formation as elongated strips of such conductive clips for automated machine assembly of the conductive clips in an integrated circuit package context.

Abstract translation: 具有沿着其侧面形成的提升管或柱的导电夹具包括形成在提升管或柱中的切口或开口，以形成第一提升管或后部段，以及由连接杆延伸通过的切口或开口分开的第二提升管或后部段。 导电夹具组织将适合于形成为用于在集成电路封装环境中的导电夹子的自动化机器组装的这种导电夹的细长条带。

公开(公告)号：US20120098090A1

公开(公告)日：2012-04-26

申请号：US13069789

申请日：2011-03-23

Applicant: Francois Hebert ,  Shea Petricek ,  Nikhil Kelkar

Inventor： Francois Hebert ,  Shea Petricek ,  Nikhil Kelkar

IPC: H01L29/92 ,  H01L21/56

CPC classification number: H01L23/49589 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/16 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/16265 ,  H01L2224/371 ,  H01L2224/37147 ,  H01L2224/3718 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48265 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73221 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01056 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19106 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A power converter device comprises a substrate, a power die mounted on the substrate, and a capacitor die mounted over the power die in a stacked configuration. The capacitor die is electrically coupled to the power die. A packaging material encapsulates the power die and the capacitor die. An integrated circuit die can also be mounted to the substrate and electrically coupled to the power die to receive power signals from the power die, with the packaging material also encapsulating the integrated circuit die.

Abstract translation: 功率转换器装置包括衬底，安装在衬底上的功率管芯和以堆叠构造安装在功率管芯上的电容器管芯。 电容器管芯电耦合到功率管芯。 封装材料封装了电源管芯和电容器管芯。 集成电路管芯也可以安装到衬底上并且电耦合到功率管芯以从功率管芯接收功率信号，封装材料也封装集成电路管芯。

公开(公告)号：US20100259766A1

公开(公告)日：2010-10-14

申请号：US12499693

申请日：2009-07-08

Applicant: Lynn K. Wiese ,  Nikhil Kelkar ,  Viraj Patwardhan

Inventor： Lynn K. Wiese ,  Nikhil Kelkar ,  Viraj Patwardhan

IPC: G01B11/14 ,  B23K26/38

CPC classification number: H01L25/167 ,  H01L33/58 ,  H01L2224/49171

Abstract: Provided herein are optical sensor devices, methods for making the same, and systems including the same. An optical sensor device, according to an embodiment, includes a light detector die and a light source die attached to the same or different die attachment substrates so that there is a space between the light source die and the light detector die. A light transmissive material covers the light detector die, the light source die and at least a portion of the space between the light detector die and the light source die. A groove is formed (e.g., saw, blade or laser cut, or cast) in the light transmissive material between the light detector die and the light source die, and an opaque material is put within the groove to provide a light barrier between the light detector die and the light source die.

Abstract translation: 本文提供了光学传感器装置及其制造方法，以及包括该传感器装置的系统。 根据实施例的光学传感器装置包括光检测器管芯和附接到相同或不同的管芯附接衬底的光源管芯，使得在光源管芯和光检测器管芯之间存在空间。 透光材料覆盖光检测器管芯，光源管芯和光检测器管芯与光源管芯之间的至少一部分空间。 在光检测器管芯和光源管芯之间的透光材料中形成凹槽（例如，锯，刀片或激光切割或铸造），并且将不透明材料放置在凹槽内以在光线之间提供光屏障 检测器管芯和光源管芯。