公开(公告)号：US09685421B2

公开(公告)日：2017-06-20

申请号：US14727205

申请日：2015-06-01

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Ravindranath V Mahajan ,  Omkar Karhade ,  Nitin Deshpande

IPC: H01L21/00 ,  H01L23/00 ,  H01L23/13 ,  H01L21/683 ,  H01L21/677 ,  H01L21/56 ,  H01L23/15

CPC classification number: H01L24/83 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/67709 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/15 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/82 ,  H01L24/92 ,  H01L24/96 ,  H01L2221/68309 ,  H01L2221/68313 ,  H01L2221/68331 ,  H01L2221/68363 ,  H01L2224/04105 ,  H01L2224/2101 ,  H01L2224/2919 ,  H01L2224/32237 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/8312 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The subject matter of the present description relates to methods for the precise integration of microelectronic dice within a multichip package which substantially reduce or eliminate any misalign caused by the movement of the microelectronic dice during the integration process. These methods may include the use of a temporary adhesive in conjunction with a carrier having at least one recess for microelectronic die alignment, the use of a precision molded carrier for microelectronic die alignment, the use of magnetic alignment of microelectronic dice on a reusable carrier, and/or the use of a temporary adhesive with molding processes on a reusable carrier.

公开(公告)号：US20150338718A1

公开(公告)日：2015-11-26

申请号：US14690341

申请日：2015-04-17

Applicant: INTEL CORPORATION

Inventor： Chong ZHANG ,  Aleksandar Aleksov ,  Islam A. Salama ,  Tiansi Wang ,  Aravinda Kar

IPC: G02F1/33

CPC classification number: G02F1/33 ,  G02F1/113 ,  G02F1/332

Abstract: An acousto-optic deflector with multiple acoustic transducers is described that is suitable for use in substrate processing. In one example a method includes transmitting an optic beam through an acousto-optic deflector, applying an acoustic signal with a phase delay across multiple transducers of the acousto-optic deflector to deflect the beam along a first axis by the acousto-optic deflector, and directing the deflected beam onto a workpiece.

Abstract translation: 描述了具有多个声换能器的声光偏转器，其适用于基板处理。 在一个示例中，一种方法包括通过声光偏转器传输光束，在声光偏转器的多个换能器上施加具有相位延迟的声信号，以通过声光偏转器沿着第一轴偏转光束;以及 将偏转的光束引导到工件上。

公开(公告)号：US20250069902A1

公开(公告)日：2025-02-27

申请号：US18945842

申请日：2024-11-13

Applicant: Intel Corporation

Inventor： Kristof Kuwawi Darmawikarta ,  Robert May ,  Sri Ranga Sai Boyapati ,  Srinivas V. Pietambaram ,  Chung Kwang Christopher Tan ,  Aleksandar Aleksov

IPC: H01L21/48 ,  H01L23/498

Abstract: Disclosed herein are integrated circuit (IC) package supports and related apparatuses and methods. For example, in some embodiments, a method for forming an IC package support may include forming a first dielectric material having a surface; forming a first conductive via in the first dielectric material, wherein the first conductive via has tapered sidewalls with an angle that is equal to or less than 80 degrees relative to the surface of the first dielectric material; forming a second dielectric material, having a surface, on the first dielectric material; and forming a second conductive via in the second dielectric material, wherein the second conductive via is electrically coupled to the first conductive via, has tapered sidewalls with an angle that is greater than 80 degrees relative to the surface of the second dielectric material, and a maximum diameter between 2 microns and 20 microns.

公开(公告)号：US12199018B2

公开(公告)日：2025-01-14

申请号：US17025771

申请日：2020-09-18

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Krishna Bharath ,  Han Wui Then ,  Kimin Jun ,  Aleksandar Aleksov ,  Mohammad Enamul Kabir ,  Shawna M. Liff ,  Johanna M. Swan ,  Feras Eid

IPC: H01L23/49 ,  H01L23/00 ,  H01L23/532 ,  H01L23/538 ,  H05K1/11

Abstract: Disclosed herein are microelectronic assemblies including direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first subregion and a second subregion, and the first subregion has a greater metal density than the second subregion. In some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first metal contact and a second metal contact, the first metal contact has a larger area than the second metal contact, and the first metal contact is electrically coupled to a power/ground plane of the first microelectronic component.

公开(公告)号：US12155133B2

公开(公告)日：2024-11-26

申请号：US18133361

申请日：2023-04-11

Applicant: Intel Corporation

Inventor： Feras Eid ,  Sasha N. Oster ,  Telesphor Kamgaing ,  Georgios C. Dogiamis ,  Aleksandar Aleksov

IPC: H01Q1/38 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495 ,  H01L23/522 ,  H01L23/552 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H01Q1/52 ,  H01Q9/04 ,  H01Q19/22 ,  H01L23/367

Abstract: Embodiments of the invention include a microelectronic device that includes a first substrate having radio frequency (RF) components and a second substrate that is coupled to the first substrate. The second substrate includes a first conductive layer of an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. A mold material is disposed on the first and second substrates. The mold material includes a first region that is positioned between the first conductive layer and a second conductive layer of the antenna unit with the mold material being a dielectric material to capacitively couple the first and second conductive layers of the antenna unit.

公开(公告)号：US12150271B2

公开(公告)日：2024-11-19

申请号：US18331474

申请日：2023-06-08

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Johanna M. Swan ,  Georgios Dogiamis ,  Henning Braunisch ,  Adel A. Elsherbini ,  Aleksandar Aleksov ,  Richard Dischler

IPC: H05K7/14 ,  H01P3/16 ,  H01P5/08 ,  H01P5/12 ,  H05K1/02 ,  H01L23/00 ,  H01L23/538 ,  H01L23/66 ,  H01L25/18 ,  H05K1/18

Abstract: Embodiments may relate an electronic device that includes a first server blade and a second server blade coupled with a chassis. The first and second server blades may include respective microelectronic packages. The electronic device may further include a waveguide coupled to the first and second server blades such that their respective microelectronic packages are communicatively coupled by the waveguide. Other embodiments may be described or claimed.

公开(公告)号：US12119291B2

公开(公告)日：2024-10-15

申请号：US17121093

申请日：2020-12-14

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Mohammad Enamul Kabir ,  Adel A. Elsherbini ,  Shawna M. Liff ,  Johanna M. Swan ,  Feras Eid

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L23/48

CPC classification number: H01L23/49822 ,  H01L23/5383 ,  H01L24/08 ,  H01L24/32 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49894 ,  H01L2224/08225 ,  H01L2224/32225

Abstract: Disclosed herein are microelectronic assemblies including microelectronic components coupled by direct bonding, and related structures and techniques. In some embodiments, a microelectronic assembly may include a first microelectronic component including a first guard ring extending through at least a portion of a thickness of and along a perimeter; a second microelectronic component including a second guard ring extending through at least a portion of a thickness of and along a perimeter, where the first and second microelectronic components are coupled by direct bonding; and a seal ring formed by coupling the first guard ring to the second guard ring. In some embodiments, a microelectronic assembly may include a microelectronic component coupled to an interposer that includes a first liner material at a first surface; a second liner material at an opposing second surface; and a perimeter wall through the interposer and connected to the first and second liner materials.

公开(公告)号：US20240063072A1

公开(公告)日：2024-02-22

申请号：US17891530

申请日：2022-08-19

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Shawna Liff ,  Kimin Jun ,  Veronica Strong ,  Aleksandar Aleksov ,  Jiraporn Seangatith ,  Mohammad Enamul Kabir ,  Johanna Swan ,  Tushar Talukdar ,  Omkar Karhade

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/498 ,  H01L21/56 ,  H01L23/29

CPC classification number: H01L23/3135 ,  H01L25/0652 ,  H01L25/0655 ,  H01L23/49816 ,  H01L23/49838 ,  H01L21/568 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/291 ,  H01L24/08

Abstract: Composite integrated circuit (IC) device processing, including selective removal of inorganic dielectric material. Inorganic dielectric material may be deposited, modified with laser exposure, and selectively removed. Laser exposure parameters may be adjusted using surface topography measurements. Inorganic dielectric material removal may reduce surface topography. Vias and trenches of varying size, shape, and depth may be concurrently formed without an etch-stop layer. A composite IC device may include an IC die, a conductive via, and a conductive line adjacent a compositionally homogenous inorganic dielectric material.

公开(公告)号：US20240030098A1

公开(公告)日：2024-01-25

申请号：US18366734

申请日：2023-08-08

Applicant: Intel Corporation

Inventor： Feras Eid ,  Telesphor Kamgaing ,  Georgios Dogiamis ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: H01L23/427 ,  H01L23/38 ,  H01L23/373 ,  H01L23/31 ,  H01L23/48 ,  H03H9/46 ,  H01L23/66

CPC classification number: H01L23/427 ,  H01L23/38 ,  H01L23/373 ,  H01L23/3157 ,  H01L23/481 ,  H03H9/46 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6644 ,  H01L2223/6677

Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.

公开(公告)号：US20240006327A1

公开(公告)日：2024-01-04

申请号：US17856663

申请日：2022-07-01

Applicant: Intel Corporation

Inventor： Jeremy Ecton ,  Aleksandar Aleksov ,  Kristof Darmawikarta ,  Robert A. May ,  Brandon Marin ,  Benjamin Duong ,  Suddhasattwa Nad ,  Hsin-Wei Wang ,  Leonel Arana ,  Darko Grujicic

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/5386 ,  H01L25/0655 ,  H01L23/49838 ,  H01L23/49822 ,  H01L23/49866 ,  H01L21/4857 ,  H01L21/486 ,  H01L24/08

Abstract: IC die package routing structures including a bulk layer of a first metal composition on an underlying layer of a second metal composition. The lower layer may be sputter deposited to a thickness sufficient to support plating of the bulk layer upon a first portion of the lower layer. Following the plating process, a second portion of the lower layer may be removed selectively to the bulk layer. Multiple IC die may be attached to the package with the package routing structures responsible for the transmission of high-speed data signals between the multiple IC die. The package may be further assembled to a host component that conveys power to the IC die package.