公开(公告)号：US20190198965A1

公开(公告)日：2019-06-27

申请号：US16325522

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Georgios C. Dogiamis ,  Sasha N. Oster ,  Adel A. Elsherbini ,  Brandon M. Rawlings ,  Aleksandar Aleksov ,  Shawna M. Liff ,  Richard J. Dischler ,  Johanna M. Swan

IPC: H01P11/00 ,  H01P3/12

CPC classification number: H01P11/002 ,  H01P3/122

Abstract: An apparatus comprises a waveguide section including an outer layer of conductive material tubular in shape and having multiple ends; and a joining feature on at least one of the ends of the waveguide section configured for joining to a second separate waveguide section.

公开(公告)号：US20190173149A1

公开(公告)日：2019-06-06

申请号：US16325301

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Sasha N. Oster ,  Georgios C. Dogiamis ,  Telesphor Kamgaing ,  Shawna M. Liff ,  Aleksandar Aleksov ,  Johanna M. Swan ,  Brandon M. Rawlings ,  Richard J. Dischler

IPC: H01P3/12 ,  H01P11/00 ,  H01P3/127 ,  H01P3/16

Abstract: An apparatus comprises a waveguide including: an elongate waveguide core including a dielectric material, wherein the waveguide core includes at least one space arranged lengthwise along the waveguide core that is void of the dielectric material; and a conductive layer arranged around the waveguide core.

公开(公告)号：US10304804B2

公开(公告)日：2019-05-28

申请号：US15476872

申请日：2017-03-31

Applicant: INTEL CORPORATION

Inventor： Fay Hua ,  Telesphor Kamgaing ,  Johanna M. Swan

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/29 ,  H01L21/02 ,  H01L25/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/66 ,  H01L23/64

Abstract: Embodiments include devices and methods, including a device including a substrate comprising a semiconductor, the substrate including a front side comprising active elements and a backside opposite the front side. The device includes a dielectric layer on the backside, and a passive component on the dielectric layer on the backside. In certain embodiments, the passive device is formed on a self-assembled monolayer (SAM). Other embodiments are described and claimed.

公开(公告)号：US10263312B2

公开(公告)日：2019-04-16

申请号：US15282050

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Sasha N. Oster ,  Aleksandar Aleksov ,  Georgios C. Dogiamis ,  Telesphor Kamgaing ,  Adel A. Elsherbini ,  Shawna M. Liff ,  Johanna M. Swan ,  Brandon M. Rawlings ,  Richard J. Dischler

IPC: H01P3/12 ,  H01P3/16 ,  H01P11/00 ,  H01P3/14

Abstract: A method of making a waveguide ribbon that includes a plurality of waveguides comprises joining a first sheet of dielectric material to a first conductive sheet of conductive material, patterning the first sheet of dielectric material to form a plurality of dielectric waveguide cores on the first conductive sheet, and coating the dielectric waveguide cores with substantially the same conductive material as the conductive sheet to form the plurality of waveguides.

公开(公告)号：US20180183561A1

公开(公告)日：2018-06-28

申请号：US15388204

申请日：2016-12-22

Applicant: Intel Corporation

Inventor： Georgios C. Dogiamis ,  Telesphor Kamgaing ,  Emanuel Cohen ,  Sasha N. Oster

IPC: H04L5/14 ,  H04W72/04 ,  H04B1/44

CPC classification number: H04L5/14 ,  H04B1/44

Abstract: Embodiments of the present disclosure may relate to a transceiver to transmit and receive concurrently radio frequency (RF) signals via a dielectric waveguide. In embodiments, the transceiver may include a transmitter to transmit to a paired transceiver a channelized radio frequency (RF) transmit signal via the dielectric waveguide. A receiver may receive from the paired transceiver a channelized RF receive signal via the dielectric waveguide. In embodiments, the channelized RF receive signal may include an echo of the channelized RF transmit signal. The transceiver may further include an echo suppression circuit to suppress from the channelized RF receive signal the echo of the channelized RF transmit signal. In some embodiments, the channelized RF transmit signal and the channelized RF receive signal may be within a frequency range of approximately 30 gigahertz (GHz) to approximately 1 terahertz (THz), and the transceiver may provide full-duplex millimeter-wave communication.

公开(公告)号：US20180012852A1

公开(公告)日：2018-01-11

申请号：US15712270

申请日：2017-09-22

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Adel A. Elsherbini ,  Valluri Rao

IPC: H01L23/66 ,  H01L21/48 ,  H01Q21/00 ,  H01L23/00 ,  H01Q1/22 ,  H01L21/52 ,  H01L23/498 ,  H01Q23/00 ,  H01Q1/38

CPC classification number: H01L23/66 ,  H01L21/4853 ,  H01L21/52 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/19 ,  H01L24/20 ,  H01L2223/6622 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/73267 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01Q1/2283 ,  H01Q1/38 ,  H01Q21/0006 ,  H01Q21/0093 ,  H01Q23/00

Abstract: Embodiments of an embedded mm-wave radio integrated circuit into a substrate of a phased array module are disclosed. In some embodiments, the phased array module includes a first set of substrate layers made of a first material. The mm-wave radio integrated circuit may be embedded in the first set of substrate layers. A second set of substrate layers may be coupled to the first set of substrate layers. The second set of substrate layers may be made of a second material that has a lower electrical loss than the first material. The second set of substrate layers may include a plurality of antenna elements coupled through vias to the mm-wave radio integrated circuit.

公开(公告)号：US09786581B2

公开(公告)日：2017-10-10

申请号：US14203415

申请日：2014-03-10

Applicant: INTEL CORPORATION

Inventor： Telesphor Kamgaing

IPC: H01L29/84 ,  H01L23/48 ,  H01L23/64 ,  H01L49/02 ,  B81C1/00 ,  H01L27/06

CPC classification number: H01L23/481 ,  B81B2201/0271 ,  B81B2207/096 ,  B81C1/00246 ,  B81C1/00301 ,  H01L23/5228 ,  H01L23/642 ,  H01L23/647 ,  H01L25/0657 ,  H01L27/0694 ,  H01L28/20 ,  H01L28/60 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2924/15311

Abstract: Embodiments of the present disclosure are directed toward through-silicon via (TSV)-based devices and associated techniques and configurations. In one embodiment, an apparatus includes a die having active circuitry disposed on a first side of the die and a second side disposed opposite to the first side, a bulk semiconductor material disposed between the first side and the second side of the die and a device including one or more of a capacitor, resistor or resonator disposed in the bulk semiconductor material, the capacitor, resistor or resonator including one or more TSV structures that extend through the bulk semiconductor material, an electrically insulative material disposed in the one or more TSV structures and an electrode material or resistor material in contact with the electrically insulative material within the one or more TSV structures.

公开(公告)号：US09653805B2

公开(公告)日：2017-05-16

申请号：US14445662

申请日：2014-07-29

Applicant: Intel Corporation

Inventor： Telesphor Kamgaing ,  Valluri R. Rao ,  Georgios Yorgos Palaskas

IPC: G01S19/53 ,  H01Q3/30 ,  H01Q1/22 ,  H01Q9/04 ,  H01Q21/06 ,  H01Q23/00 ,  H01L23/66 ,  H01L25/065 ,  H01L25/16 ,  H01L25/18

CPC classification number: H01Q3/30 ,  H01L23/66 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L2223/6677 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/15321 ,  H01Q1/2283 ,  H01Q9/0414 ,  H01Q21/065 ,  H01Q23/00 ,  Y10T29/49004 ,  Y10T29/49018

Abstract: An apparatus includes a die with through-silicon vias and radio frequency integrated circuit capabilities and it is vertically integrated with a phased-array antenna substrate. The through-silicon via and a radio frequency integrated circuit is coupled to a plurality of antenna elements disposed on the phased-array antenna substrate where each of the plurality of antenna elements is coupled to the through-silicon vias and radio frequency integrated circuit through a plurality of through-silicon vias. A process of assembling the through-silicon vias and radio frequency integrated circuit to the phased-array antenna substrate includes testing the apparatus.

公开(公告)号：US20170084554A1

公开(公告)日：2017-03-23

申请号：US14860614

申请日：2015-09-21

Applicant: INTEL CORPORATION

Inventor： Georgios C. Dogiamis ,  Sasha N. Oster ,  Telesphor Kamgaing ,  Adel A. Elsherbini ,  Brandon M. Rawlings ,  Feras Eid

IPC: H01L23/66 ,  H01L23/367 ,  H01L23/498

CPC classification number: H01L23/66 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L25/0655 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/73253 ,  H01L2924/1421 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15321 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Embodiments of the invention may include a packaged device that includes thermally stable radio frequency integrated circuits (RFICs). In one embodiment the packaged device may include an integrated circuit chip mounted to a package substrate. According to an embodiment, the package substrate may have conductive lines that communicatively couple the integrated circuit chip to one or more external components. One of the external components may be an RFIC module. The RFIC module may comprise an RFIC and an antenna. Additional embodiments may also include a packaged device that includes a plurality of cooling spots formed into the package substrate. In an embodiment the cooling spots may be formed proximate to interconnect lines the communicatively couple the integrated circuit chip to the RFIC.

公开(公告)号：US12261097B2

公开(公告)日：2025-03-25

申请号：US18366734

申请日：2023-08-08

Applicant: Intel Corporation

Inventor： Feras Eid ,  Telesphor Kamgaing ,  Georgios Dogiamis ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: H01L23/427 ,  H01L23/31 ,  H01L23/373 ,  H01L23/38 ,  H01L23/48 ,  H01L23/66 ,  H01L25/16 ,  H03H9/46

Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.