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273 条记录 (耗时 0.03 秒)

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
    153.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20130221423A1

    公开(公告)日：2013-08-29

    申请号：US13599420

    申请日：2012-08-30

    申请人： Kaori Kawasaki ,  Yoshiaki Fukuzumi ,  Naoki Yasuda ,  Hideaki Aochi

    发明人： Kaori Kawasaki ,  Yoshiaki Fukuzumi ,  Naoki Yasuda ,  Hideaki Aochi

    IPC分类号： H01L29/788 ,  H01L21/20

    CPC分类号： H01L27/11556

    摘要： According to one embodiment, a nonvolatile semiconductor memory device includes an underlayer and a stacked body. The stacked body includes control gate layers and insulating layers. The device includes a channel body layer penetrating through the stacked body, and the control gate layers and the insulating layers are stacked in the stacking direction, a floating gate layer provided between each of the plurality of control gate layers and the channel body layer. The device includes a block insulating layer provided between each of the plurality of control gate layers and the floating gate layer, and includes a tunnel insulating layer provided between the channel body layer and the floating gate layer. A length of a boundary between the floating gate layer and the block insulating layer is shorter than a length of a boundary between the floating gate layer and the tunnel insulating layer.

    摘要翻译： 根据一个实施例，非易失性半导体存储器件包括底层和堆叠体。 堆叠体包括控制栅极层和绝缘层。 该器件包括穿透层叠体的沟道本体层，并且控制栅极层和绝缘层在堆叠方向上堆叠，设置在多个控制栅极层中的每一个与沟道主体层之间的浮动栅层。 该器件包括设置在多个控制栅极层和浮置栅极层中的每一个之间的块绝缘层，并且包括设置在沟道本体层和浮动栅极层之间的隧道绝缘层。 浮置栅极层与块状绝缘层之间的边界长度比浮动栅极层与隧道绝缘层的边界长度短。

    SHIFT REGISTER MEMORY DEVICE, SHIFT REGISTER, AND DATA STORAGE METHOD
    154.
    发明申请
    SHIFT REGISTER MEMORY DEVICE, SHIFT REGISTER, AND DATA STORAGE METHOD 有权
    移位寄存器存储器，移位寄存器和数据存储方法

    公开(公告)号：US20110267868A1

    公开(公告)日：2011-11-03

    申请号：US13051245

    申请日：2011-03-18

    申请人： Yoshiaki Fukuzumi ,  Hideaki Aochi

    发明人： Yoshiaki Fukuzumi ,  Hideaki Aochi

    IPC分类号： G11C19/00 ,  G11C7/00 ,  G11C19/02

    CPC分类号： G11C19/085 ,  G11C11/14 ,  G11C11/161 ,  G11C11/1675 ,  G11C13/0016 ,  G11C19/005 ,  G11C19/02 ,  G11C19/0808 ,  G11C19/0875 ,  G11C2213/71

    摘要： According to one embodiment, a shift register memory device includes a shift register, a program/read element, and a rotating force application unit. The shift register includes a plurality of rotors arranged along one direction and provided with a uniaxial anisotropy. Each of the plurality of rotors has a characteristic direction rotatable around a rotational axis extending in the one direction. The program/read element is configured to program data to the shift register by causing the characteristic direction of one of the rotors to match one selected from two directions conforming to the uniaxial anisotropy and configured to read the data by detecting the characteristic direction. The rotating force application unit is configured to apply a rotating force to the shift register to urge the characteristic direction to rotate. The plurality of rotors are organized into a plurality of pairs of every two mutually adjacent rotors. A first force acts to urge the characteristic directions to be opposingly parallel for two of the rotors belonging to the same pair. A second force acts to urge the characteristic directions to be opposingly parallel for two mutually adjacent rotors belonging to mutually adjacent pairs.

    摘要翻译： 根据一个实施例，移位寄存器存储器件包括移位寄存器，程序/读取元件和旋转力施加单元。 移位寄存器包括沿着一个方向布置并具有单轴各向异性的多个转子。 所述多个转子中的每一个具有围绕沿所述一个方向延伸的旋转轴线可旋转的特征方向。 程序/读取元件被配置为通过使转子中的一个的特征方向与从单轴各向异性相一致的两个方向中选出的一个来匹配从而将数据编程到移位寄存器，并通过检测特征方向来读取数据。 旋转力施加单元构造成向移位寄存器施加旋转力以促使特征方向旋转。 多个转子被组织成每对两个彼此相邻的转子的多对。 第一力作用以促使属于同一对的两个转子的特征方向相对平行。 第二力作用以促使特征方向相对地平行于属于彼此相邻的对的两个相互相邻的转子。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    155.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 失效
    非易失性半导体存储器件

    公开(公告)号：US20100006922A1

    公开(公告)日：2010-01-14

    申请号：US12169371

    申请日：2008-07-08

    申请人： Yasuyuki MATSUOKA ,  Yoshiaki Fukuzumi ,  Hideaki Aochi

    发明人： Yasuyuki MATSUOKA ,  Yoshiaki Fukuzumi ,  Hideaki Aochi

    IPC分类号： H01L29/792

    CPC分类号： H01L21/28282 ,  G11C16/0483 ,  H01L27/0688 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/4234 ,  H01L29/66666 ,  H01L29/66833 ,  H01L29/7827 ,  H01L29/7828

    摘要： The invention provides a nonvolatile semiconductor memory device comprising a plurality of memory strings each including a plurality of electrically programmable memory cells connected in series. The memory string includes a semiconductor pillar, an insulator formed around the circumference of the semiconductor pillar, and first through nth electrodes to be turned into gate electrodes (n denotes a natural number equal to 2 or more) formed around the circumference of the insulator. It also includes interlayer electrodes formed in regions between the first through nth electrodes around the circumference of the insulator.

    摘要翻译： 本发明提供了一种非易失性半导体存储器件，包括多个存储串，每个存储串包括串联连接的多个电可编程存储器单元。 存储器串包括半导体柱，形成在半导体柱的圆周周围的绝缘体和形成在绝缘体的周围的周围形成为栅电极的第一至第n电极（n表示自然数等于2以上）。 它还包括形成在绝缘体周围的第一至第n电极之间的区域中的层间电极。

    Nonvolatile semiconductor memory device including silicon germanium semiconductor layer
    157.
    发明授权
    Nonvolatile semiconductor memory device including silicon germanium semiconductor layer 有权
    包括硅锗半导体层的非易失性半导体存储器件

    公开(公告)号：US08912594B2

    公开(公告)日：2014-12-16

    申请号：US13560260

    申请日：2012-07-27

    申请人： Jun Fujiki ,  Yoshiaki Fukuzumi ,  Hideaki Aochi

    发明人： Jun Fujiki ,  Yoshiaki Fukuzumi ,  Hideaki Aochi

    IPC分类号： H01L29/792 ,  H01L27/115 ,  H01L27/105

    CPC分类号： H01L29/7926 ,  H01L27/11582 ,  H01L29/66833

    摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a stacked body, a second insulating layer, a select gate, a memory hole, a memory film, a channel body, a first semiconductor layer, and a second semiconductor layer. The select gate is provided on the second insulating layer. The memory film is provided on an inner wall of the memory hole. The channel body is provided inside the memory film. The first semiconductor layer is provided on an upper surface of the channel body. The second semiconductor layer is provided on the first semiconductor layer. The first semiconductor layer contains silicon germanium. The second semiconductor layer contains silicon germanium doped with a first impurity. A boundary between the first semiconductor layer and the second semiconductor layer is provided above a position of an upper end of the select gate.

    摘要翻译： 根据一个实施例，非易失性半导体存储器件包括层叠体，第二绝缘层，选择栅极，存储器孔，存储​​膜，通道体，第一半导体层和第二半导体层。 选择栅极设置在第二绝缘层上。 记忆膜设置在存储孔的内壁上。 通道体设置在记忆膜的内部。 第一半导体层设置在通道主体的上表面上。 第二半导体层设置在第一半导体层上。 第一半导体层包含硅锗。 第二半导体层包含掺杂有第一杂质的硅锗。 第一半导体层和第二半导体层之间的边界设置在选择栅极的上端的位置的上方。

    Nonvolatile semiconductor memory device
    159.
    发明授权
    Nonvolatile semiconductor memory device 失效
    非易失性半导体存储器件

    公开(公告)号：US07910979B2

    公开(公告)日：2011-03-22

    申请号：US12169371

    申请日：2008-07-08

    申请人： Yasuyuki Matsuoka ,  Yoshiaki Fukuzumi ,  Hideaki Aochi

    发明人： Yasuyuki Matsuoka ,  Yoshiaki Fukuzumi ,  Hideaki Aochi

    IPC分类号： H01L29/792

    CPC分类号： H01L21/28282 ,  G11C16/0483 ,  H01L27/0688 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/4234 ,  H01L29/66666 ,  H01L29/66833 ,  H01L29/7827 ,  H01L29/7828

    摘要： The invention provides a nonvolatile semiconductor memory device comprising a plurality of memory strings each including a plurality of electrically programmable memory cells connected in series. The memory string includes a semiconductor pillar, an insulator formed around the circumference of the semiconductor pillar, and first through nth electrodes to be turned into gate electrodes (n denotes a natural number equal to 2 or more) formed around the circumference of the insulator. It also includes interlayer electrodes formed in regions between the first through nth electrodes around the circumference of the insulator.

    摘要翻译： 本发明提供了一种非易失性半导体存储器件，包括多个存储串，每个存储串包括串联连接的多个电可编程存储器单元。 存储器串包括半导体柱，形成在半导体柱的圆周周围的绝缘体和形成在绝缘体的周围的周围形成为栅电极的第一至第n电极（n表示自然数等于2以上）。 它还包括形成在绝缘体周围的第一至第n电极之间的区域中的层间电极。