公开(公告)号：US07119624B2

公开(公告)日：2006-10-10

申请号：US11096154

申请日：2005-03-30

Applicant: Ramon A. Gomez

Inventor： Ramon A. Gomez

IPC: H03L7/08

CPC classification number: H03L7/00 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1278 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03D7/165 ,  H03D7/18 ,  H03J5/244 ,  H03J2200/10 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/107 ,  H03L7/1072 ,  H03L7/18

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for changing PLL operating conditions, in addition to compensating for variable VCO gain.

公开(公告)号：US20060220757A1

公开(公告)日：2006-10-05

申请号：US11390452

申请日：2006-03-28

Applicant: Kunito Satake ,  Hirotaka Oosawa ,  Isao Ikuta ,  Satoru Yamamoto

Inventor： Kunito Satake ,  Hirotaka Oosawa ,  Isao Ikuta ,  Satoru Yamamoto

IPC: H03B5/12

CPC classification number: H03L7/107 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/124 ,  H03B5/1265 ,  H03B2201/025 ,  H03J2200/10 ,  H03L7/07 ,  H03L7/099 ,  H03L7/183

Abstract: A radio frequency IC includes a PLL circuit and prevents a PLL loop from being easily unlocked upon fluctuation of VCO oscillation frequencies due to a change in temperature. The PLL loop includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparison circuit, and a loop filter. A switching switch can apply one of plural predetermined set voltages to the VCO in place of a voltage of the loop filter in an open state in which the loop filter is disconnected from the VCO. The radio frequency IC als has a decision circuit that decides whether the phase of output of the variable frequency divider is ahead of or lags behind that of a reference signal of a predetermined frequency, and an automatic band switching circuit that generates a signal for switching VCO frequency bands, based on output of the decision circuit.

Abstract translation: 无线电频率IC包括PLL电路，并且防止由于温度变化导致VCO振荡频率波动时PLL环路容易解锁。 PLL环路包括能够切换振荡频带的VCO，可变分频器，相位比较电路和环路滤波器。 切换开关可以在环路滤波器与VCO断开的打开状态中将代替多个预定设定电压中的一个代替环路滤波器的电压。 射频IC als具有决定电路，判断可变分频器的输出的相位是否在预定频率的参考信号的前面，或者落后于预定频率的参考信号的输出相位，以及产生用于开关VCO的信号的自动频带切换电路 频段，基于判决电路的输出。

公开(公告)号：US20060158267A1

公开(公告)日：2006-07-20

申请号：US11384605

申请日：2006-03-20

Applicant: Michael McCorquodale ,  Scott Pernia ,  Sundus Kubba

Inventor： Michael McCorquodale ,  Scott Pernia ,  Sundus Kubba

IPC: H03L7/00

CPC classification number: G06F1/04 ,  G06F1/08 ,  H03B5/06 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1221 ,  H03B5/1228 ,  H03B5/124 ,  H03B2201/025 ,  H03J1/0008 ,  H03J2200/10 ,  H03L1/022 ,  H03L3/00 ,  H03L7/08 ,  H03L7/0812 ,  H03L7/099

Abstract: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference comprising an LC oscillator with a frequency controller to control and provide a stable resonant frequency. Such stability is provided over variations in a selected parameter such as temperature and fabrication process variations. The various apparatus embodiments include a sensor adapted to provide a signal in response to at least one parameter of a plurality of parameters; and a frequency controller adapted to modify the resonant frequency in response to the second signal. In exemplary embodiments, the sensor is implemented as a current source responsive to temperature fluctuations, and the frequency controller is implemented as a plurality of controlled reactance modules which are selectively couplable to the oscillator or to one or more control voltages. The controlled reactance modules may include fixed or variable capacitances or inductances, and may be binary weighted. Arrays of resistive modules are also provided, to generate one or more control voltages.

公开(公告)号：US07019598B2

公开(公告)日：2006-03-28

申请号：US10665631

申请日：2003-09-22

Applicant: Ralph Duncan ,  Tom W. Kwan

Inventor： Ralph Duncan ,  Tom W. Kwan

IPC: H03B5/04 ,  H03B5/12

CPC classification number: H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1253 ,  H03B5/364 ,  H03B2200/0038 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H01L2924/00

Abstract: An integrated VCO having an improved tuning range over process and temperature variations. There is therefore provided in a present embodiment of the invention an integrated VCO. The VCO comprises, a substrate, a VCO tuning control circuit responsive to a VCO state variable that is disposed upon the substrate, and a VCO disposed upon the substrate, having a tuning control voltage input falling within a VCO tuning range for adjusting a VCO frequency output, and having its tuning range adjusted by the tuning control circuit in response to the VCO state variable.

公开(公告)号：US20060033587A1

公开(公告)日：2006-02-16

申请号：US10982635

申请日：2004-11-04

Applicant: Jose Cabanillas

Inventor： Jose Cabanillas

IPC: H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1212 ,  H03B5/1218 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1296 ,  H03B2200/0048 ,  H03B2201/025

Abstract: A multi-band VCO employs a coupled-inductor based resonator having N≧2 ports. Each port has an inductor and at least one capacitor. The N inductors for the N ports are magnetically coupled. The inductors/ports may be selectively enabled and disabled to allow the VCO to operate at different frequency bands. The capacitor(s) for each port may include one or more fixed capacitors, one or more variable capacitors (varactors), one or more switchable capacitors, or any combination of fixed, variable, and switchable capacitors. The switchable capacitors (if any) in the enabled ports may be selectively enabled and disabled to vary the VCO oscillation frequency. The varactors (if any) in the enabled ports can vary the oscillation frequency to lock the VCO to a desired frequency. The multi-band VCO may be implemented with various oscillator topologies and can replace multiple single-band VCOs.

公开(公告)号：US20050275469A1

公开(公告)日：2005-12-15

申请号：US10864969

申请日：2004-06-10

Applicant: Emmanuel Metaxakis

Inventor： Emmanuel Metaxakis

IPC: H03B1/00 ,  H03B5/12 ,  H03L7/00

CPC classification number: H03L7/00 ,  H03B5/1215 ,  H03B5/1231 ,  H03B5/124 ,  H03B27/00 ,  H03B2201/025 ,  H03J2200/10

Abstract: In wireless application there is made use of a quadrature oscillators that generate signals that are capable of oscillating at quadrature of each other. The quadrature oscillator is comprised of two differential modified Colpitts oscillators. A capacitor bank allows for the selection of a desired frequency from a plurality of discrete possible frequencies. The quadrature oscillator is further coupled with a phase-error detector connected at the point-of-use of the generated ‘I’ and ‘Q’ channels and through the control of current sources provides corrections means to ensure that the phase shift at the point-of-use remains at the desired ninety degrees.

Abstract translation: 在无线应用中，使用产生能够彼此正交振荡的信号的正交振荡器。 正交振荡器由两个差分改进的Colpitts振荡器组成。 电容器组允许从多个离散的可能频率中选择期望的频率。 正交振荡器还与在所产生的“I”和“Q”通道的使用点处连接的相位误差检测器耦合，并且通过电流源的控制提供校正装置以确保在点处的相移 - 使用保持在所需的九十度。

公开(公告)号：US20050258901A1

公开(公告)日：2005-11-24

申请号：US11131281

申请日：2005-05-18

Applicant: Haideh Khorramabadi

Inventor： Haideh Khorramabadi

IPC: H01F17/00 ,  H01L23/522 ,  H01L27/02 ,  H01L27/08 ,  H03B1/00 ,  H03B5/12 ,  H03B5/36 ,  H03D7/16 ,  H03D7/18 ,  H03G1/00 ,  H03H11/12 ,  H03J1/00 ,  H03J3/04 ,  H03J3/08 ,  H03J3/18 ,  H03L1/02 ,  H03L7/10 ,  H03L7/23 ,  H03F3/45

CPC classification number: H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/364 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03F1/3211 ,  H03F1/52 ,  H03F3/191 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2203/45318 ,  H03F2203/45704 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H03L7/18 ,  H01L2924/00

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.

Abstract translation: 具有通道选择和图像抑制的集成接收器基本上在单个CMOS集成电路上实现。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 与图像抑制混合器一起集成到衬底上的LC滤波器提供图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 有源滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.滤波器包括增益级，其通过使用交叉耦合辅助差分对CMOS放大器来消除主线性化差分对放大器中的失真而提供改进的动态范围。 频率规划提供额外的镜像抑制。 本地振荡器信号产生方法在芯片上减少失真。 PLL产生所需的带外LO信号。 直接合成产生带内LO信号。 PLL VCO自动居中。 差分晶体振荡器提供频率参考。 使用整个接收机的差分信号传输。 ESD保护由衬垫环和ESD夹紧结构提供。 分流器利用每个引脚上的门极升压来放电ESD积聚。 IF VGA利用交叉耦合的差分对放大器实现的失真消除，其具有与差分对源的当前转向结合动态修改的V ds。

公开(公告)号：US20050185487A1

公开(公告)日：2005-08-25

申请号：US11053530

申请日：2005-02-08

Applicant: Alexander Belitzer

Inventor： Alexander Belitzer

IPC: H03B5/32 ,  G11C7/00 ,  H03B1/00 ,  H03B5/02 ,  H03B5/12 ,  H03J5/24 ,  H03K3/02

CPC classification number: H03B5/36 ,  H03B5/362 ,  H03B5/368 ,  H03B2201/025 ,  H03J2200/10

Abstract: A digitally controlled oscillator circuit for generating a signal at variable frequency is provided. The circuit has a data input for a digital control word and a capacitive circuit for varying the variable frequency of the signal. The capacitive circuit comprises a control input for a control signal and its total capacitance varies on the basis of the control signal. The data input and the control input have a mapping device coupled between them. This device is set up such that it ascertains the control signal from the digital control word.

Abstract translation: 提供了一种用于产生可变频率信号的数字控制振荡器电路。 电路具有用于数字控制字的数据输入和用于改变信号的可变频率的电容电路。 电容电路包括用于控制信号的控制输入，其总电容根据控制信号而变化。 数据输入和控制输入具有耦合在它们之间的映射设备。 该装置设置成从数字控制字确定控制信号。

公开(公告)号：US20050174186A1

公开(公告)日：2005-08-11

申请号：US11096154

申请日：2005-03-30

Applicant: Ramon Gomez

Inventor： Ramon Gomez

IPC: H03B1/00 ,  H03B5/12 ,  H03D7/18 ,  H03J5/24 ,  H03L7/00 ,  H03L7/089 ,  H03L7/099 ,  H03L7/10 ,  H03L7/18 ,  H03B5/00

CPC classification number: H03L7/00 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1278 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03D7/165 ,  H03D7/18 ,  H03J5/244 ,  H03J2200/10 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/107 ,  H03L7/1072 ,  H03L7/18

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for changing PLL operating conditions, in addition to compensating for variable VCO gain.

公开(公告)号：US20050059375A1

公开(公告)日：2005-03-17

申请号：US10890998

申请日：2004-07-15

Applicant: Kazuhide Abe ,  Mayumi Morizuka ,  Ryoichi Ohara ,  Kenya Sano ,  Naoko Yanase ,  Takaaki Yasumoto ,  Tadahiro Sasaki ,  Kazuhiko Itaya ,  Takashi Kawakubo ,  Hiroshi Yoshida ,  Ryuichi Fujimoto ,  Keiichi Yamaguchi ,  Nobuyuki Itoh ,  Tooru Kozu ,  Takeshi Ookubo

Inventor： Kazuhide Abe ,  Mayumi Morizuka ,  Ryoichi Ohara ,  Kenya Sano ,  Naoko Yanase ,  Takaaki Yasumoto ,  Tadahiro Sasaki ,  Kazuhiko Itaya ,  Takashi Kawakubo ,  Hiroshi Yoshida ,  Ryuichi Fujimoto ,  Keiichi Yamaguchi ,  Nobuyuki Itoh ,  Tooru Kozu ,  Takeshi Ookubo

IPC: H03K3/354 ,  H03B1/00 ,  H03B5/30 ,  H03B5/32 ,  H03H9/17 ,  H03L7/08 ,  H03L7/089 ,  H03L7/099 ,  H03L7/10 ,  H03L7/113 ,  H03L7/18 ,  H03L7/187 ,  H03L7/199 ,  H04B1/06 ,  H04B7/00 ,  H04B17/00

CPC classification number: H03L7/099 ,  H03B5/326 ,  H03B2200/0012 ,  H03B2201/0208 ,  H03B2201/025 ,  H03L7/0891 ,  H03L7/10 ,  H03L7/113 ,  H03L7/18 ,  H03L7/199 ,  H03L2207/06

Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.

Abstract translation: 压控振荡器包括谐振器，其构造成在振荡的起始周期期间与初始振荡频率谐振，并且在稳态振荡期间具有稳定的振荡频率。 谐振器包括具有高于稳定振荡频率的串联谐振频率的膜体声波谐振器。 配置为驱动谐振器的负电阻电路与起动周期中的电抗相比，在稳态振荡中具有正增量。