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公开(公告)号:US20240370111A1
公开(公告)日:2024-11-07
申请号:US18660602
申请日:2024-05-10
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA
IPC: G06F3/041 , G02F1/1333 , G06F1/3234 , G06F3/044 , G06F3/045 , G09G3/36
Abstract: It is an object to provide a semiconductor display device having a touch panel, which can reduce power consumption. The semiconductor display device includes a panel which is provided with a pixel portion and a driver circuit which controls an input of the image signal to the pixel portion, and a touch panel provided in a position overlapping with the panel in the pixel portion. The pixel portion includes a display element configured to perform display in accordance with voltage of the image signal to be input, and a transistor configured to control retention of the voltage. The transistor includes an oxide semiconductor in a channel formation region. The driving frequency of the driver circuit, that is, the number of writing operations of the image signal for a certain period is changed in accordance with an operation signal from a touch panel.
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公开(公告)号:US20240305277A1
公开(公告)日:2024-09-12
申请号:US18664387
申请日:2024-05-15
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Jun KOYAMA
IPC: H03K3/012 , G11C5/14 , G11C8/04 , H01L21/8234 , H01L21/8258 , H01L27/06 , H01L27/088 , H01L27/12 , H01L29/04 , H01L29/786 , H03K3/037 , H03K19/00
CPC classification number: H03K3/012 , G11C5/147 , G11C8/04 , H01L21/8258 , H01L27/0629 , H01L27/088 , H01L27/1225 , H01L29/045 , H01L29/7869 , H01L29/78693 , H03K3/0372 , H03K3/0375 , H03K19/0008 , H01L21/823412
Abstract: Provided is a semiconductor device including a sequential circuit including a first transistor and a capacitor. The first transistor includes a semiconductor layer including indium, zinc, and oxygen to form a channel formation region. A node electrically connected to a source or a drain of the first transistor and a capacitor becomes a floating state when the first transistor turns off, so that a potential of the node can be maintained for a long period. A power-gating control circuit may be provided to control supply of power supply potential to the sequential circuit. The potential of the node still can be maintained while supply of the power supply potential is stopped.
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公开(公告)号:US20240258323A1
公开(公告)日:2024-08-01
申请号:US18631351
申请日:2024-04-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE
IPC: H01L27/12 , H01L21/02 , H01L27/088 , H01L29/04 , H01L29/24 , H01L29/49 , H01L29/786
CPC classification number: H01L27/1225 , H01L27/0883 , H01L27/1251 , H01L27/127 , H01L27/1288 , H01L29/045 , H01L29/24 , H01L29/78669 , H01L29/78678 , H01L29/7869 , H01L29/78693 , H01L29/78696 , H01L21/02603 , H01L29/04 , H01L29/4908 , H01L2924/13069
Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.
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公开(公告)号:US20240201550A1
公开(公告)日:2024-06-20
申请号:US18592933
申请日:2024-03-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Toshikazu KONDO , Jun KOYAMA , Shunpei YAMAZAKI
IPC: G02F1/1368 , G02F1/1333 , G02F1/136 , G02F1/1362 , G09G3/36 , H01L27/12 , H01L29/45 , H01L29/786
CPC classification number: G02F1/1368 , G02F1/133345 , G02F1/136227 , G02F1/136286 , G09G3/3622 , H01L27/1225 , H01L27/1244 , H01L29/45 , H01L29/7869 , G02F1/13606 , G02F1/13624 , G02F1/136295 , G02F2202/10 , G09G2300/0426
Abstract: An object is to reduce parasitic capacitance of a signal line included in a liquid crystal display device. A transistor including an oxide semiconductor layer is used as a transistor provided in each pixel. Note that the oxide semiconductor layer is an oxide semiconductor layer which is highly purified by thoroughly removing impurities (hydrogen, water, or the like) which become electron suppliers (donors). Thus, the amount of leakage current (off-state current) can be reduced when the transistor is off. Therefore, a voltage applied to a liquid crystal element can be held without providing a capacitor in each pixel. In addition, a capacitor wiring extending to a pixel portion of the liquid crystal display device can be eliminated. Therefore, parasitic capacitance in a region where the signal line and the capacitor wiring intersect with each other can be eliminated.
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公开(公告)号:US20230402470A1
公开(公告)日:2023-12-14
申请号:US18238639
申请日:2023-08-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
IPC: H01L27/12 , H10B10/00 , H01L29/786 , H10B41/30 , H01L27/118 , H10B12/00 , H01L29/24 , H01L21/84 , H10B41/70 , H10B41/00
CPC classification number: H01L27/1255 , H10B10/125 , H01L29/7869 , H10B41/30 , H01L27/11803 , H01L27/1225 , H10B12/30 , H10B10/00 , H10B12/00 , H01L29/24 , H01L21/84 , H10B12/05 , H10B41/70 , H10B41/00 , G11C16/26
Abstract: An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.
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公开(公告)号:US20230402469A1
公开(公告)日:2023-12-14
申请号:US18238610
申请日:2023-08-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Kiyoshi KATO
IPC: H01L27/12 , H10B10/00 , H01L29/786 , H10B41/30 , H01L27/118 , H10B12/00 , H01L29/24 , H01L21/84 , H10B41/70 , H10B41/00
CPC classification number: H01L27/1255 , H10B10/125 , H01L29/7869 , H10B41/30 , H01L27/11803 , H01L27/1225 , H10B12/30 , H10B10/00 , H10B12/00 , H01L29/24 , H01L21/84 , H10B12/05 , H10B41/70 , H10B41/00 , G11C16/26
Abstract: An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.
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公开(公告)号:US20230387318A1
公开(公告)日:2023-11-30
申请号:US18233456
申请日:2023-08-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Keitaro IMAI
IPC: H01L29/786 , H01L27/06 , H01L27/12
CPC classification number: H01L29/7869 , H01L27/0688 , H01L27/1225 , H01L27/1207 , H01L21/84
Abstract: An objet of the present invention is to provide a semiconductor device with a new structure. Disclosed is a semiconductor device including a first transistor which includes a channel formation region on a substrate containing a semiconductor material, impurity regions formed with the channel formation region interposed therebetween, a first gate insulating layer over the channel formation region, a first gate electrode over the first gate insulating layer, and a first source electrode and a first drain electrode which are electrically connected to the impurity region; and a second transistor which includes a second gate electrode over the substrate containing a semiconductor material, a second gate insulating layer over the second gate electrode, an oxide semiconductor layer over the second gate insulating layer, and a second source electrode and a second drain electrode which are electrically connected to the oxide semiconductor layer.
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公开(公告)号:US20230335561A1
公开(公告)日:2023-10-19
申请号:US18207175
申请日:2023-06-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE
IPC: H01L27/12 , H01L29/04 , H01L29/417 , H01L29/423 , H01L29/10 , H01L29/45 , H01L29/24 , G09G3/20 , G11C19/28 , H01L29/786
CPC classification number: H01L27/1229 , H01L29/045 , H01L29/41733 , H01L29/42372 , H01L29/1033 , H01L29/45 , H01L29/24 , G09G3/20 , G11C19/28 , H01L27/1225 , H01L27/1251 , H01L29/78648 , H01L29/7869 , H01L29/247 , H01L29/78693 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , H10K59/1213
Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
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公开(公告)号:US20230215396A1
公开(公告)日:2023-07-06
申请号:US18090587
申请日:2022-12-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Jun KOYAMA , Atsushi UMEZAKI
CPC classification number: G09G3/3674 , H01L27/1214 , G09G2330/021 , G09G2310/08 , G09G2310/0289
Abstract: The amplitude voltage of a signal input to a level shifter can be increased and then output by the level shifter circuit. Specifically, the amplitude voltage of the signal input to the level shifter can be increased to be output. This decreases the amplitude voltage of a circuit (a shift register circuit, a decoder circuit, or the like) which outputs the signal input to the level shifter. Consequently, power consumption of the circuit can be reduced. Alternatively, a voltage applied to a transistor included in the circuit can be reduced. This can suppress degradation of the transistor or damage to the transistor.
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公开(公告)号:US20220350435A1
公开(公告)日:2022-11-03
申请号:US17864504
申请日:2022-07-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA
IPC: G06F3/041 , G06F1/3234 , G06F3/044 , G06F3/045 , G09G3/36 , G02F1/1333
Abstract: It is an object to provide a semiconductor display device having a touch panel, which can reduce power consumption. The semiconductor display device includes a panel which is provided with a pixel portion and a driver circuit which controls an input of the image signal to the pixel portion, and a touch panel provided in a position overlapping with the panel in the pixel portion. The pixel portion includes a display element configured to perform display in accordance with voltage of the image signal to be input, and a transistor configured to control retention of the voltage. The transistor includes an oxide semiconductor in a channel formation region. The driving frequency of the driver circuit, that is, the number of writing operations of the image signal for a certain period is changed in accordance with an operation signal from a touch panel.
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