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    IMAGE SENSOR HAVING COMPRESSIVE LAYERS
    11.
    发明申请
    IMAGE SENSOR HAVING COMPRESSIVE LAYERS 有权
    具有压缩层的图像传感器

    公开(公告)号：US20130329102A1

    公开(公告)日：2013-12-12

    申请号：US13492258

    申请日：2012-06-08

    Applicant: Chun-Han TSAO ,  Chih-Yu LAI ,  Chih-Hui HUANG ,  Cheng-Ta WU ,  Yeur-Luen TU ,  Ching-Chun WANG ,  Shyh-Fann TING ,  Chia-Shiung TSAI

    Inventor： Chun-Han TSAO ,  Chih-Yu LAI ,  Chih-Hui HUANG ,  Cheng-Ta WU ,  Yeur-Luen TU ,  Ching-Chun WANG ,  Shyh-Fann TING ,  Chia-Shiung TSAI

    IPC: H04N5/335

    CPC classification number: H01L31/02164 ,  H01L27/14623 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/148 ,  H01L51/4273

    Abstract: An image sensor device including a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon oxide, and is negatively charged. The second compressively-stressed layer contains silicon nitride, and is negatively charged. A metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a third compressively-stressed layer formed on the metal shield and the second compressively-stressed layer. The third compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the third compressively-stressed layer.

    Abstract translation: 一种包括具有阵列区域和黑色电平校正区域的半导体衬底的图像传感器装置。 阵列区域包含多个辐射敏感像素。 黑色电平校正区域包含一个或多个参考像素。 基板具有前侧和后侧。 图像传感器装置包括形成在基板的背面上的第一压缩应力层。 第一压应力层含有氧化硅，带负电荷。 第二压应力层含有氮化硅，带负电荷。 在黑色电平校正区域的至少一部分上形成金属屏蔽。 图像传感器装置包括形成在金属屏蔽和第二压缩应力层上的第三压缩应力层。 第三压缩应力层含有氧化硅。 金属屏蔽层的侧壁由第三压应力层保护。

    Method and Apparatus for Reducing Stripe Patterns
    13.
    发明申请
    Method and Apparatus for Reducing Stripe Patterns 有权
    减少条纹图案的方法和装置

    公开(公告)号：US20130210188A1

    公开(公告)日：2013-08-15

    申请号：US13371303

    申请日：2012-02-10

    Applicant: Chung Chien Wang ,  Yeur-Luen Tu ,  Cheng-Ta Wu ,  Chia-Shiung Tsai

    Inventor： Chung Chien Wang ,  Yeur-Luen Tu ,  Cheng-Ta Wu ,  Chia-Shiung Tsai

    IPC: H01L21/268 ,  B23K26/02

    CPC classification number: H01L21/268 ,  G01B11/14 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

    Abstract: A method for reducing stripe patterns comprising receiving scattered light signals from a backside surface of a laser annealed backside illuminated image sensor wafer, generating a backside surface image based upon the scattered light signals, determining a distance between an edge of a sensor array of the laser anneal backside illuminated image sensor wafer and an adjacent boundary of a laser beam and re-calibrating the laser beam if the distance is less than a predetermined value.

    Abstract translation: 一种用于减少条纹图案的方法，包括从激光退火背面照射图像传感器晶片的背面接收散射光信号，基于散射光信号产生背面图像，确定激光器的传感器阵列的边缘之间的距离 退火背面照射的图像传感器晶片和激光束的相邻边界，并且如果距离小于预定值则重新校准激光束。

    Method and apparatus for reducing stripe patterns
    15.
    发明授权
    Method and apparatus for reducing stripe patterns 有权
    减少条纹图案的方法和装置

    公开(公告)号：US09099389B2

    公开(公告)日：2015-08-04

    申请号：US13371303

    申请日：2012-02-10

    Applicant: Chung Chien Wang ,  Yeur-Luen Tu ,  Cheng-Ta Wu ,  Chia-Shiung Tsai

    Inventor： Chung Chien Wang ,  Yeur-Luen Tu ,  Cheng-Ta Wu ,  Chia-Shiung Tsai

    IPC: H01L21/268 ,  H01L27/146

    CPC classification number: H01L21/268 ,  G01B11/14 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

    Abstract: A method for reducing stripe patterns comprising receiving scattered light signals from a backside surface of a laser annealed backside illuminated image sensor wafer, generating a backside surface image based upon the scattered light signals, determining a distance between an edge of a sensor array of the laser anneal backside illuminated image sensor wafer and an adjacent boundary of a laser beam and re-calibrating the laser beam if the distance is less than a predetermined value.

    Abstract translation: 一种用于减少条纹图案的方法，包括从激光退火背面照射图像传感器晶片的背面接收散射光信号，基于散射光信号产生背面图像，确定激光器的传感器阵列的边缘之间的距离 退火背面照射的图像传感器晶片和激光束的相邻边界，并且如果距离小于预定值则重新校准激光束。

    Image sensor having compressive layers
    16.
    发明授权
    Image sensor having compressive layers 有权
    具有压缩层的图像传感器

    公开(公告)号：US09059057B2

    公开(公告)日：2015-06-16

    申请号：US13492258

    申请日：2012-06-08

    Applicant: Chun-Han Tsao ,  Chih-Yu Lai ,  Chih-Hui Huang ,  Cheng-Ta Wu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Shyh-Fann Ting ,  Chia-Shiung Tsai

    Inventor： Chun-Han Tsao ,  Chih-Yu Lai ,  Chih-Hui Huang ,  Cheng-Ta Wu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Shyh-Fann Ting ,  Chia-Shiung Tsai

    IPC: H01L31/102 ,  H01L21/00 ,  H01L27/146 ,  H01L27/148

    CPC classification number: H01L31/02164 ,  H01L27/14623 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/148 ,  H01L51/4273

    Abstract: An image sensor device including a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon oxide, and is negatively charged. The second compressively-stressed layer contains silicon nitride, and is negatively charged. A metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a third compressively-stressed layer formed on the metal shield and the second compressively-stressed layer. The third compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the third compressively-stressed layer.

    Abstract translation: 一种包括具有阵列区域和黑色电平校正区域的半导体衬底的图像传感器装置。 阵列区域包含多个辐射敏感像素。 黑色电平校正区域包含一个或多个参考像素。 基板具有前侧和后侧。 图像传感器装置包括形成在基板的背面上的第一压缩应力层。 第一压应力层含有氧化硅，带负电荷。 第二压应力层含有氮化硅，带负电荷。 在黑色电平校正区域的至少一部分上形成金属屏蔽。 图像传感器装置包括形成在金属屏蔽和第二压缩应力层上的第三压缩应力层。 第三压缩应力层含有氧化硅。 金属屏蔽层的侧壁由第三压应力层保护。

    Method of reducing delamination in the fabrication of small-pitch devices
    18.
    发明授权
    Method of reducing delamination in the fabrication of small-pitch devices 有权
    减少小间距装置制造中分层的方法

    公开(公告)号：US08048813B2

    公开(公告)日：2011-11-01

    申请号：US12326099

    申请日：2008-12-01

    Applicant: Chih-Yu Lai ,  Cheng-Ta Wu ,  Neng-Kuo Chen ,  Cheng-Yuan Tsai

    Inventor： Chih-Yu Lai ,  Cheng-Ta Wu ,  Neng-Kuo Chen ,  Cheng-Yuan Tsai

    IPC: H01L21/302

    CPC classification number: H01L21/0337

    Abstract: A method of forming an integrated circuit structure includes providing a substrate; forming a first hard mask layer over the substrate; forming a second hard mask layer over the first hard mask layer; patterning the second hard mask layer to form a hard mask; and, after the step of patterning the second hard mask layer, baking the substrate, the first hard mask layer, and the hard mask. After the step of baking, a spacer layer is formed, which includes a first portion on a top of the hard mask, and a second portion and a third portion on opposite sidewalls of the hard mask. The method further includes removing the first portion of the spacer layer; removing the hard mask; and using the second portion and the third portion of the spacer layer as masks to pattern the first hard mask layer.

    Abstract translation: 形成集成电路结构的方法包括提供基板; 在衬底上形成第一硬掩模层; 在所述第一硬掩模层上形成第二硬掩模层; 图案化第二硬掩模层以形成硬掩模; 并且在图案化第二硬掩模层的步骤之后，烘烤基板，第一硬掩模层和硬掩模。 在烘烤步骤之后，形成间隔层，其包括在硬掩模的顶部上的第一部分和硬掩模的相对侧壁上的第二部分和第三部分。 该方法还包括去除间隔层的第一部分; 去除硬面膜; 并且使用间隔层的第二部分和第三部分作为掩模来对第一硬掩模层进行图案化。

    System and method for processing residual gas
    19.
    发明授权
    System and method for processing residual gas 失效
    残余气体处理系统及方法

    公开(公告)号：US06716750B2

    公开(公告)日：2004-04-06

    申请号：US09886010

    申请日：2001-06-22

    Applicant: Cheng-ta Wu ,  Chang-Cheng Chen ,  Chun-Chi Chen

    Inventor： Cheng-ta Wu ,  Chang-Cheng Chen ,  Chun-Chi Chen

    IPC: H01L2144

    CPC classification number: B01D53/34 ,  B01D45/08 ,  B01D53/74 ,  B01J8/0065 ,  B01J12/00

    Abstract: A system for processing residual gas that includes a chamber having at least one baffle for increasing gas flow path, a residual gas inlet mechanism connected to the chamber for supplying residual gas to the chamber, at least one first gas inlet mechanism connected to the chamber for supplying inert gas to the chamber, at least one second gas inlet mechanism connected to the chamber for supplying a reactive gas to the chamber, and a gas outlet mechanism for connected to the chamber for outputting mixed gases from mixing the residual gas, inert gas and reactive gas and non-reacted residual gas, inert gas and reactive gas.

    Abstract translation: 一种用于处理残余气体的系统，其包括具有用于增加气体流路的至少一个挡板的室，连接到所述室的残余气体入口机构，用于向所述室供应残余气体;至少一个连接到所述室的第一气体入口机构， 向所述室供应惰性气体，连接到所述室的至少一个第二气体入口机构用于向所述室供应反应性气体;以及气体出口机构，用于连接到所述室，用于从混合残余气体，惰性气体和 反应气体和未反应的残留气体，惰性气体和反应气体。

    Method to Form a CMOS Image Sensor
    20.
    发明申请
    Method to Form a CMOS Image Sensor 有权
    形成CMOS图像传感器的方法

    公开(公告)号：US20140061738A1

    公开(公告)日：2014-03-06

    申请号：US13602494

    申请日：2012-09-04

    Applicant: Chung Chien Wang ,  Yeur-Luen Tu ,  Cheng-Ta Wu ,  Jiech-Fun Lu ,  Chun-Wei Chang ,  Wang-Pen Mo ,  Jhy-Jyi Sze ,  Chia-Shiung Tsai

    Inventor： Chung Chien Wang ,  Yeur-Luen Tu ,  Cheng-Ta Wu ,  Jiech-Fun Lu ,  Chun-Wei Chang ,  Wang-Pen Mo ,  Jhy-Jyi Sze ,  Chia-Shiung Tsai

    IPC: H01L31/0216

    CPC classification number: H01L21/266 ,  H01L27/14689

    Abstract: The present disclosure relates to a method and composition to limit crystalline defects introduced in a semiconductor device during ion implantation. A high-temperature low dosage implant is performed utilizing a tri-layer photoresist which maintains the crystalline structure of the semiconductor device while limiting defect formation within the semiconductor device. The tri-layer photoresist comprises a layer of spin-on carbon deposited onto a substrate, a layer of silicon containing hard-mask formed above the layer of spin-on carbon, and a layer of photoresist formed above the layer of silicon containing hard-mask. A pattern formed in the layer of photoresist is sequentially transferred to the silicon containing hard-mask, then to the spin-on carbon, and defines an area of the substrate to be selectively implanted with ions.

    Abstract translation: 本发明涉及在离子注入期间限制在半导体器件中引入的结晶缺陷的方法和组合物。 使用保持半导体器件的晶体结构同时限制半导体器件内的缺陷形成的三层光致抗蚀剂进行高温低剂量注入。 三层光致抗蚀剂包括沉积在基底上的旋涂碳层，在旋涂碳层上方形成的含硅的硬掩模层，以及形成在含硅硬质层的硅层之上的光致抗蚀剂层， 面具。 形成在光致抗蚀剂层上的图案被顺序地转移到含硅的硬掩模，然后转移到旋涂碳上，并且限定要选择性地注入离子的衬底区域。

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