公开(公告)号：US06731015B2

公开(公告)日：2004-05-04

申请号：US10026452

申请日：2001-12-27

申请人： Chi-Chuan Wu ,  Tzong-Dar Her

发明人： Chi-Chuan Wu ,  Tzong-Dar Her

IPC分类号： H01L23495

CPC分类号： H01L23/3128 ,  H01L23/36 ,  H01L23/4334 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A super low profile package with stacked dies comprises a substrate, a heat spreader, a first die, a second die, a molding compound, and a number of solder balls. The substrate has a cavity, a top surface and a bottom surface opposite to the top surface. The heat spreader is connected to the bottom surface of the substrate, and a portion of the heat spreader opposite to the cavity serves as a die pad. The first die seated in the cavity is attached to the die pad while the second die seated in the cavity is attached to the first die, and both dies are wire-bonded to the substrate for electrical connection. The molding compound fills the cavity and encapsulates the first die, the second die, the heat spreader, and part of the bottom surface of the substrate. Numerous solder balls are attached to the bottom surface of the substrate. The benefits resulting from the package of the invention include a reduction of profile, a simple manufacturing process, and a low prime cost.

摘要翻译： 具有堆叠模具的超薄型封装包括基板，散热器，第一模具，第二模具，模塑料和多个焊球。 衬底具有与顶表面相对的空腔，顶表面和底表面。 散热器连接到基板的底表面，散热器与空腔相对的一部分用作管芯焊盘。 安置在空腔中的第一个模具附接到模具垫，而位于空腔中的第二模具附接到第一模具，并且两个模具被引线接合到基板用于电连接。 模制化合物填充空腔并封装第一模具，第二模具，散热器和衬底的底部表面的一部分。 许多焊球附着到基底的底表面上。 由本发明的包装带来的好处包括轮廓的减少，简单的制造过程和低的原始成本。

公开(公告)号：US06555902B2

公开(公告)日：2003-04-29

申请号：US09895553

申请日：2001-06-28

申请人： Randy H. Y. Lo ,  Chien-Ping Huang ,  Chi-Chuan Wu

发明人： Randy H. Y. Lo ,  Chien-Ping Huang ,  Chi-Chuan Wu

IPC分类号： H01L2302

CPC分类号： H01L25/0652 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2924/00

摘要： A packaging structure comprises a substrate, a plurality of semiconductor chips contiguously mounted into a plurality of stacked semiconductor chip sets, a plurality of supporting members, a plurality of adhesive layers, a plurality of wires and a molding compound. Each of the semiconductor chip sets comprises at least a semiconductor chip, each semiconductor chip having plurality of bonding pads. The size deviation between the semiconductor chip sets is less than 0.3 mm. The supporting members separate from one another the semiconductor chip sets stacked above the substrate. The adhesive layers bond the substrate, the supporting members and the semiconductor chips to one another. The wires connect the semiconductor chips to one another and to the substrate. The molding compound encapsulates the substrate, the semiconductor chips, the supporting members, and the adhesive layers.

公开(公告)号：US07170168B2

公开(公告)日：2007-01-30

申请号：US10965093

申请日：2004-10-13

申请人： Chi-Chuan Wu ,  Ke-Chuan Yang

发明人： Chi-Chuan Wu ,  Ke-Chuan Yang

IPC分类号： H01L23/48

CPC分类号： H01L21/4828 ,  H01L23/3107 ,  H01L23/49548 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/15151 ,  H01L2924/00 ,  H01L2224/0401

摘要： A flip-chip semiconductor package with a lead frame and a method for fabricating the same are provided. The lead frame has a plurality of leads, each lead having an upper surface, a lower surface, and an inner end directed toward the center of the lead frame. A recessed portion is formed on the upper surface of the inner end of each lead, making the inner end shaped as a stepped structure. The depth of the recessed portion is equal to a height of a reflow-collapsed solder bump that is for electrically connecting a chip to the lead. At least one chip is electrically connected to the leads in a flip-chip manner via a plurality of solder bumps bonded to the recessed portions. An encapsulation body is formed to encapsulate the lead frame, chip and solder bumps, with the lower surfaces of the leads being exposed from the encapsulation body.

摘要翻译： 提供具有引线框架的倒装芯片半导体封装及其制造方法。 引线框架具有多个引线，每个引线具有上表面，下表面和指向引线框架的中心的内端。 在每个引线的内端的上表面上形成凹部，使内端形成阶梯状。 凹部的深度等于用于将芯片电连接到引线的回流塌陷的焊料凸块的高度。 至少一个芯片通过多个焊接到凹部的焊料凸块以倒装芯片方式与引线电连接。 形成封装体以封装引线框架，芯片和焊料凸块，引线的下表面从封装体露出。

公开(公告)号：US06593662B1

公开(公告)日：2003-07-15

申请号：US09631343

申请日：2000-08-02

申请人： Han-Ping Pu ,  Randy H. Y. Lo ,  Tzong-Dar Her ,  Chien-Ping Huang ,  Cheng-Shiu Hsiao ,  Chi-Chuan Wu

发明人： Han-Ping Pu ,  Randy H. Y. Lo ,  Tzong-Dar Her ,  Chien-Ping Huang ,  Cheng-Shiu Hsiao ,  Chi-Chuan Wu

IPC分类号： H01L2348

CPC分类号： H01L24/33 ,  H01L23/4334 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A stacked-die package structure comprises a carrier, dies, spacers, adhesive layers, conductive lines, a mold compound, and solder balls. The carrier has an upper surface and a back surface opposite to the upper surface. The dies substantially having the same sizes are stacked one by one on the upper surface of the carrier, and a number of bonding pads are located around each die. The spacers are located between two adjacent dies. Adhesive layers located between the spacers, the dies, and the carrier for adhering layers therebetween. The conducting lines are respectively electrically connected between each of the bonding pads of the dies and the carrier. And the mold compound is formed over the upper surface of the carrier, for encapsulating the spacers, the dies and the adhesive layers. A substrate with solder balls or a lead frame having pins is suitable for serving as the carrier.

摘要翻译： 堆叠管芯封装结构包括载体，管芯，间隔物，粘合剂层，导电线，模具化合物和焊球。 载体具有与上表面相对的上表面和后表面。 基本上具有相同尺寸的模具在载体的上表面上一个接一个堆叠，并且多个焊盘位于每个管芯周围。 间隔件位于两个相邻的模具之间。 位于间隔件，模具和载体之间的粘合层，用于在其间粘合层。 导体线分别电连接在管芯和载体的每个接合焊盘之间。 并且模制化合物形成在载体的上表面上，用于封装间隔物，模具和粘合剂层。 具有焊球或具有引脚的引线框架的基板适合用作载体。

公开(公告)号：US06590281B2

公开(公告)日：2003-07-08

申请号：US10060564

申请日：2002-01-30

申请人： Chi-Chuan Wu ,  Chien-Ping Huang

发明人： Chi-Chuan Wu ,  Chien-Ping Huang

IPC分类号： H01L2334

CPC分类号： H01L24/33 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49575 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/06135 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/484 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A QFN semiconductor package and a fabrication method thereof are proposed, wherein a lead frame having a plurality of leads is adopted, and each lead is formed at its inner end with a protruding portion. A wire bonding region and a bump attach region are respectively defined on opposite surfaces of the protruding portion, and staggered in position. This allows a force applied from a wire bonder to the wire bonding regions not to adversely affect solder bumps implanted on the bump attach regions, so that the solder bumps can be structurally assured without cracking. Moreover, the wire bonding regions spaced apart from the bump attach regions can be prevented from being contaminated by an etching solution used in solder bump implantation, so that wire bonding quality can be well maintained.

摘要翻译： 提出了一种QFN半导体封装及其制造方法，其中采用具有多个引线的引线框架，并且每个引线的内端形成有突出部分。 引线接合区域和突起附着区域分别限定在突出部分的相对表面上并且交错位置。 这允许从引线接合器施加到引线接合区域的力不会不利地影响注入在凸块附接区域上的焊料凸起，使得焊料凸块可以在结构上确保而不会破裂。 此外，可以防止与凸块附接区域间隔开的引线接合区域被焊料凸块注入中使用的蚀刻溶液污染，从而可以良好地保持引线接合质量。

公开(公告)号：US06507120B2

公开(公告)日：2003-01-14

申请号：US09746819

申请日：2000-12-22

申请人： Randy H. Y. Lo ,  Chi-Chuan Wu

发明人： Randy H. Y. Lo ,  Chi-Chuan Wu

IPC分类号： H01L2348

CPC分类号： H01L23/4334 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A flip chip type quad flat non-leaded package, comprising: a plurality of leads each having a first surface and a second surface opposite to the first surface; a die having an active surface and a backside opposite the active surface, wherein the active surface has a plurality of bonding pads, each having a bump, and wherein each bump is connected to a first surface of one of the leads respectively; and a molding compound encapsulating the leads and the die, exposing second surfaces of the leads.

公开(公告)号：US06495910B1

公开(公告)日：2002-12-17

申请号：US09648898

申请日：2000-08-25

申请人： Chi Chuan Wu

发明人： Chi Chuan Wu

IPC分类号： H01L2302

CPC分类号： H01L23/49811 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： The present invention is characterized by replacing solder balls with cylindrical terminals in an IC package where at least a chip is located on the same side of the substrate of the IC package as the solder balls are. Due to the larger length of the cylindrical terminals which are located on the same side of the substrate of the IC package as at least a chip is, at least a chip with relatively thick size can be accommodated in the IC package provided by the present invention, without need of increasing terminal pitch (such as the ball pitch in a conventional BGA package). The accommodation of relatively thick chip in the IC package provided by the present invention leads to elimination or significant reduction of cost of back grinding of the chip, and to significant improvement on the failure rate resulting from the thinness of the chip in a conventional IC package, while without need of augmenting the size of the substrate of the IC package as a result that the terminal pitch based on the present invention needs not be increased.

摘要翻译： 本发明的特征在于在集成电路封装中更换具有圆柱形端子的焊球，其中至少芯片位于IC封装的基板的与焊球相同的一侧。 由于至少芯片位于IC封装的基板的同一侧的圆柱形端子的长度较大，至少具有相对较大尺寸的芯片可以容纳在由本发明提供的IC封装中 ，而不需要增加端子间距（例如传统BGA封装中的球间距）。 本发明提供的IC封装中相对较厚芯片的调节导致芯片背面磨削成本的消除或显着降低，并且显着提高了传统IC封装中芯片薄度导致的故障率 ，而不需要增加IC封装的基板的尺寸，结果不需要增加基于本发明的端子间距。

公开(公告)号：US06472743B2

公开(公告)日：2002-10-29

申请号：US09973151

申请日：2001-10-09

申请人： Chien-Ping Huang ,  Chi-Chuan Wu ,  Jui-Yu Chuang ,  Lien-Chih Chan ,  Ming-Chih Hsieh

发明人： Chien-Ping Huang ,  Chi-Chuan Wu ,  Jui-Yu Chuang ,  Lien-Chih Chan ,  Ming-Chih Hsieh

IPC分类号： H01L2334

CPC分类号： H01L23/4334 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor package with a heat dissipating structure is proposed, in which the heat dissipating structure is precisely positioned on a substrate, in a manner that a plurality of solder balls self-align with ball pads formed on the substrate, and support a heat sink to be positioned above a semiconductor chip mounted on the substrate. This therefore makes the heat sink closely abut a molding cavity of an encapsulating mold in a molding process, and prevents resin flash from occurring on the heat sink, so that a surface of the heat sink can be directly exposed to the atmosphere for improving heat dissipating efficiency. Moreover, the solder balls characterized in softness deform in response to a pressure generated by the encapsulating mold during molding. Therefore, the substrate can be protected from being damaged by the pressure, and thus quality of the semiconductor package can be assured.

摘要翻译： 提出了一种具有散热结构的半导体封装，其中散热结构精确地定位在基板上，使得多个焊球与衬底上形成的球垫自对准，并且支撑散热器 位于安装在基板上的半导体芯片的上方。 因此，在成型工序中，散热片紧密地邻接封装模具的模腔，并且防止散热片上发生树脂闪光，使得散热片的表面可以直接暴露于大气中以改善散热 效率。 此外，柔软的焊料球响应于在模制期间由封装模具产生的压力而变形。 因此，可以防止基板受到压力的损害，从而可以确保半导体封装的质量。

公开(公告)号：US20060017173A1

公开(公告)日：2006-01-26

申请号：US10965093

申请日：2004-10-13

申请人： Chi-Chuan Wu ,  Ke-Chuan Yang

发明人： Chi-Chuan Wu ,  Ke-Chuan Yang

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L21/4828 ,  H01L23/3107 ,  H01L23/49548 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/15151 ,  H01L2924/00 ,  H01L2224/0401

摘要： A flip-chip semiconductor package with a lead frame and a method for fabricating the same are provided. The lead frame has a plurality of leads, each lead having an upper surface, a lower surface, and an inner end directed toward the center of the lead frame. A recessed portion is formed on the upper surface of the inner end of each lead, making the inner end shaped as a stepped structure. The depth of the recessed portion is equal to a height of a reflow-collapsed solder bump that is for electrically connecting a chip to the lead. At least one chip is electrically connected to the leads in a flip-chip manner via a plurality of solder bumps bonded to the recessed portions. An encapsulation body is formed to encapsulate the lead frame, chip and solder bumps, with the lower surfaces of the leads being exposed from the encapsulation body.

摘要翻译： 提供具有引线框架的倒装芯片半导体封装及其制造方法。 引线框架具有多个引线，每个引线具有上表面，下表面和指向引线框架的中心的内端。 在每个引线的内端的上表面上形成凹部，使内端形成阶梯状。 凹部的深度等于用于将芯片电连接到引线的回流塌陷的焊料凸块的高度。 至少一个芯片通过多个焊接到凹部的焊料凸块以倒装芯片方式与引线电连接。 形成封装体以封装引线框架，芯片和焊料凸块，引线的下表面从封装体露出。

公开(公告)号：US06951776B2

公开(公告)日：2005-10-04

申请号：US10389657

申请日：2003-03-13

申请人： Randy H. Y. Lo ,  Chi-Chuan Wu

发明人： Randy H. Y. Lo ,  Chi-Chuan Wu

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/433 ,  H01L21/76

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/565 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

摘要： A method is proposed for fabricating a TFBGA (Thin & Fine Ball-Grid Array) package with embedded heat spreader. Conventionally, since an individual TFBGA package is quite small in size, it would be highly difficult to incorporate an embedded heat spreader therein. As a solution to this problem, the proposed method utilizes a single substrate predefined with a plurality of package sites, and further utilizes a heat-spreader frame including an integrally-formed matrix of heat spreaders each corresponding to one of the package sites on the substrate. A batch of semiconductor chips are then mounted on the respective package sites on the substrate. During the encapsulation process, a single continuous encapsulation body is formed to encapsulate the entire heat-spreader frame and all the semiconductor chips. After ball implantation, a singulation process is performed to cut apart the encapsulation body into individual package units, each serving as the intended TFBGA package. In the foregoing process, since the entirety of the heat-spreader frame is relatively large in size as compared to the size of an individual TFBGA package, it can be easily handled, so that the embedding of a heat spreader in each package unit can be easily carried out.

摘要翻译： 提出了一种制造具有嵌入式散热器的TFBGA（Thin＆Fine Ball-Grid Array）薄膜封装的方法。 通常，由于单独的TFBGA封装的尺寸相当小，所以在其中并入嵌入式散热器是非常困难的。 作为解决这一问题的方案，所提出的方法利用预定义的多个封装位置的单个衬底，并且进一步利用散热器框架，该散热器框架包括整体形成的散热器矩阵，每个对应于衬底上的一个封装位置 。 然后将一批半导体芯片安装在基板上的相应封装位置上。 在封装过程中，形成一个单一的连续封装体以封装整个散热器框架和所有半导体芯片。 在球注入之后，进行单独处理以将封装体切割成单独的封装单元，每个封装单元用作预期的TFBGA封装。 在上述过程中，由于与单独的TFBGA封装的尺寸相比，散热器框架的整体尺寸相对较大，所以可以容易地处理散热器框架，使得散热器在每个封装单元中的嵌入可以是 容易进行