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    CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    11.
    发明申请
    CHIP PACKAGE AND METHOD FOR FORMING THE SAME 有权
    芯片包装及其形成方法

    公开(公告)号：US20130045549A1

    公开(公告)日：2013-02-21

    申请号：US13588898

    申请日：2012-08-17

    Applicant: Chuan-Jin SHIU ,  Po-Shen LIN ,  Shen-Yuan MAO ,  Cheng-Chi PENG

    Inventor： Chuan-Jin SHIU ,  Po-Shen LIN ,  Shen-Yuan MAO ,  Cheng-Chi PENG

    IPC: H01L33/60 ,  H01L31/0232

    CPC classification number: H01L27/14618 ,  H01L2224/13 ,  H01L2933/0025

    Abstract: An embodiment of the invention provides a method for forming a chip package which includes: providing a substrate having a first surface and a second surface, wherein at least one optoelectronic device is formed in the substrate; forming an insulating layer on the substrate; forming a conducting layer on the insulating layer on the substrate, wherein the conducting layer is electrically connected to the at least one optoelectronic device; and spraying a solution of light shielding material on the second surface of the substrate to form a light shielding layer on the second surface of the substrate.

    Abstract translation: 本发明的一个实施例提供了一种用于形成芯片封装的方法，其包括：提供具有第一表面和第二表面的衬底，其中在衬底中形成至少一个光电器件; 在所述基板上形成绝缘层; 在所述基板上的所述绝缘层上形成导电层，其中所述导电层电连接到所述至少一个光电器件; 以及在所述基板的第二表面上喷射遮光材料的溶液，以在所述基板的第二表面上形成遮光层。

    CHIP PACKAGE AND METHOD FOR FORMING THE SAME
    12.
    发明申请
    CHIP PACKAGE AND METHOD FOR FORMING THE SAME 有权
    芯片包装及其形成方法

    公开(公告)号：US20130001621A1

    公开(公告)日：2013-01-03

    申请号：US13536628

    申请日：2012-06-28

    Applicant: Chuan-Jin SHIU ,  Po-Shen LIN ,  Yi-Ming CHANG

    Inventor： Chuan-Jin SHIU ,  Po-Shen LIN ,  Yi-Ming CHANG

    IPC: H01L33/60

    CPC classification number: H01L27/14618 ,  H01L27/1463 ,  H01L2224/13 ,  H01L2924/1461 ,  H01L2924/00

    Abstract: An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device formed in the substrate; a conducting layer disposed on the substrate, wherein the conducting layer is electrically connected to the optoelectronic device; an insulating layer disposed between the substrate and the conducting layer; a light shielding layer disposed on the second surface of the substrate and directly contacting with the conducting layer, wherein the light shielding layer has a light shielding rate of more than about 80% and has at least an opening exposing the conducting layer; and a conducting bump disposed in the opening of the light shielding layer to electrically contact with the conducting layer, wherein all together the light shielding layer and the conducting bump substantially and completely cover the second surface of the substrate.

    Abstract translation: 本发明的实施例提供了一种芯片封装，其包括：具有第一表面和第二表面的基板; 形成在所述基板中的光电子器件; 设置在所述基板上的导电层，其中所述导电层电连接到所述光电子器件; 设置在所述基板和所述导电层之间的绝缘层; 遮光层，其设置在所述基板的所述第二表面上并与所述导电层直接接触，其中所述遮光层具有大于约80％的遮光率并且具有暴露所述导电层的至少一个开口; 以及布置在所述遮光层的开口中以与所述导电层电接触的导电凸块，其中所述遮光层和所述导电凸起部分都基本上完全覆盖所述基板的第二表面。

    CHIP PACKAGE
    13.
    发明申请
    CHIP PACKAGE 有权
    芯片包装

    公开(公告)号：US20120056226A1

    公开(公告)日：2012-03-08

    申请号：US13224267

    申请日：2011-09-01

    Applicant: Tzu-Hsiang HUNG ,  Hsin-Chih CHIU ,  Chuan-Jin SHIU ,  Chia-Sheng LIN ,  Yen-Shih HO ,  Yu-Min LIANG

    Inventor： Tzu-Hsiang HUNG ,  Hsin-Chih CHIU ,  Chuan-Jin SHIU ,  Chia-Sheng LIN ,  Yen-Shih HO ,  Yu-Min LIANG

    IPC: H01L33/58 ,  H01L31/0232

    CPC classification number: H01L27/14618 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2933/0066 ,  H01L2924/014 ,  H01L2924/00

    Abstract: An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device disposed at the first surface; a protection layer disposed on the second surface of the substrate, wherein the protection layer has an opening; a conducting bump disposed on the second surface of the substrate and filled in the opening; a conducting layer disposed between the protection layer and the substrate, wherein the conducting layer electrically connects the optoelectronic device to the conducting bump; and a light shielding layer disposed on the protection layer, wherein the light shielding layer does not contact with the conducting bump.

    Abstract translation: 本发明的实施例提供了一种芯片封装，其包括：具有第一表面和第二表面的基板; 设置在第一表面处的光电子器件; 保护层，设置在所述基板的第二表面上，其中所述保护层具有开口; 设置在所述基板的第二表面上并填充在所述开口中的导电凸块; 设置在所述保护层和所述基板之间的导电层，其中所述导电层将所述光电子器件电连接到所述导电凸块; 以及设置在保护层上的遮光层，其中遮光层不与导电凸块接触。

    Chip package
    14.
    发明授权
    Chip package 有权
    芯片封装

    公开(公告)号：US08384174B2

    公开(公告)日：2013-02-26

    申请号：US13070375

    申请日：2011-03-23

    Applicant: Hsin-Chih Chiu ,  Chia-Ming Cheng ,  Chuan-Jin Shiu ,  Bai-Yao Lou

    Inventor： Hsin-Chih Chiu ,  Chia-Ming Cheng ,  Chuan-Jin Shiu ,  Bai-Yao Lou

    IPC: H01L31/0203

    CPC classification number: H01L31/02164 ,  H01L27/14618 ,  H01L33/486 ,  H01L33/54 ,  H01L33/62 ,  H01L2224/13

    Abstract: A chip package includes: a substrate having a first and a second surfaces; an optical device on the first surface; a conducting layer on the second surface; a passivation layer on the second surface and the conducting layer, wherein the passivation layer has an opening exposing the conducting layer; a conducting bump on the second surface and having a bottom and an upper portions, wherein the bottom portion is disposed in the opening and electrically contacts the conducting layer, and the upper portion is located outside of the opening and extends along a direction away from the opening; a recess extending from a surface of the conducting bump toward an inner portion of the conducting bump; and a light shielding layer on the second surface, extending under the upper portion, and partially located in the recess and overlapping a portion of the conducting bump.

    Abstract translation: 芯片封装包括：具有第一和第二表面的衬底; 第一表面上的光学装置; 第二表面上的导电层; 所述第二表面上的钝化层和所述导电层，其中所述钝化层具有暴露所述导电层的开口; 在第二表面上具有导电凸起并具有底部和上部，其中底部设置在开口中并与导电层电接触，并且上部位于开口的外侧，并沿远离 开口 从所述导电凸块的表面延伸到所述导电凸块的内部的凹部; 以及在所述第二表面上的遮光层，在所述上部下方延伸，并且部分地位于所述凹部中并与所述导电凸块的一部分重叠。

    CHIP PACKAGE
    17.
    发明申请
    CHIP PACKAGE 有权
    芯片包装

    公开(公告)号：US20110233770A1

    公开(公告)日：2011-09-29

    申请号：US13070375

    申请日：2011-03-23

    Applicant: Hsin-Chih CHIU ,  Chia-Ming Cheng ,  Chuan-Jin Shiu ,  Bai-Yao Lou

    Inventor： Hsin-Chih CHIU ,  Chia-Ming Cheng ,  Chuan-Jin Shiu ,  Bai-Yao Lou

    IPC: H01L23/498

    CPC classification number: H01L31/02164 ,  H01L27/14618 ,  H01L33/486 ,  H01L33/54 ,  H01L33/62 ,  H01L2224/13

    Abstract: A chip package includes: a substrate having a first and a second surfaces; an optical device on the first surface; a conducting layer on the second surface; a passivation layer on the second surface and the conducting layer, wherein the passivation layer has an opening exposing the conducting layer; a conducting bump on the second surface and having a bottom and an upper portions, wherein the bottom portion is disposed in the opening and electrically contacts the conducting layer, and the upper portion is located outside of the opening and extends along a direction away from the opening; a recess extending from a surface of the conducting bump toward an inner portion of the conducting bump; and a light shielding layer on the second surface, extending under the upper portion, and partially located in the recess and overlapping a portion of the conducting bump.

    Abstract translation: 芯片封装包括：具有第一和第二表面的衬底; 第一表面上的光学装置; 第二表面上的导电层; 所述第二表面上的钝化层和所述导电层，其中所述钝化层具有暴露所述导电层的开口; 在第二表面上具有导电凸起并具有底部和上部，其中底部设置在开口中并与导电层电接触，并且上部位于开口的外侧，并沿远离 开口 从所述导电凸块的表面延伸到所述导电凸块的内部的凹部; 以及在所述第二表面上的遮光层，在所述上部下方延伸，并且部分地位于所述凹部中并与所述导电凸块的一部分重叠。

    Chip package
    18.
    发明授权
    Chip package 有权
    芯片封装

    公开(公告)号：US08779452B2

    公开(公告)日：2014-07-15

    申请号：US13224267

    申请日：2011-09-01

    Applicant: Tzu-Hsiang Hung ,  Hsin-Chih Chiu ,  Chuan-Jin Shiu ,  Chia-Sheng Lin ,  Yen-Shih Ho ,  Yu-Min Liang

    Inventor： Tzu-Hsiang Hung ,  Hsin-Chih Chiu ,  Chuan-Jin Shiu ,  Chia-Sheng Lin ,  Yen-Shih Ho ,  Yu-Min Liang

    IPC: H01L29/22

    CPC classification number: H01L27/14618 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2933/0066 ,  H01L2924/014 ,  H01L2924/00

    Abstract: An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device disposed at the first surface; a protection layer disposed on the second surface of the substrate, wherein the protection layer has an opening; a conducting bump disposed on the second surface of the substrate and filled in the opening; a conducting layer disposed between the protection layer and the substrate, wherein the conducting layer electrically connects the optoelectronic device to the conducting bump; and a light shielding layer disposed on the protection layer, wherein the light shielding layer does not contact with the conducting bump.

    Abstract translation: 本发明的实施例提供了一种芯片封装，其包括：具有第一表面和第二表面的基板; 设置在第一表面处的光电子器件; 保护层，设置在所述基板的第二表面上，其中所述保护层具有开口; 设置在所述基板的第二表面上并填充在所述开口中的导电凸块; 设置在所述保护层和所述基板之间的导电层，其中所述导电层将所述光电子器件电连接到所述导电凸块; 以及设置在保护层上的遮光层，其中遮光层不与导电凸块接触。

    Chip package and method for forming the same
    19.
    发明授权
    Chip package and method for forming the same 有权
    芯片封装及其形成方法

    公开(公告)号：US08431946B2

    公开(公告)日：2013-04-30

    申请号：US13114750

    申请日：2011-05-24

    Applicant: Hsin-Chih Chiu ,  Chia-Ming Cheng ,  Chuan-Jin Shiu ,  Bai-Yao Lou

    Inventor： Hsin-Chih Chiu ,  Chia-Ming Cheng ,  Chuan-Jin Shiu ,  Bai-Yao Lou

    IPC: H01L33/00

    CPC classification number: H01L27/14618 ,  H01L31/048 ,  H01L2224/13 ,  H01L2933/0066 ,  Y02E10/50

    Abstract: An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optical device disposed on the first surface; a conducting pad disposed on the first surface; a first alignment mark formed on the first surface; and a light shielding layer disposed on the second surface and having a second alignment mark, wherein the second alignment mark corresponds to the first alignment mark.

    Abstract translation: 本发明的实施例提供了一种芯片封装，其包括：具有第一表面和第二表面的基板; 设置在所述第一表面上的光学装置; 设置在所述第一表面上的导电垫; 形成在第一表面上的第一对准标记; 以及遮光层，其设置在所述第二表面上并且具有第二对准标记，其中所述第二对准标记对应于所述第一对准标记。

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