公开(公告)号：US20160181091A1

公开(公告)日：2016-06-23

申请号：US14576853

申请日：2014-12-19

Applicant: Intermolecular, Inc.

Inventor： Sandip Niyogi ,  Sergey Barabash ,  Federico Nardi ,  Dipankar Pramanik

IPC: H01L21/02

CPC classification number: H01L29/516

Abstract: Embodiments provided herein describe systems and methods for forming ferroelectric materials. A trench body may be provided. A trench may be formed in the trench body. A dielectric material and a filler material may be deposited within the trench. The filler material may be heated such that a stress is exerted on the dielectric material before the dielectric material is heated to generate a ferroelectric phase within the dielectric material. A non-contiguous layer may be formed above a substrate. A second layer including a high-k dielectric material may be formed above the first layer. The high-k dielectric material may be heated to generate a ferroelectric phase within the high-k dielectric material.

Abstract translation: 本文提供的实施例描述了用于形成铁电材料的系统和方法。 可以提供沟槽体。 可以在沟槽体中形成沟槽。 介电材料和填充材料可以沉积在沟槽内。 填充材料可以被加热，使得在介电材料被加热之前在电介质材料上施加应力以在电介质材料内产生铁电相。 可以在衬底之上形成不连续的层。 可以在第一层之上形成包括高k电介质材料的第二层。 可以加热高k介电材料以在高k电介质材料内产生铁电相。

公开(公告)号：US09362231B2

公开(公告)日：2016-06-07

申请号：US14885002

申请日：2015-10-16

Applicant: Intermolecular Inc.

Inventor： Tony P. Chiang ,  Majid Keshavarz ,  David E Lazovsky

IPC: H01L21/768 ,  H01L23/532 ,  B82Y30/00 ,  H01L21/31 ,  H01L29/06 ,  H01L49/02

CPC classification number: H01L23/5329 ,  B82Y30/00 ,  H01L21/31 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76873 ,  H01L21/76879 ,  H01L28/65 ,  H01L29/06 ,  H01L2924/0002 ,  Y10T428/249953 ,  H01L2924/00

Abstract: Methods for sealing a porous dielectric are presented including: receiving a substrate, the substrate including the porous dielectric; exposing the substrate to an organosilane, where the organosilane includes a hydrolysable group for facilitating attachment with the porous dielectric, and where the organosilane does not include an alkyl group; and forming a layer as a result of the exposing to seal the porous dielectric. In some embodiments, methods are presented where the organosilane includes: alkynyl groups, aryl groups, fluoroalkyl groups, heteroaryl groups, alcohol groups, thiol groups, amine groups, thiocarbamate groups, ester groups, ether groups, sulfide groups, and nitrile groups. In some embodiments, method further include: removing contamination from the porous dielectric and a conductive region of the substrate prior to the exposing; and removing contamination from the conductive region after the forming.

公开(公告)号：US20160133837A1

公开(公告)日：2016-05-12

申请号：US14539054

申请日：2014-11-12

Applicant: Intermolecular Inc.

Inventor： Chien-Lan Hsueh ,  Randall J. Higuchi

IPC: H01L45/00

CPC classification number: H01L45/1616 ,  C23C16/34 ,  C23C16/345 ,  C23C16/45531 ,  C23C16/45553 ,  H01L45/04 ,  H01L45/145

Abstract: Metal silicon nitride nanolaminates are formed at temperatures of 200-400 C by alternating ALD monolayers or thin CVD layers of metal nitride and silicon nitride. The silicon nitride layers are formed from a silicon halide precursor, causing nitrogen bonds to replace the halogen bonds, which is a lower-energy reaction than bonding nitrogen to elemental silicon. The silicon content, and thereby the resistivity, of the nanolaminate can be tuned by either a sub-saturation dose of the silicon halide precursor (forming ALD sub-monolayers) or by the relative number of metal nitride and silicon nitride layers. Resistivities between 1 and 500 Ω·cm, suitable for ReRAM embedded resistors, can be achieved. Some of the nanolaminates can function as combination embedded resistors and electrodes.

Abstract translation: 通过交替的ALD单层或金属氮化物和氮化硅的薄CVD层在200-400℃的温度下形成金属氮化硅纳米级氨酸盐。 氮化硅层由卤化硅前体形成，导致氮键取代卤键，这是将氮键接到元素硅上的低能反应。 可以通过次级饱和剂量的卤化硅前体（形成ALD亚单层）或相对数量的金属氮化物和氮化硅层来调节纳米材料的硅含量以及由此的电导率。 可实现适用于ReRAM嵌入式电阻器的1〜500Ω电阻率和OHgr·cm。 一些纳米材料可以作为组合嵌入式电阻器和电极。

公开(公告)号：US20160122235A1

公开(公告)日：2016-05-05

申请号：US14531643

申请日：2014-11-03

Applicant: Intermolecular Inc.

Inventor： Guizhen Zhang ,  Guowen Ding ,  Tong Ju ,  Minh Huu Le ,  Daniel Schweigert

IPC: C03C17/36

CPC classification number: C03C17/366 ,  C03C17/36 ,  C03C17/3602 ,  C03C17/3618 ,  C03C17/3626 ,  C03C17/3639 ,  C03C17/3642 ,  C03C17/3644 ,  C03C17/3681 ,  C03C2218/155

Abstract: Embodiments provided herein describe low-e panels and methods for forming low-e panels. A transparent substrate is provided. A first dielectric layer is formed above the transparent substrate. The first dielectric layer includes zinc, tin, and aluminum. A first reflective layer is formed above the first dielectric layer. A second dielectric layer is formed above the first reflective layer. The second dielectric layer includes zinc, tin, and aluminum. A second reflective layer is formed above the second dielectric layer.

Abstract translation: 本文提供的实施例描述了用于形成低e板的低e板和方法。 提供透明基板。 在透明基板的上方形成第一电介质层。 第一介电层包括锌，锡和铝。 第一反射层形成在第一介电层的上方。 在第一反射层上方形成第二电介质层。 第二电介质层包括锌，锡和铝。 第二反射层形成在第二介电层的上方。

公开(公告)号：US20160118309A1

公开(公告)日：2016-04-28

申请号：US14525944

申请日：2014-10-28

Applicant: Intermolecular, Inc.

Inventor： Rajesh Kelekar ,  Satbir Kahlon ,  Robert Sculac

IPC: H01L21/66 ,  H01L21/288 ,  H01L21/67 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L22/26 ,  H01L21/02057 ,  H01L21/02282 ,  H01L21/02623 ,  H01L21/288 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/32134 ,  H01L21/67023 ,  H01L21/6704 ,  H01L21/67075 ,  H01L21/6708 ,  H01L21/6719 ,  H01L22/20

Abstract: Embodiments provided herein describe systems and methods for processing substrates. A substrate having a first region and a second region is provided. A container is positioned proximate to the first region of the substrate. The container has an opening on an end thereof adjacent to the substrate. A processing liquid is dispensed into the container such that the processing liquid contacts the first region of the substrate through the opening. The gaseous pressure in a portion of the container devoid of the processing liquid is reduced. The reduction of the gaseous pressure prevents the processing liquid from flowing from the first region of the substrate to the second region of the substrate.

Abstract translation: 本文提供的实施例描述了用于处理衬底的系统和方法。 提供具有第一区域和第二区域的衬底。 容器位于基底的第一区域附近。 容器在与基板相邻的端部上具有开口。 处理液体被分配到容器中，使得处理液体通过开口接触基板的第一区域。 没有处理液体的容器的一部分中的气体压力降低。 气体压力的降低防止处理液体从衬底的第一区域流到衬底的第二区域。

公开(公告)号：US09321676B2

公开(公告)日：2016-04-26

申请号：US14702284

申请日：2015-05-01

Applicant: Intermolecular Inc. ,  Guardian Industries Corp.

Inventor： Mohd Fadzli Anwar Hassan ,  Brent Boyce ,  Guowen Ding ,  Muhammad Imran ,  Minh Huu Le ,  Zhi-Wen Wen Sun ,  Yu Wang ,  Yongli Xu

IPC: B32B15/04 ,  B32B17/06 ,  C03C17/23

CPC classification number: C03C17/23 ,  C03C17/06 ,  C03C17/34 ,  C03C17/36 ,  C03C17/3626 ,  C03C17/3644 ,  C03C17/366 ,  C03C2217/211 ,  C03C2217/24 ,  C30B23/00 ,  C30B25/00 ,  G02B5/208 ,  G02B5/285 ,  Y10T428/24868 ,  Y10T428/24975 ,  Y10T428/265

Abstract: A bi-layer seed layer can exhibit good seed property for an infrared reflective layer, together with improved thermal stability. The bi-layer seed layer can include a thin zinc oxide layer having a desired crystallographic orientation for a silver infrared reflective layer disposed on a bottom layer having a desired thermal stability. The thermal stable layer can include aluminum, magnesium, or bismuth doped tin oxide (AlSnO, MgSnO, or BiSnO), which can have better thermal stability than zinc oxide but poorer lattice matching for serving as a seed layer template for silver (111).

公开(公告)号：US20160111471A1

公开(公告)日：2016-04-21

申请号：US14516273

申请日：2014-10-16

Applicant: Intermolecular, Inc.

Inventor： Monica Mathur ,  Mark Clark

IPC: H01L27/24 ,  H01L29/45 ,  H01L29/24 ,  H01L29/267

CPC classification number: H01L27/2409 ,  G11C13/003 ,  G11C2213/76 ,  H01L27/224 ,  H01L27/2463 ,  H01L45/16

Abstract: Selector elements that can be suitable for nonvolatile memory device applications are disclosed. The selector element can have low leakage currents at low voltages to reduce sneak current paths for non selected devices, and higher leakage currents at higher voltages to minimize voltage drops during device switching. The selector element can be based on multilayer film stacks (e.g. metal-semiconductor-metal (MSM) stacks). The semiconductor layer of the selector element can include a silicon carbide/silicon nitride nanolaminate stack. The semiconductor layer of the selector element can include a silicon carbon nitride/silicon nitride nanolaminate stack. Conductive materials of the MSM may include tungsten, titanium nitride, carbon, or a combination thereof.

Abstract translation: 公开了适用于非易失性存储器件应用的选择元件。 选择器元件在低电压下可以具有低泄漏电流，以减少非选定器件的潜行电流路径，以及在较高电压下更高的漏电流，以最大限度地减少器件切换期间的电压降。 选择器元件可以基于多层膜堆叠（例如金属 - 半导体 - 金属（MSM）堆叠）。 选择器元件的半导体层可以包括碳化硅/氮化硅纳米层压体叠层。 选择元件的半导体层可以包括硅氮化硅/氮化硅纳米层叠体。 MSM的导电材料可以包括钨，氮化钛，碳或它们的组合。

公开(公告)号：US20160111302A1

公开(公告)日：2016-04-21

申请号：US14519363

申请日：2014-10-21

Applicant: Intermolecular, Inc.

Inventor： Satbir Kahlon ,  Bernardo Donoso ,  Jeffrey Chih-Hou Lowe ,  Robert Sculac

IPC: H01L21/67 ,  B08B3/02 ,  B08B3/04 ,  B05B15/04 ,  B05B3/02

CPC classification number: B08B3/02 ,  B08B3/04 ,  B08B2203/0264 ,  H01L21/67051

Abstract: Embodiments provided herein provide systems and methods for wet processing substrates with a rotating splash shield. The systems include a fluid dispenser configured to dispense a processing fluid. A substrate support configured to support and rotate a substrate is also included. The substrate support is disposed such that the processing fluid dispensed by the fluid dispenser flows onto the substrate. A splash shield is positioned on at least one side of the substrate support and is configured to rotate. The splash shield has an upper portion extending above an upper surface of the substrate and a lower portion extending below a lower surface of the substrate.

Abstract translation: 本文提供的实施例提供了用于湿处理具有旋转防溅罩的基板的系统和方法。 该系统包括配置成分配处理流体的流体分配器。 还包括构造成支撑和旋转衬底的衬底支撑件。 衬底支撑件设置成使得由流体分配器分配的处理流体流到衬底上。 防溅罩位于基板支撑件的至少一侧上并且被构造成旋转。 防溅罩具有在基板的上表面上方延伸的上部和在基板的下表面下方延伸的下部。

公开(公告)号：US09318546B1

公开(公告)日：2016-04-19

申请号：US14507418

申请日：2014-10-06

Applicant: Intermolecular, Inc.

Inventor： Prashant B. Phatak

IPC: H01L21/20 ,  H01L21/28 ,  H01L49/02 ,  H01L27/108 ,  H01L21/02 ,  H01L21/285

CPC classification number: H01L28/75 ,  H01L21/02197 ,  H01L21/2855 ,  H01L27/108 ,  H01L27/10805 ,  H01L28/65

Abstract: In some embodiments, a metal oxide second electrode material is formed as part of a MIM DRAM capacitor stack. The second electrode material is doped with one or more dopants. The dopants may influence the crystallinity, resistivity, and/or work function of the second electrode material. The dopants may be uniformly distributed throughout the second electrode material or may be distributed with a gradient in their concentration profile.

Abstract translation: 在一些实施例中，金属氧化物第二电极材料形成为MIM DRAM电容器堆叠的一部分。 第二电极材料掺杂有一种或多种掺杂剂。 掺杂剂可影响第二电极材料的结晶度，电阻率和/或功函数。 掺杂剂可以均匀分布在整个第二电极材料中，或者可以以它们的浓度分布梯度分布。

公开(公告)号：US20160099482A1

公开(公告)日：2016-04-07

申请号：US14508217

申请日：2014-10-07

Applicant: Intermolecular, Inc.

Inventor： Abraham Anapolsky ,  Jeroen Van Duren

IPC: H01M10/058 ,  H01M10/0562 ,  H01M10/04 ,  H01M10/052

CPC classification number: H01M10/058 ,  C23C14/082 ,  C23C14/34 ,  C23C14/5806 ,  H01M4/0426 ,  H01M4/0471 ,  H01M4/1391 ,  H01M4/366 ,  H01M10/052 ,  H01M10/0562 ,  H01M2004/021

Abstract: Embodiments provided herein describe solid-state lithium batteries and methods for forming such batteries. A first current collector is provided. A first electrode is formed above the first current collector. The first electrode includes lithium and cobalt and is formed using PVD in a gaseous environment including at least 96% argon. An electrolyte is formed above the first electrode. A second electrode is formed above the electrolyte. A second current collector is formed above the second electrode.

Abstract translation: 本文提供的实施例描述了固态锂电池及其形成方法。 提供第一集电器。 第一电极形成在第一集电器的上方。 第一电极包括锂和钴，并且在包括至少96％氩气的气态环境中使用PVD形成。 在第一电极上方形成电解质。 在电解质上方形成第二电极。 在第二电极上方形成第二集电体。