公开(公告)号：US08203204B2

公开(公告)日：2012-06-19

申请号：US13170586

申请日：2011-06-28

Applicant: Jong Hoon Kim

Inventor： Jong Hoon Kim

IPC: H01L23/02

CPC classification number: H01L25/0657 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A stacked semiconductor package provides an enhanced data storage capacity along with an improved data processing speed. The stacked semiconductor package includes a substrate having chip selection pads and a connection pad; a semiconductor chip module including a plurality of semiconductor chips including data bonding pads, a chip selection bonding pad, and data redistributions electrically connected with the data bonding pads and a data through electrode passing through the data bonding pad and connected with the data redistribution, the semiconductor chips being stacked so as to expose the chip selection bonding pad; and a conductive wire for connecting electrically the chip selection pad and the chip selection bonding pads.

Abstract translation: 堆叠的半导体封装提供增强的数据存储容量以及改进的数据处理速度。 堆叠的半导体封装包括具有芯片选择焊盘和连接焊盘的衬底; 包括多个半导体芯片的半导体芯片模块，包括数据接合焊盘，芯片选择焊盘和与数据焊盘电连接的数据再分配，以及通过数据焊盘并与数据重新分配连接的数据通孔， 堆叠半导体芯片以使芯片选择焊盘露出; 以及用于将芯片选择焊盘和芯片选择焊盘电连接的导线。

公开(公告)号：US20120147515A1

公开(公告)日：2012-06-14

申请号：US13191849

申请日：2011-07-27

Applicant: Hyung Joon Kim ,  Jong Hoon Kim ,  Kang Heon Hur ,  Dae Bok Oh

Inventor： Hyung Joon Kim ,  Jong Hoon Kim ,  Kang Heon Hur ,  Dae Bok Oh

IPC: H01G4/30 ,  H01G7/00

CPC classification number: H01G4/30 ,  H01G4/0085 ,  H01G4/012 ,  H01G4/12 ,  H01G4/248 ,  Y10T29/43 ,  Y10T29/435

Abstract: Disclosed are a multilayer ceramic condenser and a method of manufacturing the same. The method includes printing a plurality of stripe-type inner electrode patterns in parallel on ceramic green sheets; forming a laminate by staking the ceramic green sheets having the plurality of stripe-type inner electrode patterns printed thereon; cutting the laminate in order to have a structure in which first and second inner electrode patterns are alternately stacked; and forming a first side part and a second side part by applying ceramic slurry in order to cover the sides of the laminate to which the first and second inner electrode patterns are exposed.

Abstract translation: 公开了一种多层陶瓷电容器及其制造方法。 该方法包括在陶瓷生片上平行印刷多条条状内部电极图案; 通过在其上印刷多个条形内部电极图案的陶瓷生片进行铆接来形成层压体; 切割层压体以具有第一和第二内部电极图案交替堆叠的结构; 以及通过施加陶瓷浆料形成第一侧面部分和第二侧面部分，以覆盖第一和第二内部电极图案所暴露的层压体的侧面。

公开(公告)号：US08107271B2

公开(公告)日：2012-01-31

申请号：US11649805

申请日：2007-01-05

Applicant: Kwang-Soo Park ,  Jae-Jun Lee ,  Jong-Hoon Kim ,  Hoe-Ju Chung

Inventor： Kwang-Soo Park ,  Jae-Jun Lee ,  Jong-Hoon Kim ,  Hoe-Ju Chung

IPC: G11C5/06

CPC classification number: H03H7/38

Abstract: A termination circuit is connected to an input buffer receiving a data signal, and includes at least one termination resistor connected to the input buffer for impedance matching. At least one switch controls a connection between the input buffer and a corresponding one of the at least one termination resistors. A control signal generator generates a control signal for selectively enabling the termination circuit by controlling each of the at least one switches. The control signal has an input period less than or equal to an input period of a data signal.

Abstract translation: 终端电路连接到接收数据信号的输入缓冲器，并且包括连接到输入缓冲器以用于阻抗匹配的至少一个终端电阻器。 至少一个开关控制输入缓冲器与至少一个终端电阻器中相应的一个之间的连接。 控制信号发生器产生控制信号，用于通过控制至少一个开关中的每个开关来选择性地启用终端电路。 控制信号的输入周期小于或等于数据信号的输入周期。

公开(公告)号：US20110309358A1

公开(公告)日：2011-12-22

申请号：US12979317

申请日：2010-12-27

Applicant: Jong Hoon KIM ,  Min Suk SUH ,  Kwon Whan HAN ,  Seung Taek YANG

Inventor： Jong Hoon KIM ,  Min Suk SUH ,  Kwon Whan HAN ,  Seung Taek YANG

IPC: H01L23/58

CPC classification number: H01L25/0657 ,  H01L22/32 ,  H01L23/481 ,  H01L2224/16145 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2225/06596

Abstract: A semiconductor chip includes a semiconductor substrate having a top surface and a bottom surface. A circuit layer having bonding pads may be formed over the top surface of the semiconductor substrate. Through electrodes may be formed to pass from a bottom surface to a top surface of the semiconductor substrate, and the through electrodes may comprise through parts connected with the bonding pads and projecting parts formed over the bottom surface of the semiconductor substrate and electrically connected with the through parts. Test pad parts may be disposed over the bottom surface of the semiconductor substrate and is connected with the through electrodes to test normal operation of the circuit layer and electrical connections of the through electrodes and the circuit layer.

Abstract translation: 半导体芯片包括具有顶表面和底表面的半导体衬底。 具有接合焊盘的电路层可以形成在半导体衬底的顶表面上。 通过电极可以形成为从半导体衬底的底表面到顶表面，并且贯通电极可以包括与焊盘连接的贯通部件和形成在半导体衬底的底表面上的突出部分，并与 通过零件。 测试焊盘部件可以设置在半导体衬底的底表面上，并且与通孔连接以测试电路层的正常操作和贯通电极和电路层的电连接。

公开(公告)号：US20110254145A1

公开(公告)日：2011-10-20

申请号：US13170586

申请日：2011-06-28

Applicant: Jong Hoon KIM

Inventor： Jong Hoon KIM

IPC: H01L25/065

CPC classification number: H01L25/0657 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05553 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A stacked semiconductor package provides an enhanced data storage capacity along with an improved data processing speed. The stacked semiconductor package includes a substrate having chip selection pads and a connection pad; a semiconductor chip module including a plurality of semiconductor chips including data bonding pads, a chip selection bonding pad, and data redistributions electrically connected with the data bonding pads and a data through electrode passing through the data bonding pad and connected with the data redistribution, the semiconductor chips being stacked so as to expose the chip selection bonding pad; and a conductive wire for connecting electrically the chip selection pad and the chip selection bonding pads.

Abstract translation: 堆叠的半导体封装提供增强的数据存储容量以及改进的数据处理速度。 堆叠的半导体封装包括具有芯片选择焊盘和连接焊盘的衬底; 包括多个半导体芯片的半导体芯片模块，包括数据接合焊盘，芯片选择焊盘和与数据焊盘电连接的数据再分配，以及通过数据焊盘并与数据重新分配连接的数据通孔， 堆叠半导体芯片以使芯片选择焊盘露出; 以及用于将芯片选择焊盘和芯片选择焊盘电连接的导线。

公开(公告)号：US07968654B2

公开(公告)日：2011-06-28

申请号：US11794370

申请日：2005-12-28

Applicant: Jong-Hoon Kim ,  Sang-Jin Lee

Inventor： Jong-Hoon Kim ,  Sang-Jin Lee

IPC: C08F8/32 ,  C08F8/30

CPC classification number: C08F8/26 ,  C08F8/30 ,  C08F10/06

Abstract: The present invention relates to a blend of polyolefin comprising a modified chlorinated polypropylene. This invention provides a blend of polyolefin comprising a novel amine modified chlorinated polypropylene capable of improving printability by promoting adhesion with ink when the ink is printed or coated on plastic products including film and sheet. The present invention provides a novel blend of polyolefin comprising a modified chlorinated polypropylene, which is prepared by substituting 1-99.9 mole % of chlorine of a chlorinated polypropylene, whose chlorine content is 1-75 wt % and whose number average molecular weight is 100-400,000, with ammonia or an amine compound and is capable of improving dyeability and adhesion performance. This invention also provides the modified chlorinated polypropylene and a method for preparing the same.

Abstract translation: 本发明涉及包含改性氯化聚丙烯的聚烯烃共混物。 本发明提供了一种聚烯烃的共混物，其包含新型胺改性氯化聚丙烯，当油墨印刷或涂覆在包括膜和片材的塑料产品上时，可通过促进与油墨的粘附来改善印刷性。 本发明提供了一种包含改性氯化聚丙烯的聚烯烃的新型共混物，其通过将氯化聚丙烯1-99.9摩尔％氯含量为1-75重量％，数均分子量为100〜 400,000，具有氨或胺化合物，并且能够改善染色性和粘合性能。 本发明还提供了改性氯化聚丙烯及其制备方法。

公开(公告)号：US07965530B2

公开(公告)日：2011-06-21

申请号：US12330351

申请日：2008-12-08

Applicant: You-Keun Han ,  Seung-Jin Seo ,  Kwan-Yong Jin ,  Jung-Hwan Choi ,  Jong-Hoon Kim ,  Seok-Il Kim ,  Joo-Sun Choi

Inventor： You-Keun Han ,  Seung-Jin Seo ,  Kwan-Yong Jin ,  Jung-Hwan Choi ,  Jong-Hoon Kim ,  Seok-Il Kim ,  Joo-Sun Choi

IPC: G11C5/02

CPC classification number: G11C5/04 ,  G11C5/02 ,  G11C7/1027 ,  G11C7/1045 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/22 ,  G11C11/4076 ,  G11C11/4096 ,  G11C2207/107 ,  G11C2207/2272

Abstract: A memory module includes a plurality of data ports configured to receive/transmit associated data and a plurality of memory devices. The plurality of memory devices include a first set of the memory devices in at least one rank, each memory device of the first set being coupled to each of the associated data ports, and a second set of the memory devices in at least one other rank, each memory device of the second set being configured to receive/transmit the associated data for the memory device through at least each associated memory device of the first set.

Abstract translation: 存储器模块包括被配置为接收/发送关联数据的多个数据端口和多个存储器件。 所述多个存储器件包括至少一个等级的第一组存储器件，第一组的每个存储器件耦合到每个相关联的数据端口，以及在至少一个其它级中的第二组存储器件 ，所述第二组的每个存储器件被配置为通过所述第一组的至少每个相关联的存储器装置接收/发送所述存储器设备的相关联的数据。

公开(公告)号：US20110054162A1

公开(公告)日：2011-03-03

申请号：US12867413

申请日：2009-02-13

Applicant: Jae-Ha Kim ,  Jong-Gwang Park ,  Jong-Hoon Kim ,  Han-Oh Park

Inventor： Jae-Ha Kim ,  Jong-Gwang Park ,  Jong-Hoon Kim ,  Han-Oh Park

IPC: C07H21/00 ,  B05D5/12 ,  H01F1/42 ,  C07H21/02 ,  C07H21/04

CPC classification number: C01B33/12 ,  B22F1/0074 ,  B82Y25/00 ,  C01B33/20 ,  C01G49/02 ,  C01P2004/03 ,  C01P2004/32 ,  C01P2004/61 ,  C01P2004/80 ,  C01P2004/84 ,  C07H21/02 ,  C07H21/04 ,  H01F1/0045

Abstract: The present invention relates to silica magnetic particles having a spherical form and a process for preparing the same. The silica magnetic particles prepared according to the present invention, which are silica particles that includes the magnetic particles and additionally have the functional group on the surfaces, has an advantage that the particle size distribution is uniform. Further, the silica magnetic particles prepared according to the present invention can be used as a reagent for separating biomaterials and a reagent for detecting biomaterials.

Abstract translation: 本发明涉及具有球形的二氧化硅磁性颗粒及其制备方法。 根据本发明制备的二氧化硅磁性颗粒，其是包含磁性颗粒的二氧化硅颗粒，并且在表面上另外具有官能团，具有粒度分布均匀的优点。 此外，根据本发明制备的二氧化硅磁性颗粒可以用作分离生物材料的试剂和用于检测生物材料的试剂。

公开(公告)号：US20110042242A1

公开(公告)日：2011-02-24

申请号：US12825160

申请日：2010-06-28

Applicant: Chang-Hwan Ji ,  Jong-Hoon Kim ,  Hee-Sang Yang ,  Jae-Nam Lee ,  Jong-Chul Kim

Inventor： Chang-Hwan Ji ,  Jong-Hoon Kim ,  Hee-Sang Yang ,  Jae-Nam Lee ,  Jong-Chul Kim

IPC: B65D55/02

CPC classification number: H01L21/6734

Abstract: A locking apparatus for locking a magazine configured to receive a printed circuit board (PCB) may include an actuator, a rotating block, and a locking member. The actuator may be installed on the magazine. The rotating block may be connected to the actuator. The rotating block may be rotated about a vertical axis. The locking member may be rotatably connected to the magazine about the vertical axis. The locking member may be selectively combined with the rotating block to block a front face of the magazine, thereby preventing breakaway of the PCB from the magazine.

Abstract translation: 用于锁定构造成接收印刷电路板（PCB）的盒的锁定装置可以包括致动器，旋转块和锁定构件。 执行器可以安装在刀库上。 旋转块可以连接到致动器。 旋转块可绕垂直轴旋转。 锁定构件可以围绕垂直轴线可旋转地连接到盒。 可以将锁定构件选择性地与旋转块组合以阻挡盒的前面，从而防止PCB从盒中脱离。

公开(公告)号：US20100258936A1

公开(公告)日：2010-10-14

申请号：US12491651

申请日：2009-06-25

Applicant: Jong Hoon KIM ,  Ho Young SON

Inventor： Jong Hoon KIM ,  Ho Young SON

IPC: H01L23/498

CPC classification number: H01L24/92 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/481 ,  H01L24/03 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05555 ,  H01L2224/0557 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06136 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/83194 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929

Abstract: A stacked semiconductor package is presented which includes multiple semiconductor chips and through-electrodes. Each semiconductor chip has bonding pads formed on a first surface of the semiconductor chip and has a projection which projects from a portion of a second surface of the semiconductor chip. The first and second surfaces of the semiconductor chip face away from each other the first surface. The through-electrodes pass through the first surface and through the projection on the second surface.

Abstract translation: 提出了一种堆叠的半导体封装，其包括多个半导体芯片和通孔。 每个半导体芯片具有形成在半导体芯片的第一表面上的接合焊盘，并且具有从半导体芯片的第二表面的一部分突出的突起。 半导体芯片的第一和第二表面相对于第一表面。 贯通电极穿过第一表面并穿过第二表面上的突起。