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公开(公告)号：US20250157730A1
公开(公告)日：2025-05-15
申请号：US19028277
申请日：2025-01-17
Applicant: Apple Inc.
Inventor： David P. Cappabianca , Joseph T. DiBene, II , Shawn Searles , Le Wang , Yizhang Yang , Sean Cian O'Mathuna , Santosh Kulkarni , Paul McCloskey , Zoran Pavlovic , William Lawton , Graeme Maxwell , Joseph O'Brien , Hugh Charles Smiddy
Abstract: An inductor is disclosed, including a first wire, a non-conductive material, and a shell. The non-conductive material may cover the first wire, with a portion of each end of the first wire uncovered. The shell may include a top portion and a bottom portion and include at least one magnetized layer and at least one gap between the first portion and the second portion. The shell may also surround a portion of the non-conductive material.
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公开(公告)号：US20240119991A1
公开(公告)日：2024-04-11
申请号：US18488656
申请日：2023-10-17
Applicant: Apple Inc.
Inventor： Liang Deng , Norman J. Rohrer , Yizhang Yang , Arpit Mittal
IPC: G11C11/406 , G11C11/4074 , G11C11/4091
CPC classification number: G11C11/40626 , G11C11/4074 , G11C11/4091 , G11C2211/4061
Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.
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公开(公告)号：US20210201987A1
公开(公告)日：2021-07-01
申请号：US17182341
申请日：2021-02-23
Applicant: Apple Inc.
Inventor： Liang Deng , Norman J. Rohrer , Yizhang Yang , Arpit Mittal
IPC: G11C11/406 , G11C11/4074 , G11C11/4091
Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.
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公开(公告)号：US20210020231A1
公开(公告)日：2021-01-21
申请号：US16515351
申请日：2019-07-18
Applicant: Apple Inc.
Inventor： Liang Deng , Norman J. Rohrer , Yizhang Yang , Arpit Mittal
IPC: G11C11/406 , G11C11/4074 , G11C11/4091
Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.
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公开(公告)号：US09263426B2
公开(公告)日：2016-02-16
申请号：US14593317
申请日：2015-01-09
Applicant: Apple Inc.
Inventor： Jie-Hua Zhao , Yizhang Yang , Jun Zhai , Chih-Ming Chung
CPC classification number: H01L25/50 , H01L23/3128 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2225/0651 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/3511 , H01L2924/37001 , Y02P80/30 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A PoP (package-on-package) package includes a bottom package coupled to a top package. Terminals on the top of the bottom package are coupled to terminals on the bottom of the top package with an electrically insulating material located between the upper surface of the bottom package and the lower surface of the top package. The bottom package and the top package are coupled during a process that applies force to bring the packages together while heating the packages.
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Patent Agency Ranking
公开(公告)号：US20150171063A1
公开(公告)日：2015-06-18
申请号：US14192145
申请日：2014-02-27
Applicant: Apple Inc.
Inventor： Jun Zhai , Yizhang Yang , Mengzhi Pang
IPC: H01L25/16 , H01L23/538 , H01L23/00 , H01L23/367 , H01L25/00
CPC classification number: H01L25/165 , H01L23/36 , H01L23/49816 , H01L23/5384 , H01L23/5389 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/08225 , H01L2224/16145 , H01L2224/16225 , H01L2224/32245 , H01L2224/73253 , H01L2224/73257 , H01L2224/81894 , H01L2224/83894 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06537 , H01L2225/06589 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/1094 , H01L2924/1434 , H01L2924/15311 , H01L2924/15331 , H01L2924/18161 , H01L2924/2064 , H01L2924/20641 , H01L2924/20642 , H01L2924/20643 , H01L2924/20644 , H01L2924/20645 , H01L2924/20646 , H01L2924/20647 , H01L2924/20648 , H01L2924/20649
Abstract: In some embodiments, a semiconductor device package assembly may include a first substrate. The semiconductor device package assembly may include a first die electrically connected to the first substrate such that the first die is directly bonded to the first substrate. The semiconductor device package assembly may include a second substrate directly bonded to a surface of the first die. The semiconductor device package assembly may include an electronic memory module. The electronic memory module may be directly bonded to the second substrate. The semiconductor device package assembly may include a thermally conductive material directly applied to the electronic memory module. The semiconductor device package assembly may include a heat spreader directly bonded to the thermally conductive material. The heat spreader may function to transfer heat from the first die and the electronic memory module through the heat spreader from the first side to the second side.
Abstract translation: 在一些实施例中，半导体器件封装组件可以包括第一衬底。 半导体器件封装组件可以包括电连接到第一衬底的第一裸片，使得第一裸片直接结合到第一衬底。 半导体器件封装组件可以包括直接接合到第一管芯的表面的第二衬底。 半导体器件封装组件可以包括电子存储器模块。 电子存储器模块可以直接结合到第二衬底。 半导体器件封装组件可以包括直接施加到电子存储器模块的导热材料。 半导体器件封装组件可以包括直接结合到导热材料的散热器。 散热器可以起到将热量从第一模具和电子存储器模块通过散热器从第一侧传递到第二侧的功能。
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公开(公告)号：US11823728B2
公开(公告)日：2023-11-21
申请号：US17687107
申请日：2022-03-04
Applicant: Apple Inc.
Inventor： Liang Deng , Norman J. Rohrer , Yizhang Yang , Arpit Mittal
IPC: G11C7/00 , G11C11/406 , G11C11/4074 , G11C11/4091
CPC classification number: G11C11/40626 , G11C11/4074 , G11C11/4091 , G11C2211/4061
Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.
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公开(公告)号：US11822399B2
公开(公告)日：2023-11-21
申请号：US17387376
申请日：2021-07-28
Applicant: Apple Inc.
Inventor： Doron Rajwan , Tal Kuzi , Keith Cox , Yizhang Yang
CPC classification number: G06F1/206 , G06F1/08 , G06F11/3058
Abstract: A temperature control apparatus is disclosed. An integrated circuit (IC) includes a plurality of temperature sensors, a first thermal control loop, and a second thermal control loop. The first thermal control loop is configured to control temperature of the IC by reducing a frequency of a clock signal provided to the IC in response to a temperature at one of the plurality of temperature sensors reaching a first temperature threshold. The second thermal control loop is configured to control temperature of the IC by dithering the clock signal provided to the IC in response to a temperature at one of the plurality of temperature sensors reaching a second temperature threshold that is greater than the first temperature threshold.
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公开(公告)号：US11270753B2
公开(公告)日：2022-03-08
申请号：US17182341
申请日：2021-02-23
Applicant: Apple Inc.
Inventor： Liang Deng , Norman J. Rohrer , Yizhang Yang , Arpit Mittal
IPC: G11C7/04 , G11C11/406 , G11C11/4074 , G11C11/4091
Abstract: In an embodiment, a memory controller in an integrated circuit may generate refreshes for one or more DRAMs coupled to the integrated circuit according to a refresh rate. The integrated circuit may include one or more temperature sensors. A rate of change of the temperature may be determined from the temperature sensors. If the rate is greater than a threshold, the memory controller may generate refreshes according to a refresh rate specified by the DRAMs. If the rate is less than the threshold, the memory controller may generate refreshes at a reduced refresh rate.
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公开(公告)号：US20190221365A1
公开(公告)日：2019-07-18
申请号：US16335075
申请日：2017-08-24
Applicant: Apple Inc.
Inventor： David P. Cappabianca , Joseph T. DiBene, II , Shawn Searles , Le Wang , Yizhang Yang , Sean Cian O'Mathuna , Santosh Kulkarni , Paul McCloskey , Zoran Pavlovic , William Lawton , Graeme Maxwell , Joseph O'Brien , Hugh Charles Smiddy
CPC classification number: H01F41/34 , H01F17/0006 , H01F19/00 , H01F2017/008 , H01L28/10
Abstract: An inductor is disclosed, including a first wire, a non-conductive material, and a shell. The non-conductive material may cover the first wire, with a portion of each end of the first wire uncovered. The shell may include a top portion and a bottom portion and include at least one magnetized layer and at least one gap between the first portion and the second portion. The shell may also surround a portion of the non-conductive material.
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