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公开(公告)号:US20190131218A1
公开(公告)日:2019-05-02
申请号:US15797297
申请日:2017-10-30
发明人: Wu Hu LI , Edmund RIEDL , Thomas HOREDT , Ali MAZLOUM-NEJADARI
IPC分类号: H01L23/495 , H01L21/48 , H01L23/14 , H01L23/31 , H01L23/00
CPC分类号: H01L23/49568 , H01L21/4821 , H01L23/14 , H01L23/3107 , H01L23/36 , H01L23/3675 , H01L23/49524 , H01L23/49562 , H01L23/49582 , H01L24/32 , H01L24/35 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/84 , H01L2224/32245 , H01L2224/3512 , H01L2224/3716 , H01L2224/37572 , H01L2224/37611 , H01L2224/37616 , H01L2224/37618 , H01L2224/37639 , H01L2224/37644 , H01L2224/37647 , H01L2224/37655 , H01L2224/37664 , H01L2224/40175 , H01L2224/48245 , H01L2224/73263 , H01L2224/73265 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/2064 , H01L2924/20641
摘要: A connection member for connecting an electronic chip, wherein the connection member comprises a bulk body, and a coating at least partially coating the bulk body and comprising a material having higher electric and higher thermal conductivity than the bulk body, wherein a ratio between a thickness of the coating and a thickness of the bulk body is at least 0.0016 at at least a part of the connection member.
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公开(公告)号:US10037955B2
公开(公告)日:2018-07-31
申请号:US15490716
申请日:2017-04-18
发明人: Hsien-Wei Chen , Jie Chen
CPC分类号: H01L24/09 , H01L21/56 , H01L23/3171 , H01L23/3192 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L2224/0214 , H01L2224/02175 , H01L2224/0231 , H01L2224/02311 , H01L2224/02313 , H01L2224/02315 , H01L2224/02331 , H01L2224/02335 , H01L2224/0235 , H01L2224/02351 , H01L2224/02373 , H01L2224/0239 , H01L2224/03462 , H01L2224/03464 , H01L2224/0381 , H01L2224/0382 , H01L2224/03828 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05111 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05551 , H01L2224/05552 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/06131 , H01L2224/06136 , H01L2224/06179 , H01L2224/0912 , H01L2224/11013 , H01L2224/11334 , H01L2224/11849 , H01L2224/12105 , H01L2224/13 , H01L2224/13014 , H01L2224/13016 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/211 , H01L2224/215 , H01L2224/221 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01074 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/05042 , H01L2924/05442 , H01L2924/059 , H01L2924/06 , H01L2924/07025 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/2064 , H01L2924/20641 , H01L2924/3512 , H01L2924/00 , H01L2924/00014 , H01L2924/01082 , H01L2924/01051 , H01L2924/01047 , H01L2924/00012
摘要: Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to a second portion of the contact pad. A PPI pad is disposed over the passivation layer. A transition element is disposed over the passivation layer and is coupled between the PPI line and the PPI pad. The transition element comprises a first side and a second side coupled to the first side. The first side and the second side of the transition element are non-tangential to the PPI pad.
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3.
公开(公告)号:US20180204809A1
公开(公告)日:2018-07-19
申请号:US15919791
申请日:2018-03-13
发明人: Jin Seong Kim , Byong Woo Cho , Cha Gyu Song
CPC分类号: H01L23/562 , H01L23/3128 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/131 , H01L2224/16227 , H01L2224/81801 , H01L2924/014 , H01L2924/15331 , H01L2924/1815 , H01L2924/18161 , H01L2924/2064 , H01L2924/20641 , H01L2924/3511 , H01L2924/3512 , H01L2924/00014
摘要: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
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4.
公开(公告)号:US09917063B2
公开(公告)日:2018-03-13
申请号:US14447415
申请日:2014-07-30
发明人: Jin Seong Kim , Byong Woo Cho , Cha Gyu Song
CPC分类号: H01L23/562 , H01L23/3128 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/131 , H01L2224/16227 , H01L2224/81801 , H01L2924/014 , H01L2924/15331 , H01L2924/1815 , H01L2924/18161 , H01L2924/2064 , H01L2924/20641 , H01L2924/3511 , H01L2924/3512 , H01L2924/00014
摘要: A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film.
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公开(公告)号:US09911705B2
公开(公告)日:2018-03-06
申请号:US15456746
申请日:2017-03-13
发明人: Yosuke Nakata , Masayoshi Tarutani
IPC分类号: H01L23/48 , H01L23/00 , H01L23/498
CPC分类号: H01L24/05 , H01L23/498 , H01L24/01 , H01L24/03 , H01L24/08 , H01L24/11 , H01L24/16 , H01L24/48 , H01L24/73 , H01L2224/034 , H01L2224/0401 , H01L2224/04042 , H01L2224/05083 , H01L2224/05124 , H01L2224/05155 , H01L2224/05166 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/16113 , H01L2224/16245 , H01L2224/29101 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73251 , H01L2224/73265 , H01L2924/00014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01042 , H01L2924/01047 , H01L2924/01079 , H01L2924/07025 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/2064 , H01L2924/20641 , H01L2924/20642 , H01L2924/20643 , H01L2924/20644 , H01L2924/20645 , H01L2924/20646 , H01L2924/20647 , H01L2924/20648 , H01L2924/20649 , H01L2924/2065 , H01L2924/351 , H01L2924/00 , H01L2224/45099 , H01L2924/014 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2924/01201 , H01L2924/01014
摘要: A semiconductor device of the present invention includes a semiconductor element, a surface electrode formed on a surface of the semiconductor element, a metal film formed on the surface electrode so as to have a joining portion and a stress relieving portion formed so as to border on and surround the joining portion, solder joined to the joining portion while avoiding the stress relieving portion, and an external electrode joined to the joining portion through the solder.
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公开(公告)号:US20180047708A1
公开(公告)日:2018-02-15
申请号:US15791071
申请日:2017-10-23
发明人: Chun-Cheng Lin , Chung-Shi Liu , Kuei-Wei Huang , Cheng-Ting Chen , Wei-Hung Lin , Ming-Da Cheng
IPC分类号: H01L25/065 , H01L23/00 , H01L23/31 , H01L21/027 , H01L25/10 , H01L25/00 , H01L23/498 , H01L21/48 , H01L21/768 , H01L21/56
CPC分类号: H01L25/0657 , H01L21/0273 , H01L21/486 , H01L21/56 , H01L21/76898 , H01L23/3128 , H01L23/49827 , H01L23/49838 , H01L23/49866 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/105 , H01L25/50 , H01L2224/0231 , H01L2224/0239 , H01L2224/03452 , H01L2224/0401 , H01L2224/05083 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05184 , H01L2224/1131 , H01L2224/11424 , H01L2224/1152 , H01L2224/1162 , H01L2224/11825 , H01L2224/11849 , H01L2224/13024 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13611 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/16238 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01048 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/12042 , H01L2924/15311 , H01L2924/15321 , H01L2924/15747 , H01L2924/18161 , H01L2924/2064 , H01L2924/20641 , H01L2924/20642 , H01L2924/00014 , H01L2924/00
摘要: A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections.
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公开(公告)号:US09812428B2
公开(公告)日:2017-11-07
申请号:US15299483
申请日:2016-10-21
发明人: Zhijiong Luo
IPC分类号: H01L25/065 , H01L25/00 , H01L23/00 , H01L21/285 , H01L21/306 , H01L21/3065 , H01L21/822 , H01L23/34 , H01L23/36 , H01L21/18 , H01L23/532 , H01L21/60 , H01L21/768
CPC分类号: H01L25/0657 , H01L21/187 , H01L21/28518 , H01L21/28568 , H01L21/30604 , H01L21/3065 , H01L21/76889 , H01L21/8221 , H01L23/34 , H01L23/36 , H01L23/53214 , H01L23/53228 , H01L23/53257 , H01L24/29 , H01L24/32 , H01L24/75 , H01L24/83 , H01L25/50 , H01L2021/60007 , H01L2021/60097 , H01L2224/04026 , H01L2224/05568 , H01L2224/05571 , H01L2224/05573 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/0568 , H01L2224/05681 , H01L2224/05684 , H01L2224/2745 , H01L2224/27452 , H01L2224/27614 , H01L2224/27848 , H01L2224/29006 , H01L2224/291 , H01L2224/29124 , H01L2224/29138 , H01L2224/29147 , H01L2224/29155 , H01L2224/29166 , H01L2224/2918 , H01L2224/29181 , H01L2224/29184 , H01L2224/32014 , H01L2224/32057 , H01L2224/32113 , H01L2224/32145 , H01L2224/32147 , H01L2224/325 , H01L2224/32503 , H01L2224/7525 , H01L2224/80896 , H01L2224/80948 , H01L2224/83048 , H01L2224/838 , H01L2224/83895 , H01L2224/83896 , H01L2224/83931 , H01L2224/83948 , H01L2225/06524 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01042 , H01L2924/01073 , H01L2924/01074 , H01L2924/0474 , H01L2924/0475 , H01L2924/0476 , H01L2924/048 , H01L2924/0481 , H01L2924/0483 , H01L2924/2064 , H01L2924/20641 , H01L2224/056 , H01L2924/047 , H01L2924/00012
摘要: Technologies are generally described related to three-dimensional integration of integrated circuits (ICs) with spacing for heat dissipation. According to some examples, a self-aligned silicide may be formed in a temporary silicon layer and removed subsequent to bonding of the wafers to achieve improved contact between the combined ICs and enhanced heat dissipation through added spacing between the ICs.
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公开(公告)号:US09726691B2
公开(公告)日:2017-08-08
申请号:US14148779
申请日:2014-01-07
IPC分类号: H01L21/66 , G01R31/26 , G01R1/067 , H01L23/00 , G01R1/073 , G01R31/3185 , H01L25/065 , H01L23/48
CPC分类号: G01R1/067 , G01R1/06738 , G01R1/07378 , G01R31/318513 , H01L22/14 , H01L22/30 , H01L22/32 , H01L22/34 , H01L23/481 , H01L24/11 , H01L24/13 , H01L25/0657 , H01L2224/13014 , H01L2224/13016 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06541 , H01L2225/06596 , H01L2924/14 , H01L2924/15311 , H01L2924/2064 , H01L2924/20641
摘要: The embodiments of the present invention relate to semiconductor device manufacturing, and more particularly to structures and methods of directly testing semiconductor wafers having micro-solder connections. According to one embodiment of the present invention, a method of forming a pattern of micro-solder connections coupled with a through substrate via (TSV) that can be directly tested by electrical probing, without the use of a testing interposer, is disclosed. According to another embodiment, a method of testing the pattern of micro-solder connections is disclosed. According to another embodiment, a novel electrical probe tip structure, having contacts on the same pitch as the pattern of micro-solder connections is disclosed.
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9.
公开(公告)号:US20170200677A1
公开(公告)日:2017-07-13
申请号:US15469964
申请日:2017-03-27
申请人: INTEL CORPORATION
发明人: Qing Ma , Johanna M. Swan , Robert Starkston , John S. Guzek , Robert L. Sankman , Aleksandar Aleksov
IPC分类号: H01L23/538 , H01L25/065 , H01L21/683 , H01L21/48 , H01L23/498 , H01L23/15 , H01L23/00
CPC分类号: H01L23/5386 , B32B2457/08 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/568 , H01L21/6835 , H01L23/15 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/5383 , H01L23/5384 , H01L23/5389 , H01L24/09 , H01L24/13 , H01L24/17 , H01L24/19 , H01L24/24 , H01L24/81 , H01L24/82 , H01L25/0655 , H01L2221/68345 , H01L2221/68359 , H01L2224/0401 , H01L2224/04105 , H01L2224/08238 , H01L2224/12105 , H01L2224/13025 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/2402 , H01L2224/24137 , H01L2224/81192 , H01L2224/814 , H01L2224/81801 , H01L2224/8185 , H01L2224/8203 , H01L2224/821 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/15331 , H01L2924/15724 , H01L2924/15747 , H01L2924/18162 , H01L2924/2064 , H01L2924/20641 , H05K1/0298 , H05K1/0306 , H05K1/115 , H05K1/185 , H05K3/4688 , H05K2201/017 , H05K2203/1469 , Y10T156/1057 , H01L2924/014 , H01L2924/00
摘要: Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a trace routing structure, wherein the glass routing structure is incorporated with the trace routing substrate, either in a laminated or embedded configuration. Also disclosed are embodiments of a microelectronic package including at least one microelectronic device disposed proximate to the glass routing structure of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects. Further, disclosed are embodiments of a microelectronic structure including at least one microelectronic device embedded within a microelectronic encapsulant having a glass routing structure attached to the microelectronic encapsulant and a trace routing structure formed on the glass routing structure.
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公开(公告)号:US09633963B2
公开(公告)日:2017-04-25
申请号:US15152376
申请日:2016-05-11
发明人: Hsien-Wei Chen , Tsung-Yuan Yu , Hao-Yi Tsai , Mirng-Ji Lii , Chen-Hua Yu
IPC分类号: H01L21/00 , H01L23/00 , H01L23/498
CPC分类号: H01L24/09 , H01L21/56 , H01L23/3171 , H01L23/3192 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/10 , H01L24/11 , H01L24/13 , H01L24/19 , H01L24/20 , H01L2224/0214 , H01L2224/02175 , H01L2224/0231 , H01L2224/02311 , H01L2224/02313 , H01L2224/02315 , H01L2224/02331 , H01L2224/02335 , H01L2224/0235 , H01L2224/02351 , H01L2224/02373 , H01L2224/0239 , H01L2224/03462 , H01L2224/03464 , H01L2224/0381 , H01L2224/0382 , H01L2224/03828 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05111 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05551 , H01L2224/05552 , H01L2224/05567 , H01L2224/05624 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/06131 , H01L2224/06136 , H01L2224/06179 , H01L2224/0912 , H01L2224/11013 , H01L2224/11334 , H01L2224/11849 , H01L2224/12105 , H01L2224/13 , H01L2224/13014 , H01L2224/13016 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/211 , H01L2224/215 , H01L2224/221 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01074 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/05042 , H01L2924/05442 , H01L2924/059 , H01L2924/06 , H01L2924/07025 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/2064 , H01L2924/20641 , H01L2924/3512 , H01L2924/00 , H01L2924/00014 , H01L2924/01082 , H01L2924/01051 , H01L2924/01047 , H01L2924/00012
摘要: Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad. A second portion of the contact pad is exposed. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to the second portion of the contact pad. A PPI pad is disposed over the passivation layer. A transition element is disposed over the passivation layer and is coupled between the PPI line and the PPI pad. The transition element includes a hollow region.
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