UV CURABLE CMP POLISHING PAD AND METHOD OF MANUFACTURE

    公开(公告)号:US20190009388A1

    公开(公告)日:2019-01-10

    申请号:US16130939

    申请日:2018-09-13

    Abstract: A method of fabricating a chemical mechanical polishing pad includes introducing polymer precursors containing acrylate functional groups into a mold, providing abrasive particles and a photo-initiator in the polymer precursors to form a mixture, and while the mixture is contained between a bottom plate and a top cover of the mold, exposing the mixture to ultraviolet radiation through a transparent section of the mold to cause the polymer precursors to form radicals, forming a polymer matrix from the polymer precursor by causing the radicals to cross-link with one another. The polishing layer includes the polymer matrix having the abrasive particles dispersed therein.

    Conditioning of grooving in polishing pads
    15.
    发明授权
    Conditioning of grooving in polishing pads 有权
    调理抛光垫中的切槽

    公开(公告)号:US09486893B2

    公开(公告)日:2016-11-08

    申请号:US14285545

    申请日:2014-05-22

    CPC classification number: B24B53/017 B23K26/36 B24B37/26 B26D3/06 B26F3/004

    Abstract: Among other things, a method comprises polishing a surface of a substrate by applying a pressure between the surface of a substrate and a surface of a polishing pad. The surface of the polishing pad defines one or more grooves separated by one or more partition regions. The one or more grooves have an initial depth before the polishing starts and extend from an initial outer surface of the one or more partition regions to an initial bottom of the one or more grooves. The method also comprises removing material below an initial bottom of the one or more grooves such that a distance between an outer surface of the one or more partition regions and a bottom of the one or more grooves remain substantially the same as the initial depth.

    Abstract translation: 除其他之外,一种方法包括通过在基板的表面和抛光垫的表面之间施加压力来抛光基板的表面。 抛光垫的表面限定了一个或多个由一个或多个分隔区隔开的槽。 一个或多个凹槽在抛光开始之前具有初始深度并且从一个或多个分隔区域的初始外表面延伸到一个或多个凹槽的初始底部。 该方法还包括在一个或多个凹槽的初始底部下方移除材料,使得一个或多个分隔区域的外表面与一个或多个凹槽的底部之间的距离保持与初始深度基本相同。

    UV CURABLE CMP POLISHING PAD AND METHOD OF MANUFACTURE
    16.
    发明申请
    UV CURABLE CMP POLISHING PAD AND METHOD OF MANUFACTURE 审中-公开
    UV可固化CMP抛光垫及其制造方法

    公开(公告)号:US20160176021A1

    公开(公告)日:2016-06-23

    申请号:US14575608

    申请日:2014-12-18

    Abstract: A method of fabricating a chemical mechanical polishing pad includes introducing polymer precursors containing acrylate functional groups into a mold, providing abrasive particles and a photo-initiator in the polymer precursors to form a mixture, and while the mixture is contained between a bottom plate and a top cover of the mold, exposing the mixture to ultraviolet radiation through a transparent section of the mold to cause the polymer precursors to form radicals, forming a polymer matrix from the polymer precursor by causing the radicals to cross-link with one another. The polishing layer includes the polymer matrix having the abrasive particles dispersed therein.

    Abstract translation: 制造化学机械抛光垫的方法包括将含有丙烯酸酯官能团的聚合物前体引入模具中,在聚合物前体中提供研磨颗粒和光引发剂以形成混合物,并且当混合物包含在底板和 模具的顶盖,通过模具的透明部分将混合物暴露于紫外线辐射,以使聚合物前体形成自由基,通过使自由基彼此交联从聚合物前体形成聚合物基质。 抛光层包括其中分散有磨料颗粒的聚合物基质。

    SUBSTRATE FEATURES FOR INDUCTIVE MONITORING OF CONDUCTIVE TRENCH DEPTH
    17.
    发明申请
    SUBSTRATE FEATURES FOR INDUCTIVE MONITORING OF CONDUCTIVE TRENCH DEPTH 有权
    导电性深度深度感应监测的基底特征

    公开(公告)号:US20150371907A1

    公开(公告)日:2015-12-24

    申请号:US14312470

    申请日:2014-06-23

    CPC classification number: H01L22/14 H01L21/3212 H01L22/26 H01L22/30

    Abstract: A substrate for use in fabrication of an integrated circuit has a layer with a plurality of conductive interconnects. The substrate includes a semiconductor body, a dielectric layer disposed over the semiconductor body, a plurality of conductive lines of a conductive material disposed in first trenches in the dielectric layer to provide the conductive interconnects, and a closed conductive loop structure of the conductive material disposed in second trenches in the dielectric layer. The closed conductive loop is not electrically connected to any of the conductive lines.

    Abstract translation: 用于制造集成电路的衬底具有具有多个导电互连的层。 衬底包括半导体本体,设置在半导体本体上的电介质层,设置在电介质层中的第一沟槽中的导电材料的多条导电线,以提供导电互连,以及设置导电材料的闭合导电环结构 在介质层的第二沟槽中。 闭合的导电回路不与任何导电线电连接。

Patent Agency Ranking