Semiconductor device processing tools and methods for patterning substrates
    11.
    发明授权
    Semiconductor device processing tools and methods for patterning substrates 有权
    用于图案化衬底的半导体器件加工工具和方法

    公开(公告)号:US09431267B2

    公开(公告)日:2016-08-30

    申请号:US14093503

    申请日:2013-12-01

    CPC classification number: H01L21/3088 H01L21/3086 H01L21/67184 H01L21/67207

    Abstract: In some embodiments, an electronic device processing system is provided that includes a processing tool having a first subsystem configured to carry out a first subset of processes on a substrate having pattern features, the first subsystem including a first conformal deposition chamber and a first etch chamber. The processing tool includes a second subsystem coupled to the first subsystem and configured to carry out a second subset of processes on the substrate, the second subsystem including a second conformal deposition chamber and a second etch chamber. The processing tool is configured to employ the first and second subsystems to perform pitch division on the substrate within the processing tool so as to form a reduced-pitch pattern on the substrate. Numerous other embodiments are provided.

    Abstract translation: 在一些实施例中,提供一种电子设备处理系统,其包括具有第一子系统的处理工具,第一子系统被配置为在具有图案特征的基板上执行第一子进程,第一子系统包括第一共形沉积室和第一蚀刻室 。 所述处理工具包括耦合到所述第一子系统并被配置为在所述衬底上执行第二子进程的第二子系统,所述第二子系统包括第二共形沉积室和第二蚀刻室。 处理工具被配置为使用第一和第二子系统在处理工具内的基板上执行螺距分割,以便在基板上形成减小的间距图案。 提供了许多其他实施例。

    Integrated oxide and nitride recess for better channel contact in 3D architectures
    13.
    发明授权
    Integrated oxide and nitride recess for better channel contact in 3D architectures 有权
    集成的氧化物和氮化物凹槽,用于在3D架构中更好的通道接触

    公开(公告)号:US09165786B1

    公开(公告)日:2015-10-20

    申请号:US14452220

    申请日:2014-08-05

    CPC classification number: H01L21/31116 H01L21/67207 H01L28/00 H01L29/66833

    Abstract: Methods of etching back an oxide-nitride-oxide (ONO) layer of a 3-d flash memory cell without breaking vacuum are described. The methods include recessing the two outer silicon oxide dielectric layers to expose the flanks of the thin silicon nitride layer. The silicon nitride layer is then etched back from all exposed sides to hasten the process on the same substrate processing mainframe. Both etching back the silicon oxide and etching back the silicon nitride use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. The process may also be reversed such that the silicon nitride is etched back first.

    Abstract translation: 描述了在不破坏真空的情况下将3-d闪存单元的氧化物 - 氮化物 - 氧化物(ONO)层刻蚀的方法。 这些方法包括使两个外部氧化硅介电层凹陷以暴露薄氮化硅层的侧面。 然后从所有暴露的侧面回蚀刻氮化硅层,以加速相同基板处理主机上的工艺。 两者都蚀刻氧化硅并且将附着在相同主机上的远程激发的含氟设备的氮化硅用途蚀刻回来,以便于在没有中间大气暴露的情况下执行这两种操作。 该方法也可以颠倒,使得首先蚀刻氮化硅。

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