公开(公告)号：US09070633B2

公开(公告)日：2015-06-30

申请号：US14284088

申请日：2014-05-21

Applicant: Applied Materials, Inc.

Inventor： Roy C. Nangoy ,  Saravjeet Singh ,  Jon C. Farr ,  Sharma V. Pamarthy ,  Ajay Kumar

IPC: B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01L21/3065 ,  H01J37/32 ,  C23C16/455 ,  C23C16/505 ,  H01L21/67

CPC classification number: H01L21/3065 ,  C23C16/45508 ,  C23C16/45563 ,  C23C16/45574 ,  C23C16/45587 ,  C23C16/45591 ,  C23C16/505 ,  H01J37/321 ,  H01J37/3211 ,  H01J37/3222 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32458 ,  H01L21/30655 ,  H01L21/67069

Abstract: Embodiments of the present disclosure relate to method and apparatus for providing processing gases to a process chamber with improved plasma dissociation efficiency. One embodiment of the present disclosure provides a baffle nozzle assembly comprising an outer body defining an extension volume connected to a processing chamber. A processing gas is flown to the processing chamber through the extension volume which is exposed to power source for plasma generation.

Abstract translation: 本公开的实施例涉及用于向具有改进的等离子体解离效率的处理室提供处理气体的方法和装置。 本公开的一个实施例提供了一种挡板喷嘴组件，其包括限定连接到处理室的延伸体的外部主体。 处理气体通过暴露于等离子体产生的电源的延伸体积流到处理室。

公开(公告)号：US20140261805A1

公开(公告)日：2014-09-18

申请号：US14207475

申请日：2014-03-12

Applicant: APPLIED MATERIALS, INC.

Inventor： Roy C. Nangoy ,  Saravjeet Singh

IPC: G05D7/00

CPC classification number: F17D1/00 ,  H01J37/3244 ,  H01J37/32449 ,  H01L21/00 ,  H01L21/67017 ,  Y10T137/8733

Abstract: In some embodiments, a gas distribution apparatus may include: a manifold having a gas inlet to receive a process gas from a fast gas exchange unit and a first gas outlet to provide the process gas to a first gas delivery zone; a plurality of flow restrictors fluidly coupled to one another in parallel and to the gas inlet, wherein each of the plurality of flow restrictors are configured to allow at least a portion of a total flow of a process gas through each of the plurality of flow restrictors; and a plurality of valves each coupled to respective ones of the plurality of flow restrictors, wherein the plurality of valves are configured to be selectively opened to allow the process gas to flow through selective ones of the plurality of flow restrictors to provide a desired percentage of a total flow of the process gas to the outlet.

Abstract translation: 在一些实施例中，气体分配设备可以包括：具有气体入口以从快速气体交换单元接收工艺气体的歧管和第一气体出口，以将处理气体提供给第一气体输送区域; 多个流量限制器并联流体耦合到气体入口，其中多个限流器中的每一个被配置为允许处理气体的总流量的至少一部分通过多个限流器中的每一个 ; 以及多个阀，每个阀分别联接到所述多个限流器中的相应流量限制器，其中所述多个阀被配置为选择性地打开以允许所述工艺气体流过所述多个限流器中的选择性流量限制器，以提供所需的百分比 工艺气体到出口的总流量。

公开(公告)号：US12148597B2

公开(公告)日：2024-11-19

申请号：US18168467

申请日：2023-02-13

Applicant: Applied Materials, Inc.

Inventor： Saravjeet Singh ,  Kenneth D. Schatz ,  Alan Tso ,  Marlin Wijekoon ,  Dimitri Kioussis

IPC: H01L21/02 ,  H01J37/32 ,  H01L21/311

Abstract: The present technology includes improved gas distribution designs for forming uniform plasmas during semiconductor processing operations or for treating the interior of semiconductor processing chambers. While conventional gas distribution assemblies may receive a specific reactant or reactant ratio which is then distributed into the plasma region, the presently described technology allows for improved control of the reactant input distribution. The technology allows for separate flows of reactants to different regions of the plasma to offset any irregularities observed in process uniformity. A first precursor may be delivered to the center of the plasma above the center of the substrate/pedestal while a second precursor may be delivered to an outer portion of the plasma above an outer portion of the substrate/pedestal. In so doing, a substrate residing on the pedestal may experience a more uniform etch or deposition profile across the entire surface.

公开(公告)号：US12131952B2

公开(公告)日：2024-10-29

申请号：US18116736

申请日：2023-03-02

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar ,  James M. Holden

IPC: H01L21/00 ,  B23K26/36 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/67 ,  H01L21/78 ,  H01L21/822 ,  H01L23/544 ,  H01L21/683

CPC classification number: H01L21/822 ,  B23K26/36 ,  H01J37/32889 ,  H01J37/32899 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/67069 ,  H01L21/67207 ,  H01L21/78 ,  H01L23/544 ,  H01L21/67092 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2924/0002 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width.

公开(公告)号：US11834744B2

公开(公告)日：2023-12-05

申请号：US18173704

申请日：2023-02-23

Applicant: Applied Materials, Inc.

Inventor： Laksheswar Kalita ,  Soonam Park ,  Dmitry Lubomirsky ,  Tien Fak Tan ,  LokKee Loh ,  Saravjeet Singh ,  Tae Won Kim

IPC: H01J37/32 ,  C23C16/455 ,  C23C16/34 ,  H01L21/3213 ,  H01L21/285 ,  C23C16/458

CPC classification number: C23C16/45565 ,  C23C16/34 ,  C23C16/4581 ,  C23C16/45574 ,  H01J37/32495 ,  H01J37/32559 ,  H01L21/28512 ,  H01L21/3213

Abstract: Exemplary semiconductor processing chamber showerheads may include a dielectric plate characterized by a first surface and a second surface opposite the first surface. The dielectric plate may define a plurality of apertures through the dielectric plate. The dielectric plate may define a first annular channel in the first surface of the dielectric plate, and the first annular channel may extend about the plurality of apertures. The dielectric plate may define a second annular channel in the first surface of the dielectric plate. The second annular channel may be formed radially outward from the first annular channel. The showerheads may also include a conductive material embedded within the dielectric plate and extending about the plurality of apertures without being exposed by the apertures. The conductive material may be exposed at the second annular channel.

公开(公告)号：US20230203657A1

公开(公告)日：2023-06-29

申请号：US18173704

申请日：2023-02-23

Applicant: Applied Materials, Inc.

Inventor： Laksheswar Kalita ,  Soonam Park ,  Dmitry Lubomirsky ,  Tien Fak Tan ,  LokKee Loh ,  Saravjeet Singh ,  Tae Won Kim

IPC: C23C16/455 ,  C23C16/34 ,  H01L21/3213 ,  H01J37/32 ,  H01L21/285 ,  C23C16/458

CPC classification number: C23C16/45565 ,  C23C16/45574 ,  C23C16/34 ,  H01L21/3213 ,  H01J37/32495 ,  H01J37/32559 ,  H01L21/28512 ,  C23C16/4581

Abstract: Exemplary semiconductor processing chamber showerheads may include a dielectric plate characterized by a first surface and a second surface opposite the first surface. The dielectric plate may define a plurality of apertures through the dielectric plate. The dielectric plate may define a first annular channel in the first surface of the dielectric plate, and the first annular channel may extend about the plurality of apertures. The dielectric plate may define a second annular channel in the first surface of the dielectric plate. The second annular channel may be formed radially outward from the first annular channel. The showerheads may also include a conductive material embedded within the dielectric plate and extending about the plurality of apertures without being exposed by the apertures. The conductive material may be exposed at the second annular channel.

公开(公告)号：US11637002B2

公开(公告)日：2023-04-25

申请号：US14554250

申请日：2014-11-26

Applicant: Applied Materials, Inc.

Inventor： Saravjeet Singh ,  Alan Tso ,  Jingchun Zhang ,  Zihui Li ,  Hanshen Zhang ,  Dmitry Lubomirsky

IPC: H01J37/32 ,  H01L21/67

Abstract: A semiconductor processing chamber may include a remote plasma region, and a processing region fluidly coupled with the remote plasma region. The processing region may be configured to house a substrate on a support pedestal. The support pedestal may include a first material at an interior region of the pedestal. The support pedestal may also include an annular member coupled with a distal portion of the pedestal or at an exterior region of the pedestal. The annular member may include a second material different from the first material.

公开(公告)号：US11239061B2

公开(公告)日：2022-02-01

申请号：US15581446

申请日：2017-04-28

Applicant: Applied Materials, Inc.

Inventor： Saravjeet Singh ,  Alan Tso ,  Jingchun Zhang ,  Zihui Li ,  Hanshen Zhang ,  Dmitry Lubomirsky

IPC: H01J37/32 ,  H01L21/67

Abstract: A semiconductor processing chamber may include a remote plasma region, and a processing region fluidly coupled with the remote plasma region. The processing region may be configured to house a substrate on a support pedestal. The support pedestal may include a first material at an interior region of the pedestal. The support pedestal may also include an annular member coupled with a distal portion of the pedestal or at an exterior region of the pedestal. The annular member may include a second material different from the first material.

公开(公告)号：US10903054B2

公开(公告)日：2021-01-26

申请号：US15847411

申请日：2017-12-19

Applicant: Applied Materials, Inc.

Inventor： Saravjeet Singh ,  Kenneth D. Schatz ,  Alan Tso ,  Marlin Wijekoon ,  Dimitri Kioussis

IPC: H01J37/32 ,  H01L21/02 ,  H01L21/311

Abstract: The present technology includes improved gas distribution designs for forming uniform plasmas during semiconductor processing operations or for treating the interior of semiconductor processing chambers. While conventional gas distribution assemblies may receive a specific reactant or reactant ratio which is then distributed into the plasma region, the presently described technology allows for improved control of the reactant input distribution. The technology allows for separate flows of reactants to different regions of the plasma to offset any irregularities observed in process uniformity. A first precursor may be delivered to the center of the plasma above the center of the substrate/pedestal while a second precursor may be delivered to an outer portion of the plasma above an outer portion of the substrate/pedestal. In so doing, a substrate residing on the pedestal may experience a more uniform etch or deposition profile across the entire surface.

公开(公告)号：US20200286787A1

公开(公告)日：2020-09-10

申请号：US16885142

申请日：2020-05-27

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng Lei ,  Brad Eaton ,  Madhava Rao Yalamanchili ,  Saravjeet Singh ,  Ajay Kumar ,  James M. Holden

IPC: H01L21/822 ,  H01L21/308 ,  H01L21/67 ,  H01L21/78 ,  H01J37/32 ,  H01L23/544 ,  B23K26/36 ,  H01L21/3065

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width.