公开(公告)号：US20160336226A1

公开(公告)日：2016-11-17

申请号：US15151857

申请日：2016-05-11

Applicant: Infineon Technologies AG

Inventor： Edward FUERGUT ,  Irmgard ESCHER-POEPPEL ,  Stephanie FASSL ,  Paul GANITZER ,  Gerhard POEPPEL ,  Werner SCHUSTEREDER ,  Harald WIEDENHOFER

IPC: H01L21/768 ,  H01L21/324 ,  H01L21/321 ,  H01L21/268 ,  H01L23/528 ,  H01L23/31

CPC classification number: H01L21/324 ,  H01L21/0455 ,  H01L21/0485 ,  H01L21/2254 ,  H01L21/2258 ,  H01L21/268 ,  H01L21/28512 ,  H01L21/28575 ,  H01L23/3157

Abstract: Various embodiments provide a method of reducing a sheet resistance in an electronic device encapsulated at least partially in an encapsulation material, wherein the method comprises: providing an electronic device comprising a multilayer structure and being at least partially encapsulated by an encapsulation material; and locally introducing energy into the multilayer structure for reducing a sheet resistance.

Abstract translation: 各种实施例提供了一种减少至少部分地封装在封装材料中的电子器件中的薄层电阻的方法，其中所述方法包括：提供包括多层结构并且被封装材料至少部分封装的电子器件; 并且将能量局部地引入到多层结构中以降低薄层电阻。

公开(公告)号：US20160322333A1

公开(公告)日：2016-11-03

申请号：US15137062

申请日：2016-04-25

Applicant: Infineon Technologies AG

Inventor： Edward FUERGUT ,  Martin GRUBER ,  Wolfram HABLE

IPC: H01L25/065 ,  H01L23/367 ,  H01L23/473 ,  H01L25/00 ,  H01L23/00 ,  H01L25/07 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/3121 ,  H01L23/473 ,  H01L24/32 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L25/074 ,  H01L25/50 ,  H01L2023/4031 ,  H01L2023/405 ,  H01L2023/4087 ,  H01L2224/023 ,  H01L2224/27464 ,  H01L2224/29082 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29184 ,  H01L2224/32225 ,  H01L2224/40225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/84205 ,  H01L2224/84801 ,  H01L2224/85205 ,  H01L2224/85801 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/1304 ,  H01L2924/1426 ,  H01L2924/1431 ,  H01L2924/186 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19101 ,  H01L2924/401 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: Various embodiments provide an electronic module comprising a interposer comprising a fluid channel formed in an electrically isolating material and an electrically conductive structured layer; at least one electronic chip attached to the electrically conductive layer and in thermal contact to the fluid channel; and a molded encapsulation formed at least partially around the at least one electronic chip, wherein the electrically conductive structured layer is directly formed on the electrically isolating material.

Abstract translation: 各种实施例提供了一种电子模块，其包括插入器，其包括形成在电隔离材料中的流体通道和导电结构化层; 至少一个电子芯片附接到所述导电层并与所述流体通道热接触; 以及至少部分地围绕所述至少一个电子芯片形成的模制封装，其中所述导电结构化层直接形成在所述电绝缘材料上。

公开(公告)号：US20150102479A1

公开(公告)日：2015-04-16

申请号：US14501070

申请日：2014-09-30

Applicant: Infineon Technologies AG

Inventor： Edward FUERGUT ,  Manfred MENGEL

IPC: H01L23/31 ,  H01L21/52 ,  H01L23/367 ,  H01L21/56

CPC classification number: H01L23/3675 ,  H01L21/3105 ,  H01L21/4871 ,  H01L21/52 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/3737 ,  H01L23/4334 ,  H01L23/49551 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/17747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: Method for manufacturing an electronic semiconductor package, in which method an electronic chip (100) is coupled to a carrier, the electronic chip is at least partially encapsulated by means of an encapsulation structure having a discontinuity, and the carrier is partially encapsulated, and at least one part of the discontinuity and a volume connected thereto adjoining an exposed surface section of the carrier are covered by an electrically insulating thermal interface structure, which electrically decouples at least one part of the carrier with respect to its surroundings.

Abstract translation: 一种用于制造电子半导体封装的方法，其中电子芯片（100）耦合到载体，所述电子芯片通过具有不连续性的封装结构至少部分地封装，并且所述载体被部分封装，并且在 不连续部分的至少一部分和与其邻接的与载体的暴露表面部分连接的体积被电绝缘热界面结构所覆盖，该电接口结构使载体的至少一部分相对于其周围环境电解耦。