公开(公告)号：US09449876B2

公开(公告)日：2016-09-20

申请号：US14158398

申请日：2014-01-17

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Gudrun Stranzl ,  Manfred Schneegans

IPC: H01L21/00 ,  H01L21/78 ,  H01L21/66 ,  H01L23/00 ,  B23H1/00 ,  B23H9/00

CPC classification number: H01L21/78 ,  B23H1/00 ,  B23H9/00 ,  H01L22/10 ,  H01L22/34 ,  H01L23/564 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of separating individual dies of a semiconductor wafer includes forming a metal layer on a first surface of a semiconductor wafer, the semiconductor wafer including a plurality of dies, separating the plurality of dies from one another, and electrical discharge machining the metal layer into individual segments each of which remains attached to one of the dies. A corresponding semiconductor die produced by such a method is also provided.

Abstract translation: 分离半导体晶片的各个管芯的方法包括在半导体晶片的第一表面上形成金属层，所述半导体晶片包括多个管芯，将多个管芯彼此分离，并将金属层进行放电加工成 各个片段保持附着于一个模具。 还提供了通过这种方法制造的相应的半导体管芯。

公开(公告)号：US20160035560A1

公开(公告)日：2016-02-04

申请号：US14451043

申请日：2014-08-04

Applicant: Infineon Technologies AG

Inventor： Manfred Schneegans ,  Martin Mischitz ,  Michael Roesner ,  Michael Pinczolits

IPC: H01L21/02 ,  H01L21/683 ,  H01L21/78

CPC classification number: H01L21/6836 ,  H01L21/56 ,  H01L23/291 ,  H01L23/3121 ,  H01L23/49551 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/28 ,  H01L24/32 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2224/03002 ,  H01L2224/0346 ,  H01L2224/03602 ,  H01L2224/0391 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/03

Abstract: In accordance with an alternative embodiment of the present invention, a method for forming a semiconductor device includes applying a paste over a semiconductor substrate, and forming a ceramic carrier by solidifying the paste. The semiconductor substrate is thinned using the ceramic carrier as a carrier.

Abstract translation: 根据本发明的替代实施例，一种用于形成半导体器件的方法包括在半导体衬底上施加糊料，并通过固化糊料形成陶瓷载体。 使用陶瓷载体作为载体来减薄半导体衬底。

公开(公告)号：US09059273B2

公开(公告)日：2015-06-16

申请号：US14014699

申请日：2013-08-30

Applicant: Infineon Technologies AG

Inventor： Petra Fischer ,  Michael Roesner ,  Gudrun Stranzl

IPC: H01L21/00 ,  H01L21/78

CPC classification number: H01L21/78 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2224/03001

Abstract: A method for processing a semiconductor wafer in accordance with various embodiments may include: providing a semiconductor wafer including at least one chip and at least one kerf region adjacent to the at least one chip, the kerf region including at least one auxiliary structure; applying a mask layer to the semiconductor wafer; removing the at least one auxiliary structure in the at least one kerf region; removing the applied mask layer; and separating the semiconductor wafer along the at least one kerf region.

Abstract translation: 根据各种实施例的用于处理半导体晶片的方法可以包括：提供包括至少一个芯片的半导体晶片和与所述至少一个芯片相邻的至少一个切割区域，所述切割区域包括至少一个辅助结构; 对半导体晶片施加掩模层; 去除所述至少一个切口区域中的所述至少一个辅助结构; 去除所施加的掩模层; 以及沿着所述至少一个切口区域分离所述半导体晶片。

公开(公告)号：US20150147850A1

公开(公告)日：2015-05-28

申请号：US14088523

申请日：2013-11-25

Applicant: Infineon Technologies AG

Inventor： Gudrun Stranzl ,  Martin Zgaga ,  Rainer Leuschner ,  Bernhard Goller ,  Bernhard Boche ,  Manfred Engelhardt ,  Hermann Wendt ,  Bernd Noehammer ,  Karl Mayer ,  Michael Roesner ,  Monika Cornelia Voerckel

IPC: H01L21/82 ,  H01L21/283 ,  H01L21/265 ,  H01L23/00

CPC classification number: H01L21/6835 ,  H01L21/0331 ,  H01L21/283 ,  H01L21/2855 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/6836 ,  H01L21/76895 ,  H01L21/78 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68359 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/0001

Abstract: Methods for processing a semiconductor workpiece can include providing a semiconductor workpiece that includes one or more kerf regions; forming one or more trenches in the workpiece by removing material from the one or more kerf regions from a first side of the workpiece; mounting the workpiece with the first side to a carrier; thinning the workpiece from a second side of the workpiece; and forming a metallization layer over the second side of the workpiece.

Abstract translation: 用于处理半导体工件的方法可以包括提供包括一个或多个切口区域的半导体工件; 通过从所述工件的第一侧移除来自所述一个或多个切割区域的材料，在所述工件中形成一个或多个沟槽; 将具有第一侧的工件安装到载体上; 从工件的第二侧使工件变薄; 以及在所述工件的第二侧上形成金属化层。

公开(公告)号：US11063014B2

公开(公告)日：2021-07-13

申请号：US16413195

申请日：2019-05-15

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Gudrun Stranzl

IPC: H01L23/00 ,  H01L29/45

Abstract: A semiconductor device includes a silicon layer, a metal silicide layer arranged directly on the silicon layer, and a solder layer arranged directly on the metal silicide layer.

公开(公告)号：US20190148233A1

公开(公告)日：2019-05-16

申请号：US16248255

申请日：2019-01-15

Applicant: Infineon Technologies AG

Inventor： Karl Mayer ,  Evelyn Napetschnig ,  Michael Pinczolits ,  Michael Sternad ,  Michael Roesner

IPC: H01L21/78 ,  H01L23/00

Abstract: A system and method for manufacturing a packaged component are disclosed. An embodiment comprises forming a plurality of components on a carrier, the plurality of components being separated from each other by kerf regions on a front side of the carrier and forming a metal pattern on a backside of the carrier, wherein the metal pattern covers the backside of the carrier except over regions corresponding to the kerf regions. The method further comprises generating the component by separating the carrier.

公开(公告)号：US20190096780A1

公开(公告)日：2019-03-28

申请号：US16138697

申请日：2018-09-21

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Christoph Bergmann

IPC: H01L23/34 ,  H01L23/29 ,  H01L43/10 ,  H01L43/02

Abstract: An electronic component includes an electronic chip and a magnetic phase change material configured to consume energy when changing between different magnetic phases in response to heating above a phase change temperature. The phase change material is thermally coupled with the electronic chip to thereby dissipate heat from the electronic chip upon heating up to or above the phase change temperature.

公开(公告)号：US20180315713A1

公开(公告)日：2018-11-01

申请号：US16029934

申请日：2018-07-09

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Gudrun Stranzl ,  Manfred Engelhardt ,  Martin Zgaga

IPC: H01L23/544 ,  H01L21/78 ,  H01L21/3065

Abstract: An integrated circuit substrate and a method for manufacturing the same are disclosed. In an embodiment a method includes providing a wafer having a plurality of active areas, each active area being provided in a separate die area and for each active area, providing a code pattern outside the active area, the code pattern being associated with the die area.

公开(公告)号：US10020264B2

公开(公告)日：2018-07-10

申请号：US14698639

申请日：2015-04-28

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Gudrun Stranzl ,  Manfred Engelhardt ,  Martin Zgaga

IPC: H01L23/544 ,  H01L21/67 ,  H01L21/78 ,  H01L21/3065 ,  G06K7/14

CPC classification number: H01L23/544 ,  H01L21/30655 ,  H01L21/78 ,  H01L2223/54413 ,  H01L2223/54433 ,  H01L2223/5446 ,  H01L2223/54473

Abstract: The description discloses a method for use in manufacturing integrated circuit chips. The method comprises providing a wafer having a plurality of integrated circuits each provided in an separate active areas, and, for each active area, outside the active area, providing a code pattern that is associated with the integrated circuit. A computer-readable medium is also disclosed. Further, a manufacturing apparatus configured to receive a wafer and to remove material from the wafer so as to provide a scribe line to the wafer formed as a trench for use in separation of the wafer into dies is also disclosed. The description also discloses a wafer, an integrated circuit chip die substrate originating from a wafer of origin and carrying an integrated circuit, and an integrated circuit chip.

公开(公告)号：US20180005838A1

公开(公告)日：2018-01-04

申请号：US15707176

申请日：2017-09-18

Applicant: Infineon Technologies AG

Inventor： Manfred Engelhardt ,  Michael Roesner ,  Georg Ehrentraut

IPC: H01L21/3065 ,  H01J37/32 ,  H01L21/67 ,  H01L21/78

CPC classification number: H01L21/3065 ,  H01J37/32642 ,  H01J37/32651 ,  H01L21/67092 ,  H01L21/78

Abstract: A segmented edge protection shield for plasma dicing a wafer. The segmented edge protection shield includes an outer structure and a plurality of plasma shield edge segments. The outer structure defines an interior annular edge configured to correspond to the circumferential edge of the wafer. Each one of the plurality of plasma shield edge segments is defined by an inner edge and side edges. The inner edge is interior to and concentric to the annular edge of the outer structure. The side edges extend between the inner edge and the annular edge.